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26ef5c09 DG |
1 | /* |
2 | * This program is free software; you can redistribute it and/or | |
3 | * modify it under the terms of the GNU General Public License | |
4 | * as published by the Free Software Foundation; either version | |
5 | * 2 of the License, or (at your option) any later version. | |
6 | */ | |
7 | #ifndef _ASM_POWERPC_CACHEFLUSH_H | |
8 | #define _ASM_POWERPC_CACHEFLUSH_H | |
9 | ||
10 | #ifdef __KERNEL__ | |
1da177e4 LT |
11 | |
12 | #include <linux/mm.h> | |
13 | #include <asm/cputable.h> | |
14 | ||
15 | /* | |
26ef5c09 DG |
16 | * No cache flushing is required when address mappings are changed, |
17 | * because the caches on PowerPCs are physically addressed. | |
1da177e4 LT |
18 | */ |
19 | #define flush_cache_all() do { } while (0) | |
20 | #define flush_cache_mm(mm) do { } while (0) | |
21 | #define flush_cache_range(vma, start, end) do { } while (0) | |
22 | #define flush_cache_page(vma, vmaddr, pfn) do { } while (0) | |
23 | #define flush_icache_page(vma, page) do { } while (0) | |
24 | #define flush_cache_vmap(start, end) do { } while (0) | |
25 | #define flush_cache_vunmap(start, end) do { } while (0) | |
26 | ||
27 | extern void flush_dcache_page(struct page *page); | |
28 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | |
29 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | |
30 | ||
31 | extern void __flush_icache_range(unsigned long, unsigned long); | |
26ef5c09 DG |
32 | static inline void flush_icache_range(unsigned long start, unsigned long stop) |
33 | { | |
34 | if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE)) | |
35 | __flush_icache_range(start, stop); | |
36 | } | |
37 | ||
1da177e4 LT |
38 | extern void flush_icache_user_range(struct vm_area_struct *vma, |
39 | struct page *page, unsigned long addr, | |
40 | int len); | |
26ef5c09 DG |
41 | extern void __flush_dcache_icache(void *page_va); |
42 | extern void flush_dcache_icache_page(struct page *page); | |
43 | #if defined(CONFIG_PPC32) && !defined(CONFIG_BOOKE) | |
44 | extern void __flush_dcache_icache_phys(unsigned long physaddr); | |
45 | #endif /* CONFIG_PPC32 && !CONFIG_BOOKE */ | |
1da177e4 LT |
46 | |
47 | extern void flush_dcache_range(unsigned long start, unsigned long stop); | |
26ef5c09 DG |
48 | #ifdef CONFIG_PPC32 |
49 | extern void clean_dcache_range(unsigned long start, unsigned long stop); | |
50 | extern void invalidate_dcache_range(unsigned long start, unsigned long stop); | |
51 | #endif /* CONFIG_PPC32 */ | |
52 | #ifdef CONFIG_PPC64 | |
1da177e4 | 53 | extern void flush_inval_dcache_range(unsigned long start, unsigned long stop); |
26ef5c09 DG |
54 | extern void flush_dcache_phys_range(unsigned long start, unsigned long stop); |
55 | #endif | |
1da177e4 LT |
56 | |
57 | #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ | |
26ef5c09 DG |
58 | do { \ |
59 | memcpy(dst, src, len); \ | |
60 | flush_icache_user_range(vma, page, vaddr, len); \ | |
61 | } while (0) | |
1da177e4 LT |
62 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ |
63 | memcpy(dst, src, len) | |
64 | ||
1da177e4 | 65 | |
26ef5c09 | 66 | #endif /* __KERNEL__ */ |
1da177e4 | 67 | |
26ef5c09 | 68 | #endif /* _ASM_POWERPC_CACHEFLUSH_H */ |