]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/blame - include/asm-powerpc/eeh.h
[POWERPC] Allow hooking of PCI MMIO & PIO accessors on 64 bits
[mirror_ubuntu-jammy-kernel.git] / include / asm-powerpc / eeh.h
CommitLineData
172ca926 1/*
1da177e4
LT
2 * eeh.h
3 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
172ca926 9 *
1da177e4
LT
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
172ca926 14 *
1da177e4
LT
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#ifndef _PPC64_EEH_H
21#define _PPC64_EEH_H
88ced031 22#ifdef __KERNEL__
1da177e4 23
1da177e4
LT
24#include <linux/init.h>
25#include <linux/list.h>
26#include <linux/string.h>
27
28struct pci_dev;
827c1a6c 29struct pci_bus;
1da177e4 30struct device_node;
1da177e4
LT
31
32#ifdef CONFIG_EEH
33
1e28a7dd
DW
34extern int eeh_subsystem_enabled;
35
1da177e4 36/* Values for eeh_mode bits in device_node */
77bd7415
LV
37#define EEH_MODE_SUPPORTED (1<<0)
38#define EEH_MODE_NOCHECK (1<<1)
39#define EEH_MODE_ISOLATED (1<<2)
40#define EEH_MODE_RECOVERING (1<<3)
41#define EEH_MODE_IRQ_DISABLED (1<<4)
1da177e4 42
172ca926
LV
43/* Max number of EEH freezes allowed before we consider the device
44 * to be permanently disabled. */
45#define EEH_MAX_ALLOWED_FREEZES 5
46
1da177e4
LT
47void __init eeh_init(void);
48unsigned long eeh_check_failure(const volatile void __iomem *token,
49 unsigned long val);
50int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev);
51void __init pci_addr_cache_build(void);
52
53/**
54 * eeh_add_device_early
55 * eeh_add_device_late
56 *
57 * Perform eeh initialization for devices added after boot.
58 * Call eeh_add_device_early before doing any i/o to the
59 * device (including config space i/o). Call eeh_add_device_late
60 * to finish the eeh setup for this device.
61 */
e2a296ee 62void eeh_add_device_tree_early(struct device_node *);
827c1a6c 63void eeh_add_device_tree_late(struct pci_bus *);
1da177e4 64
e2a296ee
LV
65/**
66 * eeh_remove_device_recursive - undo EEH for device & children.
67 * @dev: pci device to be removed
68 *
69 * As above, this removes the device; it also removes child
70 * pci devices as well.
71 */
72void eeh_remove_bus_device(struct pci_dev *);
73
1da177e4
LT
74/**
75 * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure.
76 *
77 * If this macro yields TRUE, the caller relays to eeh_check_failure()
78 * which does further tests out of line.
79 */
1e28a7dd 80#define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0 && eeh_subsystem_enabled)
1da177e4
LT
81
82/*
83 * Reads from a device which has been isolated by EEH will return
84 * all 1s. This macro gives an all-1s value of the given size (in
85 * bytes: 1, 2, or 4) for comparing with the result of a read.
86 */
87#define EEH_IO_ERROR_VALUE(size) (~0U >> ((4 - (size)) * 8))
88
89#else /* !CONFIG_EEH */
90static inline void eeh_init(void) { }
91
92static inline unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
93{
94 return val;
95}
96
97static inline int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
98{
99 return 0;
100}
101
102static inline void pci_addr_cache_build(void) { }
103
022930eb
HM
104static inline void eeh_add_device_tree_early(struct device_node *dn) { }
105
827c1a6c
JR
106static inline void eeh_add_device_tree_late(struct pci_bus *bus) { }
107
022930eb 108static inline void eeh_remove_bus_device(struct pci_dev *dev) { }
1da177e4
LT
109#define EEH_POSSIBLE_ERROR(val, type) (0)
110#define EEH_IO_ERROR_VALUE(size) (-1UL)
111#endif /* CONFIG_EEH */
112
172ca926 113/*
1da177e4
LT
114 * MMIO read/write operations with EEH support.
115 */
116static inline u8 eeh_readb(const volatile void __iomem *addr)
117{
118 u8 val = in_8(addr);
119 if (EEH_POSSIBLE_ERROR(val, u8))
120 return eeh_check_failure(addr, val);
121 return val;
122}
1da177e4
LT
123
124static inline u16 eeh_readw(const volatile void __iomem *addr)
125{
126 u16 val = in_le16(addr);
127 if (EEH_POSSIBLE_ERROR(val, u16))
128 return eeh_check_failure(addr, val);
129 return val;
130}
1da177e4
LT
131
132static inline u32 eeh_readl(const volatile void __iomem *addr)
133{
134 u32 val = in_le32(addr);
135 if (EEH_POSSIBLE_ERROR(val, u32))
136 return eeh_check_failure(addr, val);
137 return val;
138}
4cb3cee0
BH
139
140static inline u64 eeh_readq(const volatile void __iomem *addr)
1da177e4 141{
4cb3cee0
BH
142 u64 val = in_le64(addr);
143 if (EEH_POSSIBLE_ERROR(val, u64))
1da177e4
LT
144 return eeh_check_failure(addr, val);
145 return val;
146}
1da177e4 147
4cb3cee0 148static inline u16 eeh_readw_be(const volatile void __iomem *addr)
1da177e4 149{
4cb3cee0
BH
150 u16 val = in_be16(addr);
151 if (EEH_POSSIBLE_ERROR(val, u16))
1da177e4
LT
152 return eeh_check_failure(addr, val);
153 return val;
154}
4cb3cee0
BH
155
156static inline u32 eeh_readl_be(const volatile void __iomem *addr)
1da177e4 157{
4cb3cee0
BH
158 u32 val = in_be32(addr);
159 if (EEH_POSSIBLE_ERROR(val, u32))
160 return eeh_check_failure(addr, val);
161 return val;
1da177e4 162}
4cb3cee0
BH
163
164static inline u64 eeh_readq_be(const volatile void __iomem *addr)
1da177e4
LT
165{
166 u64 val = in_be64(addr);
167 if (EEH_POSSIBLE_ERROR(val, u64))
168 return eeh_check_failure(addr, val);
169 return val;
170}
1da177e4
LT
171
172#define EEH_CHECK_ALIGN(v,a) \
173 ((((unsigned long)(v)) & ((a) - 1)) == 0)
174
175static inline void eeh_memset_io(volatile void __iomem *addr, int c,
176 unsigned long n)
177{
6c9afc65 178 void *p = (void __force *)addr;
1da177e4
LT
179 u32 lc = c;
180 lc |= lc << 8;
181 lc |= lc << 16;
182
f007cacf 183 __asm__ __volatile__ ("sync" : : : "memory");
6c9afc65
AV
184 while(n && !EEH_CHECK_ALIGN(p, 4)) {
185 *((volatile u8 *)p) = c;
186 p++;
1da177e4
LT
187 n--;
188 }
189 while(n >= 4) {
6c9afc65
AV
190 *((volatile u32 *)p) = lc;
191 p += 4;
1da177e4
LT
192 n -= 4;
193 }
194 while(n) {
6c9afc65
AV
195 *((volatile u8 *)p) = c;
196 p++;
1da177e4
LT
197 n--;
198 }
199 __asm__ __volatile__ ("sync" : : : "memory");
200}
201static inline void eeh_memcpy_fromio(void *dest, const volatile void __iomem *src,
202 unsigned long n)
203{
204 void *vsrc = (void __force *) src;
205 void *destsave = dest;
206 unsigned long nsave = n;
207
f007cacf 208 __asm__ __volatile__ ("sync" : : : "memory");
1da177e4
LT
209 while(n && (!EEH_CHECK_ALIGN(vsrc, 4) || !EEH_CHECK_ALIGN(dest, 4))) {
210 *((u8 *)dest) = *((volatile u8 *)vsrc);
211 __asm__ __volatile__ ("eieio" : : : "memory");
6c9afc65
AV
212 vsrc++;
213 dest++;
1da177e4
LT
214 n--;
215 }
216 while(n > 4) {
217 *((u32 *)dest) = *((volatile u32 *)vsrc);
218 __asm__ __volatile__ ("eieio" : : : "memory");
6c9afc65
AV
219 vsrc += 4;
220 dest += 4;
1da177e4
LT
221 n -= 4;
222 }
223 while(n) {
224 *((u8 *)dest) = *((volatile u8 *)vsrc);
225 __asm__ __volatile__ ("eieio" : : : "memory");
6c9afc65
AV
226 vsrc++;
227 dest++;
1da177e4
LT
228 n--;
229 }
230 __asm__ __volatile__ ("sync" : : : "memory");
231
232 /* Look for ffff's here at dest[n]. Assume that at least 4 bytes
233 * were copied. Check all four bytes.
234 */
235 if ((nsave >= 4) &&
236 (EEH_POSSIBLE_ERROR((*((u32 *) destsave+nsave-4)), u32))) {
237 eeh_check_failure(src, (*((u32 *) destsave+nsave-4)));
238 }
239}
240
241static inline void eeh_memcpy_toio(volatile void __iomem *dest, const void *src,
242 unsigned long n)
243{
244 void *vdest = (void __force *) dest;
245
f007cacf 246 __asm__ __volatile__ ("sync" : : : "memory");
1da177e4
LT
247 while(n && (!EEH_CHECK_ALIGN(vdest, 4) || !EEH_CHECK_ALIGN(src, 4))) {
248 *((volatile u8 *)vdest) = *((u8 *)src);
6c9afc65
AV
249 src++;
250 vdest++;
1da177e4
LT
251 n--;
252 }
253 while(n > 4) {
254 *((volatile u32 *)vdest) = *((volatile u32 *)src);
6c9afc65
AV
255 src += 4;
256 vdest += 4;
1da177e4
LT
257 n-=4;
258 }
259 while(n) {
260 *((volatile u8 *)vdest) = *((u8 *)src);
6c9afc65
AV
261 src++;
262 vdest++;
1da177e4
LT
263 n--;
264 }
265 __asm__ __volatile__ ("sync" : : : "memory");
266}
267
268#undef EEH_CHECK_ALIGN
269
1da177e4 270/* in-string eeh macros */
4cb3cee0
BH
271static inline void eeh_readsb(const volatile void __iomem *addr, void * buf,
272 int ns)
1da177e4 273{
4cb3cee0 274 _insb(addr, buf, ns);
1da177e4 275 if (EEH_POSSIBLE_ERROR((*(((u8*)buf)+ns-1)), u8))
4cb3cee0 276 eeh_check_failure(addr, *(u8*)buf);
1da177e4
LT
277}
278
4cb3cee0
BH
279static inline void eeh_readsw(const volatile void __iomem *addr, void * buf,
280 int ns)
1da177e4 281{
4cb3cee0 282 _insw(addr, buf, ns);
1da177e4 283 if (EEH_POSSIBLE_ERROR((*(((u16*)buf)+ns-1)), u16))
4cb3cee0 284 eeh_check_failure(addr, *(u16*)buf);
1da177e4
LT
285}
286
4cb3cee0
BH
287static inline void eeh_readsl(const volatile void __iomem *addr, void * buf,
288 int nl)
1da177e4 289{
4cb3cee0 290 _insl(addr, buf, nl);
1da177e4 291 if (EEH_POSSIBLE_ERROR((*(((u32*)buf)+nl-1)), u32))
4cb3cee0 292 eeh_check_failure(addr, *(u32*)buf);
1da177e4
LT
293}
294
88ced031 295#endif /* __KERNEL__ */
1da177e4 296#endif /* _PPC64_EEH_H */