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047ea784 PM |
1 | #ifndef _ASM_POWERPC_IO_H |
2 | #define _ASM_POWERPC_IO_H | |
88ced031 | 3 | #ifdef __KERNEL__ |
1da177e4 LT |
4 | |
5 | /* | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version | |
9 | * 2 of the License, or (at your option) any later version. | |
10 | */ | |
11 | ||
1269277a DW |
12 | /* Check of existence of legacy devices */ |
13 | extern int check_legacy_ioport(unsigned long base_port); | |
14 | ||
047ea784 PM |
15 | #ifndef CONFIG_PPC64 |
16 | #include <asm-ppc/io.h> | |
17 | #else | |
18 | ||
1da177e4 LT |
19 | #include <linux/compiler.h> |
20 | #include <asm/page.h> | |
21 | #include <asm/byteorder.h> | |
f007cacf | 22 | #include <asm/paca.h> |
feaf7cf1 | 23 | #include <asm/synch.h> |
1da177e4 LT |
24 | #include <asm/delay.h> |
25 | ||
26 | #include <asm-generic/iomap.h> | |
27 | ||
1da177e4 LT |
28 | #define SIO_CONFIG_RA 0x398 |
29 | #define SIO_CONFIG_RD 0x399 | |
30 | ||
31 | #define SLOW_DOWN_IO | |
32 | ||
33 | extern unsigned long isa_io_base; | |
34 | extern unsigned long pci_io_base; | |
1da177e4 LT |
35 | |
36 | #ifdef CONFIG_PPC_ISERIES | |
fa053d2f | 37 | |
caf81329 SR |
38 | extern int in_8(const volatile unsigned char __iomem *addr); |
39 | extern void out_8(volatile unsigned char __iomem *addr, int val); | |
40 | extern int in_le16(const volatile unsigned short __iomem *addr); | |
41 | extern int in_be16(const volatile unsigned short __iomem *addr); | |
42 | extern void out_le16(volatile unsigned short __iomem *addr, int val); | |
43 | extern void out_be16(volatile unsigned short __iomem *addr, int val); | |
44 | extern unsigned in_le32(const volatile unsigned __iomem *addr); | |
45 | extern unsigned in_be32(const volatile unsigned __iomem *addr); | |
46 | extern void out_le32(volatile unsigned __iomem *addr, int val); | |
47 | extern void out_be32(volatile unsigned __iomem *addr, int val); | |
48 | extern unsigned long in_le64(const volatile unsigned long __iomem *addr); | |
49 | extern unsigned long in_be64(const volatile unsigned long __iomem *addr); | |
50 | extern void out_le64(volatile unsigned long __iomem *addr, unsigned long val); | |
51 | extern void out_be64(volatile unsigned long __iomem *addr, unsigned long val); | |
52 | ||
53 | extern unsigned char __raw_readb(const volatile void __iomem *addr); | |
54 | extern unsigned short __raw_readw(const volatile void __iomem *addr); | |
55 | extern unsigned int __raw_readl(const volatile void __iomem *addr); | |
56 | extern unsigned long __raw_readq(const volatile void __iomem *addr); | |
57 | extern void __raw_writeb(unsigned char v, volatile void __iomem *addr); | |
58 | extern void __raw_writew(unsigned short v, volatile void __iomem *addr); | |
59 | extern void __raw_writel(unsigned int v, volatile void __iomem *addr); | |
60 | extern void __raw_writeq(unsigned long v, volatile void __iomem *addr); | |
61 | ||
62 | extern void memset_io(volatile void __iomem *addr, int c, unsigned long n); | |
63 | extern void memcpy_fromio(void *dest, const volatile void __iomem *src, | |
64 | unsigned long n); | |
65 | extern void memcpy_toio(volatile void __iomem *dest, const void *src, | |
66 | unsigned long n); | |
67 | ||
68 | #else /* CONFIG_PPC_ISERIES */ | |
69 | ||
70 | #define in_8(addr) __in_8((addr)) | |
71 | #define out_8(addr, val) __out_8((addr), (val)) | |
72 | #define in_le16(addr) __in_le16((addr)) | |
73 | #define in_be16(addr) __in_be16((addr)) | |
74 | #define out_le16(addr, val) __out_le16((addr), (val)) | |
75 | #define out_be16(addr, val) __out_be16((addr), (val)) | |
76 | #define in_le32(addr) __in_le32((addr)) | |
77 | #define in_be32(addr) __in_be32((addr)) | |
78 | #define out_le32(addr, val) __out_le32((addr), (val)) | |
79 | #define out_be32(addr, val) __out_be32((addr), (val)) | |
80 | #define in_le64(addr) __in_le64((addr)) | |
81 | #define in_be64(addr) __in_be64((addr)) | |
82 | #define out_le64(addr, val) __out_le64((addr), (val)) | |
83 | #define out_be64(addr, val) __out_be64((addr), (val)) | |
1da177e4 LT |
84 | |
85 | static inline unsigned char __raw_readb(const volatile void __iomem *addr) | |
86 | { | |
87 | return *(volatile unsigned char __force *)addr; | |
88 | } | |
89 | static inline unsigned short __raw_readw(const volatile void __iomem *addr) | |
90 | { | |
91 | return *(volatile unsigned short __force *)addr; | |
92 | } | |
93 | static inline unsigned int __raw_readl(const volatile void __iomem *addr) | |
94 | { | |
95 | return *(volatile unsigned int __force *)addr; | |
96 | } | |
97 | static inline unsigned long __raw_readq(const volatile void __iomem *addr) | |
98 | { | |
99 | return *(volatile unsigned long __force *)addr; | |
100 | } | |
101 | static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr) | |
102 | { | |
103 | *(volatile unsigned char __force *)addr = v; | |
104 | } | |
105 | static inline void __raw_writew(unsigned short v, volatile void __iomem *addr) | |
106 | { | |
107 | *(volatile unsigned short __force *)addr = v; | |
108 | } | |
109 | static inline void __raw_writel(unsigned int v, volatile void __iomem *addr) | |
110 | { | |
111 | *(volatile unsigned int __force *)addr = v; | |
112 | } | |
113 | static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr) | |
114 | { | |
115 | *(volatile unsigned long __force *)addr = v; | |
116 | } | |
1da177e4 LT |
117 | #define memset_io(a,b,c) eeh_memset_io((a),(b),(c)) |
118 | #define memcpy_fromio(a,b,c) eeh_memcpy_fromio((a),(b),(c)) | |
119 | #define memcpy_toio(a,b,c) eeh_memcpy_toio((a),(b),(c)) | |
caf81329 SR |
120 | |
121 | #endif /* CONFIG_PPC_ISERIES */ | |
1da177e4 LT |
122 | |
123 | /* | |
124 | * The insw/outsw/insl/outsl macros don't do byte-swapping. | |
125 | * They are only used in practice for transferring buffers which | |
126 | * are arrays of bytes, and byte-swapping is not appropriate in | |
127 | * that case. - paulus */ | |
128 | #define insb(port, buf, ns) eeh_insb((port), (buf), (ns)) | |
129 | #define insw(port, buf, ns) eeh_insw_ns((port), (buf), (ns)) | |
130 | #define insl(port, buf, nl) eeh_insl_ns((port), (buf), (nl)) | |
1da177e4 | 131 | |
6c9afc65 AV |
132 | #define outsb(port, buf, ns) _outsb((u8 __iomem *)((port)+pci_io_base), (buf), (ns)) |
133 | #define outsw(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns)) | |
134 | #define outsl(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl)) | |
1da177e4 | 135 | |
caf81329 SR |
136 | #define readb(addr) eeh_readb(addr) |
137 | #define readw(addr) eeh_readw(addr) | |
138 | #define readl(addr) eeh_readl(addr) | |
139 | #define readq(addr) eeh_readq(addr) | |
140 | #define writeb(data, addr) eeh_writeb((data), (addr)) | |
141 | #define writew(data, addr) eeh_writew((data), (addr)) | |
142 | #define writel(data, addr) eeh_writel((data), (addr)) | |
143 | #define writeq(data, addr) eeh_writeq((data), (addr)) | |
144 | #define inb(port) eeh_inb((unsigned long)port) | |
145 | #define outb(val, port) eeh_outb(val, (unsigned long)port) | |
146 | #define inw(port) eeh_inw((unsigned long)port) | |
147 | #define outw(val, port) eeh_outw(val, (unsigned long)port) | |
148 | #define inl(port) eeh_inl((unsigned long)port) | |
149 | #define outl(val, port) eeh_outl(val, (unsigned long)port) | |
150 | ||
1da177e4 LT |
151 | #define readb_relaxed(addr) readb(addr) |
152 | #define readw_relaxed(addr) readw(addr) | |
153 | #define readl_relaxed(addr) readl(addr) | |
154 | #define readq_relaxed(addr) readq(addr) | |
155 | ||
5adcaf50 SR |
156 | extern void _insb(volatile u8 __iomem *port, void *buf, long count); |
157 | extern void _outsb(volatile u8 __iomem *port, const void *buf, long count); | |
158 | extern void _insw_ns(volatile u16 __iomem *port, void *buf, long count); | |
159 | extern void _outsw_ns(volatile u16 __iomem *port, const void *buf, long count); | |
160 | extern void _insl_ns(volatile u32 __iomem *port, void *buf, long count); | |
161 | extern void _outsl_ns(volatile u32 __iomem *port, const void *buf, long count); | |
1da177e4 | 162 | |
f007cacf PM |
163 | static inline void mmiowb(void) |
164 | { | |
165 | __asm__ __volatile__ ("sync" : : : "memory"); | |
166 | get_paca()->io_sync = 0; | |
167 | } | |
1da177e4 LT |
168 | |
169 | /* | |
170 | * output pause versions need a delay at least for the | |
171 | * w83c105 ide controller in a p610. | |
172 | */ | |
173 | #define inb_p(port) inb(port) | |
174 | #define outb_p(val, port) (udelay(1), outb((val), (port))) | |
175 | #define inw_p(port) inw(port) | |
176 | #define outw_p(val, port) (udelay(1), outw((val), (port))) | |
177 | #define inl_p(port) inl(port) | |
178 | #define outl_p(val, port) (udelay(1), outl((val), (port))) | |
179 | ||
1da177e4 LT |
180 | |
181 | #define IO_SPACE_LIMIT ~(0UL) | |
182 | ||
183 | ||
1da177e4 LT |
184 | extern int __ioremap_explicit(unsigned long p_addr, unsigned long v_addr, |
185 | unsigned long size, unsigned long flags); | |
186 | extern void __iomem *__ioremap(unsigned long address, unsigned long size, | |
187 | unsigned long flags); | |
188 | ||
189 | /** | |
190 | * ioremap - map bus memory into CPU space | |
191 | * @address: bus address of the memory | |
192 | * @size: size of the resource to map | |
193 | * | |
194 | * ioremap performs a platform specific sequence of operations to | |
195 | * make bus memory CPU accessible via the readb/readw/readl/writeb/ | |
196 | * writew/writel functions and the other mmio helpers. The returned | |
197 | * address is not guaranteed to be usable directly as a virtual | |
198 | * address. | |
199 | */ | |
200 | extern void __iomem *ioremap(unsigned long address, unsigned long size); | |
201 | ||
202 | #define ioremap_nocache(addr, size) ioremap((addr), (size)) | |
203 | extern int iounmap_explicit(volatile void __iomem *addr, unsigned long size); | |
204 | extern void iounmap(volatile void __iomem *addr); | |
205 | extern void __iomem * reserve_phb_iospace(unsigned long size); | |
206 | ||
207 | /** | |
208 | * virt_to_phys - map virtual addresses to physical | |
209 | * @address: address to remap | |
210 | * | |
211 | * The returned physical address is the physical (CPU) mapping for | |
212 | * the memory address given. It is only valid to use this function on | |
213 | * addresses directly mapped or allocated via kmalloc. | |
214 | * | |
215 | * This function does not give bus mappings for DMA transfers. In | |
216 | * almost all conceivable cases a device driver should not be using | |
217 | * this function | |
218 | */ | |
219 | static inline unsigned long virt_to_phys(volatile void * address) | |
220 | { | |
221 | return __pa((unsigned long)address); | |
222 | } | |
223 | ||
224 | /** | |
225 | * phys_to_virt - map physical address to virtual | |
226 | * @address: address to remap | |
227 | * | |
228 | * The returned virtual address is a current CPU mapping for | |
229 | * the memory address given. It is only valid to use this function on | |
230 | * addresses that have a kernel mapping | |
231 | * | |
232 | * This function does not handle bus mappings for DMA transfers. In | |
233 | * almost all conceivable cases a device driver should not be using | |
234 | * this function | |
235 | */ | |
236 | static inline void * phys_to_virt(unsigned long address) | |
237 | { | |
238 | return (void *)__va(address); | |
239 | } | |
240 | ||
241 | /* | |
242 | * Change "struct page" to physical address. | |
243 | */ | |
244 | #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) | |
245 | ||
246 | /* We do NOT want virtual merging, it would put too much pressure on | |
247 | * our iommu allocator. Instead, we want drivers to be smart enough | |
248 | * to coalesce sglists that happen to have been mapped in a contiguous | |
249 | * way by the iommu | |
250 | */ | |
251 | #define BIO_VMERGE_BOUNDARY 0 | |
252 | ||
1da177e4 LT |
253 | static inline void iosync(void) |
254 | { | |
255 | __asm__ __volatile__ ("sync" : : : "memory"); | |
256 | } | |
257 | ||
258 | /* Enforce in-order execution of data I/O. | |
259 | * No distinction between read/write on PPC; use eieio for all three. | |
260 | */ | |
261 | #define iobarrier_rw() eieio() | |
262 | #define iobarrier_r() eieio() | |
263 | #define iobarrier_w() eieio() | |
264 | ||
265 | /* | |
266 | * 8, 16 and 32 bit, big and little endian I/O operations, with barrier. | |
267 | * These routines do not perform EEH-related I/O address translation, | |
268 | * and should not be used directly by device drivers. Use inb/readb | |
269 | * instead. | |
270 | */ | |
caf81329 | 271 | static inline int __in_8(const volatile unsigned char __iomem *addr) |
1da177e4 LT |
272 | { |
273 | int ret; | |
274 | ||
f007cacf | 275 | __asm__ __volatile__("sync; lbz%U1%X1 %0,%1; twi 0,%0,0; isync" |
1da177e4 LT |
276 | : "=r" (ret) : "m" (*addr)); |
277 | return ret; | |
278 | } | |
279 | ||
caf81329 | 280 | static inline void __out_8(volatile unsigned char __iomem *addr, int val) |
1da177e4 | 281 | { |
f007cacf | 282 | __asm__ __volatile__("sync; stb%U0%X0 %1,%0" |
1da177e4 | 283 | : "=m" (*addr) : "r" (val)); |
f007cacf | 284 | get_paca()->io_sync = 1; |
1da177e4 LT |
285 | } |
286 | ||
caf81329 | 287 | static inline int __in_le16(const volatile unsigned short __iomem *addr) |
1da177e4 LT |
288 | { |
289 | int ret; | |
290 | ||
f007cacf | 291 | __asm__ __volatile__("sync; lhbrx %0,0,%1; twi 0,%0,0; isync" |
1da177e4 LT |
292 | : "=r" (ret) : "r" (addr), "m" (*addr)); |
293 | return ret; | |
294 | } | |
295 | ||
caf81329 | 296 | static inline int __in_be16(const volatile unsigned short __iomem *addr) |
1da177e4 LT |
297 | { |
298 | int ret; | |
299 | ||
f007cacf | 300 | __asm__ __volatile__("sync; lhz%U1%X1 %0,%1; twi 0,%0,0; isync" |
1da177e4 LT |
301 | : "=r" (ret) : "m" (*addr)); |
302 | return ret; | |
303 | } | |
304 | ||
caf81329 | 305 | static inline void __out_le16(volatile unsigned short __iomem *addr, int val) |
1da177e4 | 306 | { |
f007cacf | 307 | __asm__ __volatile__("sync; sthbrx %1,0,%2" |
1da177e4 | 308 | : "=m" (*addr) : "r" (val), "r" (addr)); |
f007cacf | 309 | get_paca()->io_sync = 1; |
1da177e4 LT |
310 | } |
311 | ||
caf81329 | 312 | static inline void __out_be16(volatile unsigned short __iomem *addr, int val) |
1da177e4 | 313 | { |
f007cacf | 314 | __asm__ __volatile__("sync; sth%U0%X0 %1,%0" |
1da177e4 | 315 | : "=m" (*addr) : "r" (val)); |
f007cacf | 316 | get_paca()->io_sync = 1; |
1da177e4 LT |
317 | } |
318 | ||
caf81329 | 319 | static inline unsigned __in_le32(const volatile unsigned __iomem *addr) |
1da177e4 LT |
320 | { |
321 | unsigned ret; | |
322 | ||
f007cacf | 323 | __asm__ __volatile__("sync; lwbrx %0,0,%1; twi 0,%0,0; isync" |
1da177e4 LT |
324 | : "=r" (ret) : "r" (addr), "m" (*addr)); |
325 | return ret; | |
326 | } | |
327 | ||
caf81329 | 328 | static inline unsigned __in_be32(const volatile unsigned __iomem *addr) |
1da177e4 LT |
329 | { |
330 | unsigned ret; | |
331 | ||
f007cacf | 332 | __asm__ __volatile__("sync; lwz%U1%X1 %0,%1; twi 0,%0,0; isync" |
1da177e4 LT |
333 | : "=r" (ret) : "m" (*addr)); |
334 | return ret; | |
335 | } | |
336 | ||
caf81329 | 337 | static inline void __out_le32(volatile unsigned __iomem *addr, int val) |
1da177e4 | 338 | { |
f007cacf | 339 | __asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr) |
1da177e4 | 340 | : "r" (val), "r" (addr)); |
f007cacf | 341 | get_paca()->io_sync = 1; |
1da177e4 LT |
342 | } |
343 | ||
caf81329 | 344 | static inline void __out_be32(volatile unsigned __iomem *addr, int val) |
1da177e4 | 345 | { |
f007cacf | 346 | __asm__ __volatile__("sync; stw%U0%X0 %1,%0" |
1da177e4 | 347 | : "=m" (*addr) : "r" (val)); |
f007cacf | 348 | get_paca()->io_sync = 1; |
1da177e4 LT |
349 | } |
350 | ||
caf81329 | 351 | static inline unsigned long __in_le64(const volatile unsigned long __iomem *addr) |
1da177e4 LT |
352 | { |
353 | unsigned long tmp, ret; | |
354 | ||
355 | __asm__ __volatile__( | |
f007cacf | 356 | "sync\n" |
1da177e4 LT |
357 | "ld %1,0(%2)\n" |
358 | "twi 0,%1,0\n" | |
359 | "isync\n" | |
360 | "rldimi %0,%1,5*8,1*8\n" | |
361 | "rldimi %0,%1,3*8,2*8\n" | |
362 | "rldimi %0,%1,1*8,3*8\n" | |
363 | "rldimi %0,%1,7*8,4*8\n" | |
364 | "rldicl %1,%1,32,0\n" | |
365 | "rlwimi %0,%1,8,8,31\n" | |
366 | "rlwimi %0,%1,24,16,23\n" | |
367 | : "=r" (ret) , "=r" (tmp) : "b" (addr) , "m" (*addr)); | |
368 | return ret; | |
369 | } | |
370 | ||
caf81329 | 371 | static inline unsigned long __in_be64(const volatile unsigned long __iomem *addr) |
1da177e4 LT |
372 | { |
373 | unsigned long ret; | |
374 | ||
f007cacf | 375 | __asm__ __volatile__("sync; ld%U1%X1 %0,%1; twi 0,%0,0; isync" |
1da177e4 LT |
376 | : "=r" (ret) : "m" (*addr)); |
377 | return ret; | |
378 | } | |
379 | ||
caf81329 | 380 | static inline void __out_le64(volatile unsigned long __iomem *addr, unsigned long val) |
1da177e4 LT |
381 | { |
382 | unsigned long tmp; | |
383 | ||
384 | __asm__ __volatile__( | |
385 | "rldimi %0,%1,5*8,1*8\n" | |
386 | "rldimi %0,%1,3*8,2*8\n" | |
387 | "rldimi %0,%1,1*8,3*8\n" | |
388 | "rldimi %0,%1,7*8,4*8\n" | |
389 | "rldicl %1,%1,32,0\n" | |
390 | "rlwimi %0,%1,8,8,31\n" | |
391 | "rlwimi %0,%1,24,16,23\n" | |
f007cacf PM |
392 | "sync\n" |
393 | "std %0,0(%3)" | |
1da177e4 | 394 | : "=&r" (tmp) , "=&r" (val) : "1" (val) , "b" (addr) , "m" (*addr)); |
f007cacf | 395 | get_paca()->io_sync = 1; |
1da177e4 LT |
396 | } |
397 | ||
caf81329 | 398 | static inline void __out_be64(volatile unsigned long __iomem *addr, unsigned long val) |
1da177e4 | 399 | { |
f007cacf PM |
400 | __asm__ __volatile__("sync; std%U0%X0 %1,%0" : "=m" (*addr) : "r" (val)); |
401 | get_paca()->io_sync = 1; | |
1da177e4 LT |
402 | } |
403 | ||
1da177e4 | 404 | #include <asm/eeh.h> |
1da177e4 | 405 | |
1da177e4 LT |
406 | /** |
407 | * check_signature - find BIOS signatures | |
408 | * @io_addr: mmio address to check | |
409 | * @signature: signature block | |
410 | * @length: length of signature | |
411 | * | |
412 | * Perform a signature comparison with the mmio address io_addr. This | |
413 | * address should have been obtained by ioremap. | |
414 | * Returns 1 on a match. | |
415 | */ | |
416 | static inline int check_signature(const volatile void __iomem * io_addr, | |
417 | const unsigned char *signature, int length) | |
418 | { | |
419 | int retval = 0; | |
1da177e4 LT |
420 | do { |
421 | if (readb(io_addr) != *signature) | |
422 | goto out; | |
423 | io_addr++; | |
424 | signature++; | |
425 | length--; | |
426 | } while (length); | |
427 | retval = 1; | |
428 | out: | |
1da177e4 LT |
429 | return retval; |
430 | } | |
431 | ||
432 | /* Nothing to do */ | |
433 | ||
434 | #define dma_cache_inv(_start,_size) do { } while (0) | |
435 | #define dma_cache_wback(_start,_size) do { } while (0) | |
436 | #define dma_cache_wback_inv(_start,_size) do { } while (0) | |
437 | ||
1da177e4 LT |
438 | |
439 | /* | |
440 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | |
441 | * access | |
442 | */ | |
443 | #define xlate_dev_mem_ptr(p) __va(p) | |
444 | ||
445 | /* | |
446 | * Convert a virtual cached pointer to an uncached pointer | |
447 | */ | |
448 | #define xlate_dev_kmem_ptr(p) p | |
449 | ||
450 | #endif /* __KERNEL__ */ | |
451 | ||
047ea784 PM |
452 | #endif /* CONFIG_PPC64 */ |
453 | #endif /* _ASM_POWERPC_IO_H */ |