]>
Commit | Line | Data |
---|---|---|
67f74c9d DG |
1 | #ifndef _ASM_POWERPC_MMU_FSL_BOOKE_H_ |
2 | #define _ASM_POWERPC_MMU_FSL_BOOKE_H_ | |
3 | /* | |
4 | * Freescale Book-E MMU support | |
5 | */ | |
6 | ||
7 | /* Book-E defined page sizes */ | |
8 | #define BOOKE_PAGESZ_1K 0 | |
9 | #define BOOKE_PAGESZ_4K 1 | |
10 | #define BOOKE_PAGESZ_16K 2 | |
11 | #define BOOKE_PAGESZ_64K 3 | |
12 | #define BOOKE_PAGESZ_256K 4 | |
13 | #define BOOKE_PAGESZ_1M 5 | |
14 | #define BOOKE_PAGESZ_4M 6 | |
15 | #define BOOKE_PAGESZ_16M 7 | |
16 | #define BOOKE_PAGESZ_64M 8 | |
17 | #define BOOKE_PAGESZ_256M 9 | |
18 | #define BOOKE_PAGESZ_1GB 10 | |
19 | #define BOOKE_PAGESZ_4GB 11 | |
20 | #define BOOKE_PAGESZ_16GB 12 | |
21 | #define BOOKE_PAGESZ_64GB 13 | |
22 | #define BOOKE_PAGESZ_256GB 14 | |
23 | #define BOOKE_PAGESZ_1TB 15 | |
24 | ||
25 | #define MAS0_TLBSEL(x) ((x << 28) & 0x30000000) | |
26 | #define MAS0_ESEL(x) ((x << 16) & 0x0FFF0000) | |
27 | #define MAS0_NV(x) ((x) & 0x00000FFF) | |
28 | ||
29 | #define MAS1_VALID 0x80000000 | |
30 | #define MAS1_IPROT 0x40000000 | |
31 | #define MAS1_TID(x) ((x << 16) & 0x3FFF0000) | |
32 | #define MAS1_TS 0x00001000 | |
33 | #define MAS1_TSIZE(x) ((x << 8) & 0x00000F00) | |
34 | ||
35 | #define MAS2_EPN 0xFFFFF000 | |
36 | #define MAS2_X0 0x00000040 | |
37 | #define MAS2_X1 0x00000020 | |
38 | #define MAS2_W 0x00000010 | |
39 | #define MAS2_I 0x00000008 | |
40 | #define MAS2_M 0x00000004 | |
41 | #define MAS2_G 0x00000002 | |
42 | #define MAS2_E 0x00000001 | |
43 | ||
44 | #define MAS3_RPN 0xFFFFF000 | |
45 | #define MAS3_U0 0x00000200 | |
46 | #define MAS3_U1 0x00000100 | |
47 | #define MAS3_U2 0x00000080 | |
48 | #define MAS3_U3 0x00000040 | |
49 | #define MAS3_UX 0x00000020 | |
50 | #define MAS3_SX 0x00000010 | |
51 | #define MAS3_UW 0x00000008 | |
52 | #define MAS3_SW 0x00000004 | |
53 | #define MAS3_UR 0x00000002 | |
54 | #define MAS3_SR 0x00000001 | |
55 | ||
56 | #define MAS4_TLBSELD(x) MAS0_TLBSEL(x) | |
57 | #define MAS4_TIDDSEL 0x000F0000 | |
58 | #define MAS4_TSIZED(x) MAS1_TSIZE(x) | |
59 | #define MAS4_X0D 0x00000040 | |
60 | #define MAS4_X1D 0x00000020 | |
61 | #define MAS4_WD 0x00000010 | |
62 | #define MAS4_ID 0x00000008 | |
63 | #define MAS4_MD 0x00000004 | |
64 | #define MAS4_GD 0x00000002 | |
65 | #define MAS4_ED 0x00000001 | |
66 | ||
67 | #define MAS6_SPID0 0x3FFF0000 | |
68 | #define MAS6_SPID1 0x00007FFE | |
69 | #define MAS6_SAS 0x00000001 | |
70 | #define MAS6_SPID MAS6_SPID0 | |
71 | ||
72 | #define MAS7_RPN 0xFFFFFFFF | |
73 | ||
74 | #ifndef __ASSEMBLY__ | |
75 | ||
67f74c9d DG |
76 | typedef struct { |
77 | unsigned long id; | |
78 | unsigned long vdso_base; | |
79 | } mm_context_t; | |
80 | #endif /* !__ASSEMBLY__ */ | |
81 | ||
82 | #endif /* _ASM_POWERPC_MMU_FSL_BOOKE_H_ */ |