]>
Commit | Line | Data |
---|---|---|
047ea784 PM |
1 | #ifndef _ASM_POWERPC_PCI_BRIDGE_H |
2 | #define _ASM_POWERPC_PCI_BRIDGE_H | |
88ced031 | 3 | #ifdef __KERNEL__ |
047ea784 PM |
4 | |
5 | #ifndef CONFIG_PPC64 | |
6 | #include <asm-ppc/pci-bridge.h> | |
7 | #else | |
1da177e4 LT |
8 | |
9 | #include <linux/pci.h> | |
76f9f87f | 10 | #include <linux/list.h> |
1da177e4 LT |
11 | |
12 | /* | |
13 | * This program is free software; you can redistribute it and/or | |
14 | * modify it under the terms of the GNU General Public License | |
15 | * as published by the Free Software Foundation; either version | |
16 | * 2 of the License, or (at your option) any later version. | |
17 | */ | |
18 | ||
19 | /* | |
20 | * Structure of a PCI controller (host bridge) | |
21 | */ | |
22 | struct pci_controller { | |
23 | struct pci_bus *bus; | |
24 | char is_dynamic; | |
25 | void *arch_data; | |
26 | struct list_head list_node; | |
27 | ||
28 | int first_busno; | |
29 | int last_busno; | |
30 | ||
31 | void __iomem *io_base_virt; | |
32 | unsigned long io_base_phys; | |
33 | ||
34 | /* Some machines have a non 1:1 mapping of | |
35 | * the PCI memory space in the CPU bus space | |
36 | */ | |
37 | unsigned long pci_mem_offset; | |
38 | unsigned long pci_io_size; | |
39 | ||
40 | struct pci_ops *ops; | |
41 | volatile unsigned int __iomem *cfg_addr; | |
17a6392d | 42 | volatile void __iomem *cfg_data; |
1da177e4 LT |
43 | |
44 | /* Currently, we limit ourselves to 1 IO range and 3 mem | |
45 | * ranges since the common pci_bus structure can't handle more | |
46 | */ | |
47 | struct resource io_resource; | |
48 | struct resource mem_resources[3]; | |
49 | int global_number; | |
50 | int local_number; | |
51 | unsigned long buid; | |
52 | unsigned long dma_window_base_cur; | |
53 | unsigned long dma_window_size; | |
54 | }; | |
55 | ||
1635317f PM |
56 | /* |
57 | * PCI stuff, for nodes representing PCI devices, pointed to | |
58 | * by device_node->data. | |
59 | */ | |
60 | struct pci_controller; | |
61 | struct iommu_table; | |
62 | ||
63 | struct pci_dn { | |
7684b40c LV |
64 | int busno; /* pci bus number */ |
65 | int bussubno; /* pci subordinate bus number */ | |
66 | int devfn; /* pci device and function number */ | |
67 | int class_code; /* pci device class */ | |
b5166cc2 BH |
68 | |
69 | #ifdef CONFIG_PPC_PSERIES | |
1635317f PM |
70 | int eeh_mode; /* See eeh.h for possible EEH_MODEs */ |
71 | int eeh_config_addr; | |
25e591f6 | 72 | int eeh_pe_config_addr; /* new-style partition endpoint address */ |
1635317f PM |
73 | int eeh_check_count; /* # times driver ignored error */ |
74 | int eeh_freeze_count; /* # times this device froze up. */ | |
b5166cc2 | 75 | #endif |
1635317f PM |
76 | int pci_ext_config_space; /* for pci devices */ |
77 | struct pci_controller *phb; /* for pci devices */ | |
78 | struct iommu_table *iommu_table; /* for phb's or bridges */ | |
79 | struct pci_dev *pcidev; /* back-pointer to the pci device */ | |
80 | struct device_node *node; /* back-pointer to the device_node */ | |
252e75a5 | 81 | #ifdef CONFIG_PPC_ISERIES |
76f9f87f | 82 | struct list_head Device_List; |
b5166cc2 BH |
83 | int Irq; /* Assigned IRQ */ |
84 | int Flags; /* Possible flags(disable/bist)*/ | |
85 | u8 LogicalSlot; /* Hv Slot Index for Tces */ | |
252e75a5 | 86 | #endif |
1635317f PM |
87 | u32 config_space[16]; /* saved PCI config space */ |
88 | }; | |
89 | ||
90 | /* Get the pointer to a device_node's pci_dn */ | |
91 | #define PCI_DN(dn) ((struct pci_dn *) (dn)->data) | |
92 | ||
1da177e4 LT |
93 | struct device_node *fetch_dev_dn(struct pci_dev *dev); |
94 | ||
1635317f PM |
95 | /* Get a device_node from a pci_dev. This code must be fast except |
96 | * in the case where the sysdata is incorrect and needs to be fixed | |
97 | * up (this will only happen once). | |
98 | * In this case the sysdata will have been inherited from a PCI host | |
99 | * bridge or a PCI-PCI bridge further up the tree, so it will point | |
100 | * to a valid struct pci_dn, just not the one we want. | |
1da177e4 LT |
101 | */ |
102 | static inline struct device_node *pci_device_to_OF_node(struct pci_dev *dev) | |
103 | { | |
104 | struct device_node *dn = dev->sysdata; | |
1635317f | 105 | struct pci_dn *pdn = dn->data; |
1da177e4 | 106 | |
1635317f | 107 | if (pdn && pdn->devfn == dev->devfn && pdn->busno == dev->bus->number) |
1da177e4 | 108 | return dn; /* fast path. sysdata is good */ |
1635317f | 109 | return fetch_dev_dn(dev); |
1da177e4 LT |
110 | } |
111 | ||
40ef8cbc PM |
112 | static inline int pci_device_from_OF_node(struct device_node *np, |
113 | u8 *bus, u8 *devfn) | |
114 | { | |
115 | if (!PCI_DN(np)) | |
116 | return -ENODEV; | |
117 | *bus = PCI_DN(np)->busno; | |
118 | *devfn = PCI_DN(np)->devfn; | |
119 | return 0; | |
120 | } | |
121 | ||
1da177e4 LT |
122 | static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus) |
123 | { | |
124 | if (bus->self) | |
125 | return pci_device_to_OF_node(bus->self); | |
126 | else | |
127 | return bus->sysdata; /* Must be root bus (PHB) */ | |
128 | } | |
129 | ||
2bf6a8fa LV |
130 | /** Find the bus corresponding to the indicated device node */ |
131 | struct pci_bus * pcibios_find_pci_bus(struct device_node *dn); | |
132 | ||
1da177e4 | 133 | extern void pci_process_bridge_OF_ranges(struct pci_controller *hose, |
f7abbc19 | 134 | struct device_node *dev, int primary); |
1da177e4 | 135 | |
2bf6a8fa LV |
136 | /** Remove all of the PCI devices under this bus */ |
137 | void pcibios_remove_pci_devices(struct pci_bus *bus); | |
138 | ||
139 | /** Discover new pci devices under this bus, and add them */ | |
140 | void pcibios_add_pci_devices(struct pci_bus * bus); | |
31087d7d | 141 | void pcibios_fixup_new_pci_devices(struct pci_bus *bus, int fix_bus); |
2bf6a8fa | 142 | |
1da177e4 LT |
143 | extern int pcibios_remove_root_bus(struct pci_controller *phb); |
144 | ||
1da177e4 LT |
145 | static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus) |
146 | { | |
147 | struct device_node *busdn = bus->sysdata; | |
148 | ||
149 | BUG_ON(busdn == NULL); | |
1635317f | 150 | return PCI_DN(busdn)->phb; |
1da177e4 LT |
151 | } |
152 | ||
463ce0e1 BH |
153 | extern struct pci_controller* |
154 | pci_find_hose_for_OF_device(struct device_node* node); | |
155 | ||
b5166cc2 BH |
156 | extern struct pci_controller * |
157 | pcibios_alloc_controller(struct device_node *dev); | |
158 | extern void pcibios_free_controller(struct pci_controller *phb); | |
159 | ||
d2dd482b | 160 | #ifdef CONFIG_PCI |
f2c4583a | 161 | extern unsigned long pci_address_to_pio(phys_addr_t address); |
d2dd482b | 162 | #else |
f2c4583a | 163 | static inline unsigned long pci_address_to_pio(phys_addr_t address) |
d2dd482b | 164 | { |
f2c4583a | 165 | return (unsigned long)-1; |
d2dd482b BH |
166 | } |
167 | #endif | |
168 | ||
4267292b PM |
169 | /* Return values for ppc_md.pci_probe_mode function */ |
170 | #define PCI_PROBE_NONE -1 /* Don't look at this bus at all */ | |
171 | #define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */ | |
172 | #define PCI_PROBE_DEVTREE 1 /* Instantiate from device tree */ | |
173 | ||
047ea784 | 174 | #endif /* CONFIG_PPC64 */ |
88ced031 | 175 | #endif /* __KERNEL__ */ |
1da177e4 | 176 | #endif |