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1da177e4 LT |
1 | /* |
2 | * c 2001 PPC 64 Team, IBM Corp | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or | |
5 | * modify it under the terms of the GNU General Public License | |
6 | * as published by the Free Software Foundation; either version | |
7 | * 2 of the License, or (at your option) any later version. | |
8 | */ | |
d387899f SR |
9 | #ifndef _ASM_POWERPC_PPC_PCI_H |
10 | #define _ASM_POWERPC_PPC_PCI_H | |
88ced031 | 11 | #ifdef __KERNEL__ |
1da177e4 LT |
12 | |
13 | #include <linux/pci.h> | |
14 | #include <asm/pci-bridge.h> | |
15 | ||
16 | extern unsigned long isa_io_base; | |
17 | ||
1da177e4 LT |
18 | extern void pci_setup_phb_io(struct pci_controller *hose, int primary); |
19 | extern void pci_setup_phb_io_dynamic(struct pci_controller *hose, int primary); | |
20 | ||
21 | ||
22 | extern struct list_head hose_list; | |
23 | extern int global_phb_number; | |
24 | ||
25 | extern unsigned long find_and_init_phbs(void); | |
26 | ||
27 | extern struct pci_dev *ppc64_isabridge_dev; /* may be NULL if no ISA bus */ | |
28 | ||
ae65a391 LV |
29 | /** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */ |
30 | #define BUID_HI(buid) ((buid) >> 32) | |
31 | #define BUID_LO(buid) ((buid) & 0xffffffff) | |
32 | ||
1da177e4 LT |
33 | /* PCI device_node operations */ |
34 | struct device_node; | |
35 | typedef void *(*traverse_func)(struct device_node *me, void *data); | |
36 | void *traverse_pci_devices(struct device_node *start, traverse_func pre, | |
37 | void *data); | |
38 | ||
39 | void pci_devs_phb_init(void); | |
40 | void pci_devs_phb_init_dynamic(struct pci_controller *phb); | |
92eb4602 | 41 | int setup_phb(struct device_node *dev, struct pci_controller *phb); |
ead83717 | 42 | void __devinit scan_phb(struct pci_controller *hose); |
1da177e4 | 43 | |
dad32bbf | 44 | /* From rtas_pci.h */ |
1da177e4 LT |
45 | void init_pci_config_tokens (void); |
46 | unsigned long get_phb_buid (struct device_node *); | |
47 | ||
dad32bbf JR |
48 | /* From pSeries_pci.h */ |
49 | extern void pSeries_final_fixup(void); | |
50 | extern void pSeries_irq_bus_setup(struct pci_bus *bus); | |
51 | ||
1da177e4 | 52 | extern unsigned long pci_probe_only; |
1da177e4 | 53 | |
6dee3fb9 LV |
54 | /* ---- EEH internal-use-only related routines ---- */ |
55 | #ifdef CONFIG_EEH | |
5d5a0936 LV |
56 | |
57 | void pci_addr_cache_insert_device(struct pci_dev *dev); | |
58 | void pci_addr_cache_remove_device(struct pci_dev *dev); | |
59 | void pci_addr_cache_build(void); | |
60 | struct pci_dev *pci_get_device_by_addr(unsigned long addr); | |
61 | ||
77bd7415 LV |
62 | /** |
63 | * eeh_slot_error_detail -- record and EEH error condition to the log | |
64 | * @severity: 1 if temporary, 2 if permanent failure. | |
65 | * | |
66 | * Obtains the the EEH error details from the RTAS subsystem, | |
67 | * and then logs these details with the RTAS error log system. | |
68 | */ | |
69 | void eeh_slot_error_detail (struct pci_dn *pdn, int severity); | |
70 | ||
6dee3fb9 LV |
71 | /** |
72 | * rtas_set_slot_reset -- unfreeze a frozen slot | |
73 | * | |
74 | * Clear the EEH-frozen condition on a slot. This routine | |
75 | * does this by asserting the PCI #RST line for 1/8th of | |
76 | * a second; this routine will sleep while the adapter is | |
77 | * being reset. | |
b6495c0c LV |
78 | * |
79 | * Returns a non-zero value if the reset failed. | |
6dee3fb9 | 80 | */ |
b6495c0c | 81 | int rtas_set_slot_reset (struct pci_dn *); |
6dee3fb9 | 82 | |
8b553f32 LV |
83 | /** |
84 | * eeh_restore_bars - Restore device configuration info. | |
85 | * | |
86 | * A reset of a PCI device will clear out its config space. | |
87 | * This routines will restore the config space for this | |
88 | * device, and is children, to values previously obtained | |
89 | * from the firmware. | |
90 | */ | |
91 | void eeh_restore_bars(struct pci_dn *); | |
92 | ||
93 | /** | |
94 | * rtas_configure_bridge -- firmware initialization of pci bridge | |
95 | * | |
96 | * Ask the firmware to configure all PCI bridges devices | |
97 | * located behind the indicated node. Required after a | |
98 | * pci device reset. Does essentially the same hing as | |
99 | * eeh_restore_bars, but for brdges, and lets firmware | |
100 | * do the work. | |
101 | */ | |
102 | void rtas_configure_bridge(struct pci_dn *); | |
103 | ||
104 | int rtas_write_config(struct pci_dn *, int where, int size, u32 val); | |
7684b40c | 105 | int rtas_read_config(struct pci_dn *, int where, int size, u32 *val); |
8b553f32 | 106 | |
d9564ad1 LV |
107 | /** |
108 | * mark and clear slots: find "partition endpoint" PE and set or | |
109 | * clear the flags for each subnode of the PE. | |
110 | */ | |
111 | void eeh_mark_slot (struct device_node *dn, int mode_flag); | |
112 | void eeh_clear_slot (struct device_node *dn, int mode_flag); | |
113 | ||
9fb40eb8 LV |
114 | /* Find the associated "Partiationable Endpoint" PE */ |
115 | struct device_node * find_device_pe(struct device_node *dn); | |
116 | ||
6dee3fb9 LV |
117 | #endif |
118 | ||
88ced031 | 119 | #endif /* __KERNEL__ */ |
d387899f | 120 | #endif /* _ASM_POWERPC_PPC_PCI_H */ |