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1da177e4 LT |
1 | /* |
2 | * iommu.h | |
3 | * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation | |
4 | * Rewrite, cleanup: | |
5 | * Copyright (C) 2004 Olof Johansson <olof@austin.ibm.com>, IBM Corporation | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
20 | */ | |
21 | ||
22 | #ifndef _ASM_IOMMU_H | |
23 | #define _ASM_IOMMU_H | |
24 | ||
25 | #include <asm/types.h> | |
26 | #include <linux/spinlock.h> | |
27 | #include <linux/device.h> | |
28 | #include <linux/dma-mapping.h> | |
29 | ||
30 | /* | |
31 | * IOMAP_MAX_ORDER defines the largest contiguous block | |
32 | * of dma (tce) space we can get. IOMAP_MAX_ORDER = 13 | |
33 | * allows up to 2**12 pages (4096 * 4096) = 16 MB | |
34 | */ | |
35 | #define IOMAP_MAX_ORDER 13 | |
36 | ||
37 | /* | |
38 | * Tces come in two formats, one for the virtual bus and a different | |
39 | * format for PCI | |
40 | */ | |
41 | #define TCE_VB 0 | |
42 | #define TCE_PCI 1 | |
43 | ||
44 | /* tce_entry | |
45 | * Used by pSeries (SMP) and iSeries/pSeries LPAR, but there it's | |
46 | * abstracted so layout is irrelevant. | |
47 | */ | |
48 | union tce_entry { | |
49 | unsigned long te_word; | |
50 | struct { | |
51 | unsigned int tb_cacheBits :6; /* Cache hash bits - not used */ | |
52 | unsigned int tb_rsvd :6; | |
53 | unsigned long tb_rpn :40; /* Real page number */ | |
54 | unsigned int tb_valid :1; /* Tce is valid (vb only) */ | |
55 | unsigned int tb_allio :1; /* Tce is valid for all lps (vb only) */ | |
56 | unsigned int tb_lpindex :8; /* LpIndex for user of TCE (vb only) */ | |
57 | unsigned int tb_pciwr :1; /* Write allowed (pci only) */ | |
58 | unsigned int tb_rdwr :1; /* Read allowed (pci), Write allowed (vb) */ | |
59 | } te_bits; | |
60 | #define te_cacheBits te_bits.tb_cacheBits | |
61 | #define te_rpn te_bits.tb_rpn | |
62 | #define te_valid te_bits.tb_valid | |
63 | #define te_allio te_bits.tb_allio | |
64 | #define te_lpindex te_bits.tb_lpindex | |
65 | #define te_pciwr te_bits.tb_pciwr | |
66 | #define te_rdwr te_bits.tb_rdwr | |
67 | }; | |
68 | ||
69 | ||
70 | struct iommu_table { | |
71 | unsigned long it_busno; /* Bus number this table belongs to */ | |
72 | unsigned long it_size; /* Size of iommu table in entries */ | |
73 | unsigned long it_offset; /* Offset into global table */ | |
74 | unsigned long it_base; /* mapped address of tce table */ | |
75 | unsigned long it_index; /* which iommu table this is */ | |
76 | unsigned long it_type; /* type: PCI or Virtual Bus */ | |
77 | unsigned long it_blocksize; /* Entries in each block (cacheline) */ | |
78 | unsigned long it_hint; /* Hint for next alloc */ | |
79 | unsigned long it_largehint; /* Hint for large allocs */ | |
80 | unsigned long it_halfpoint; /* Breaking point for small/large allocs */ | |
81 | spinlock_t it_lock; /* Protects it_map */ | |
82 | unsigned long *it_map; /* A simple allocation bitmap for now */ | |
83 | }; | |
84 | ||
1da177e4 LT |
85 | struct scatterlist; |
86 | ||
87 | #ifdef CONFIG_PPC_MULTIPLATFORM | |
88 | ||
89 | /* Walks all buses and creates iommu tables */ | |
90 | extern void iommu_setup_pSeries(void); | |
91 | extern void iommu_setup_u3(void); | |
92 | ||
93 | /* Frees table for an individual device node */ | |
94 | extern void iommu_free_table(struct device_node *dn); | |
95 | ||
96 | #endif /* CONFIG_PPC_MULTIPLATFORM */ | |
97 | ||
98 | #ifdef CONFIG_PPC_PSERIES | |
99 | ||
100 | /* Creates table for an individual device node */ | |
101 | extern void iommu_devnode_init_pSeries(struct device_node *dn); | |
102 | ||
103 | #endif /* CONFIG_PPC_PSERIES */ | |
104 | ||
105 | #ifdef CONFIG_PPC_ISERIES | |
106 | ||
1da177e4 LT |
107 | struct iSeries_Device_Node; |
108 | /* Creates table for an individual device node */ | |
109 | extern void iommu_devnode_init_iSeries(struct iSeries_Device_Node *dn); | |
110 | ||
111 | #endif /* CONFIG_PPC_ISERIES */ | |
112 | ||
113 | /* Initializes an iommu_table based in values set in the passed-in | |
114 | * structure | |
115 | */ | |
116 | extern struct iommu_table *iommu_init_table(struct iommu_table * tbl); | |
117 | ||
118 | extern int iommu_map_sg(struct device *dev, struct iommu_table *tbl, | |
119 | struct scatterlist *sglist, int nelems, | |
120 | enum dma_data_direction direction); | |
121 | extern void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist, | |
122 | int nelems, enum dma_data_direction direction); | |
123 | ||
124 | extern void *iommu_alloc_coherent(struct iommu_table *tbl, size_t size, | |
dd0fc66f | 125 | dma_addr_t *dma_handle, gfp_t flag); |
1da177e4 LT |
126 | extern void iommu_free_coherent(struct iommu_table *tbl, size_t size, |
127 | void *vaddr, dma_addr_t dma_handle); | |
128 | extern dma_addr_t iommu_map_single(struct iommu_table *tbl, void *vaddr, | |
129 | size_t size, enum dma_data_direction direction); | |
130 | extern void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle, | |
131 | size_t size, enum dma_data_direction direction); | |
132 | ||
133 | extern void iommu_init_early_pSeries(void); | |
134 | extern void iommu_init_early_iSeries(void); | |
135 | extern void iommu_init_early_u3(void); | |
136 | ||
145d01e4 | 137 | #ifdef CONFIG_PCI |
1da177e4 LT |
138 | extern void pci_iommu_init(void); |
139 | extern void pci_direct_iommu_init(void); | |
145d01e4 SR |
140 | #else |
141 | static inline void pci_iommu_init(void) { } | |
142 | #endif | |
1da177e4 LT |
143 | |
144 | extern void alloc_u3_dart_table(void); | |
145 | ||
146 | #endif /* _ASM_IOMMU_H */ |