]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - include/asm-s390/processor.h
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux...
[mirror_ubuntu-artful-kernel.git] / include / asm-s390 / processor.h
CommitLineData
1da177e4
LT
1/*
2 * include/asm-s390/processor.h
3 *
4 * S390 version
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com),
7 * Martin Schwidefsky (schwidefsky@de.ibm.com)
8 *
9 * Derived from "include/asm-i386/processor.h"
10 * Copyright (C) 1994, Linus Torvalds
11 */
12
13#ifndef __ASM_S390_PROCESSOR_H
14#define __ASM_S390_PROCESSOR_H
15
1da177e4
LT
16#include <asm/ptrace.h>
17
18#ifdef __KERNEL__
19/*
20 * Default implementation of macro that returns current
21 * instruction pointer ("program counter").
22 */
94c12cc7 23#define current_text_addr() ({ void *pc; asm("basr %0,0" : "=a" (pc)); pc; })
1da177e4
LT
24
25/*
26 * CPU type and hardware bug flags. Kept separately for each CPU.
27 * Members of this structure are referenced in head.S, so think twice
28 * before touching them. [mj]
29 */
30
31typedef struct
32{
33 unsigned int version : 8;
34 unsigned int ident : 24;
35 unsigned int machine : 16;
36 unsigned int unused : 16;
37} __attribute__ ((packed)) cpuid_t;
38
72960a02
MH
39static inline void get_cpu_id(cpuid_t *ptr)
40{
41 asm volatile("stidp 0(%1)" : "=m" (*ptr) : "a" (ptr));
42}
43
1da177e4
LT
44struct cpuinfo_S390
45{
46 cpuid_t cpu_id;
47 __u16 cpu_addr;
48 __u16 cpu_nr;
49 unsigned long loops_per_jiffy;
50 unsigned long *pgd_quick;
51#ifdef __s390x__
52 unsigned long *pmd_quick;
53#endif /* __s390x__ */
54 unsigned long *pte_quick;
55 unsigned long pgtable_cache_sz;
56};
57
31ee4b2f 58extern void s390_adjust_jiffies(void);
1da177e4 59extern void print_cpu_info(struct cpuinfo_S390 *);
2fc2d1e9 60extern int get_cpu_capability(unsigned int *);
1da177e4 61
1da177e4
LT
62/*
63 * User space process size: 2GB for 31 bit, 4TB for 64 bit.
64 */
65#ifndef __s390x__
66
5a216a20
MS
67#define TASK_SIZE (1UL << 31)
68#define TASK_UNMAPPED_BASE (1UL << 30)
1da177e4
LT
69
70#else /* __s390x__ */
71
5a216a20
MS
72#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk,TIF_31BIT) ? \
73 (1UL << 31) : (1UL << 53))
74#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \
75 (1UL << 30) : (1UL << 41))
76#define TASK_SIZE TASK_SIZE_OF(current)
1da177e4
LT
77
78#endif /* __s390x__ */
79
922a70d3
DH
80#ifdef __KERNEL__
81
5a216a20
MS
82#ifndef __s390x__
83#define STACK_TOP (1UL << 31)
6252d702 84#define STACK_TOP_MAX (1UL << 31)
5a216a20 85#else /* __s390x__ */
6252d702
MS
86#define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
87#define STACK_TOP_MAX (1UL << 42)
5a216a20
MS
88#endif /* __s390x__ */
89
922a70d3
DH
90
91#endif
92
1da177e4
LT
93#define HAVE_ARCH_PICK_MMAP_LAYOUT
94
95typedef struct {
96 __u32 ar4;
97} mm_segment_t;
98
99/*
100 * Thread structure
101 */
102struct thread_struct {
103 s390_fp_regs fp_regs;
104 unsigned int acrs[NUM_ACRS];
105 unsigned long ksp; /* kernel stack pointer */
1da177e4
LT
106 mm_segment_t mm_segment;
107 unsigned long prot_addr; /* address of protection-excep. */
1da177e4
LT
108 unsigned int trap_no;
109 per_struct per_info;
110 /* Used to give failing instruction back to user for ieee exceptions */
111 unsigned long ieee_instruction_pointer;
112 /* pfault_wait is used to block the process on a pfault event */
113 unsigned long pfault_wait;
114};
115
116typedef struct thread_struct thread_struct;
117
118/*
119 * Stack layout of a C stack frame.
120 */
121#ifndef __PACK_STACK
122struct stack_frame {
123 unsigned long back_chain;
124 unsigned long empty1[5];
125 unsigned long gprs[10];
126 unsigned int empty2[8];
127};
128#else
129struct stack_frame {
130 unsigned long empty1[5];
131 unsigned int empty2[8];
132 unsigned long gprs[10];
133 unsigned long back_chain;
134};
135#endif
136
137#define ARCH_MIN_TASKALIGN 8
138
6f3fa3f0
MS
139#define INIT_THREAD { \
140 .ksp = sizeof(init_stack) + (unsigned long) &init_stack, \
141}
1da177e4
LT
142
143/*
144 * Do necessary setup to start up a new thread.
145 */
1da177e4 146#define start_thread(regs, new_psw, new_stackp) do { \
9b241cc8 147 set_fs(USER_DS); \
c1821c2e 148 regs->psw.mask = psw_user_bits; \
1da177e4
LT
149 regs->psw.addr = new_psw | PSW_ADDR_AMODE; \
150 regs->gprs[15] = new_stackp ; \
151} while (0)
152
1da177e4
LT
153/* Forward declaration, a strange C thing */
154struct task_struct;
155struct mm_struct;
df5f8314 156struct seq_file;
1da177e4
LT
157
158/* Free all resources held by a thread. */
159extern void release_thread(struct task_struct *);
160extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
161
162/* Prepare to copy thread state - unlazy all lazy status */
163#define prepare_to_copy(tsk) do { } while (0)
164
165/*
166 * Return saved PC of a blocked thread.
167 */
168extern unsigned long thread_saved_pc(struct task_struct *t);
169
170/*
171 * Print register of task into buffer. Used in fs/proc/array.c.
172 */
df5f8314 173extern void task_show_regs(struct seq_file *m, struct task_struct *task);
1da177e4
LT
174
175extern void show_registers(struct pt_regs *regs);
bb11e3bd 176extern void show_code(struct pt_regs *regs);
1da177e4 177extern void show_trace(struct task_struct *task, unsigned long *sp);
9e74a6b8
CB
178#ifdef CONFIG_64BIT
179extern void show_last_breaking_event(struct pt_regs *regs);
180#else
181static inline void show_last_breaking_event(struct pt_regs *regs)
182{
183}
184#endif
1da177e4
LT
185
186unsigned long get_wchan(struct task_struct *p);
c7584fb6 187#define task_pt_regs(tsk) ((struct pt_regs *) \
30af7120 188 (task_stack_page(tsk) + THREAD_SIZE) - 1)
c7584fb6
AV
189#define KSTK_EIP(tsk) (task_pt_regs(tsk)->psw.addr)
190#define KSTK_ESP(tsk) (task_pt_regs(tsk)->gprs[15])
1da177e4
LT
191
192/*
193 * Give up the time slice of the virtual PU.
194 */
abdba61a
HC
195static inline void cpu_relax(void)
196{
197 if (MACHINE_HAS_DIAG44)
c48e0913
HC
198 asm volatile("diag 0,0,68");
199 barrier();
abdba61a 200}
1da177e4 201
dc74d7f9
HC
202static inline void psw_set_key(unsigned int key)
203{
204 asm volatile("spka 0(%0)" : : "d" (key));
205}
206
77fa2245
HC
207/*
208 * Set PSW to specified value.
209 */
210static inline void __load_psw(psw_t psw)
211{
212#ifndef __s390x__
94c12cc7 213 asm volatile("lpsw 0(%0)" : : "a" (&psw), "m" (psw) : "cc");
77fa2245 214#else
94c12cc7 215 asm volatile("lpswe 0(%0)" : : "a" (&psw), "m" (psw) : "cc");
77fa2245
HC
216#endif
217}
218
1da177e4
LT
219/*
220 * Set PSW mask to specified value, while leaving the
221 * PSW addr pointing to the next instruction.
222 */
223
224static inline void __load_psw_mask (unsigned long mask)
225{
226 unsigned long addr;
1da177e4 227 psw_t psw;
77fa2245 228
1da177e4
LT
229 psw.mask = mask;
230
231#ifndef __s390x__
94c12cc7
MS
232 asm volatile(
233 " basr %0,0\n"
234 "0: ahi %0,1f-0b\n"
235 " st %0,4(%1)\n"
236 " lpsw 0(%1)\n"
1da177e4 237 "1:"
94c12cc7 238 : "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc");
1da177e4 239#else /* __s390x__ */
94c12cc7
MS
240 asm volatile(
241 " larl %0,1f\n"
242 " stg %0,8(%1)\n"
243 " lpswe 0(%1)\n"
1da177e4 244 "1:"
94c12cc7 245 : "=&d" (addr) : "a" (&psw), "m" (psw) : "memory", "cc");
1da177e4
LT
246#endif /* __s390x__ */
247}
248
249/*
250 * Function to stop a processor until an interruption occurred
251 */
252static inline void enabled_wait(void)
253{
77fa2245
HC
254 __load_psw_mask(PSW_BASE_BITS | PSW_MASK_IO | PSW_MASK_EXT |
255 PSW_MASK_MCHECK | PSW_MASK_WAIT | PSW_DEFAULT_KEY);
1da177e4
LT
256}
257
258/*
259 * Function to drop a processor into disabled wait state
260 */
261
262static inline void disabled_wait(unsigned long code)
263{
1da177e4 264 unsigned long ctl_buf;
77fa2245 265 psw_t dw_psw;
1da177e4 266
77fa2245
HC
267 dw_psw.mask = PSW_BASE_BITS | PSW_MASK_WAIT;
268 dw_psw.addr = code;
1da177e4
LT
269 /*
270 * Store status and then load disabled wait psw,
271 * the processor is dead afterwards
272 */
273#ifndef __s390x__
94c12cc7
MS
274 asm volatile(
275 " stctl 0,0,0(%2)\n"
276 " ni 0(%2),0xef\n" /* switch off protection */
277 " lctl 0,0,0(%2)\n"
278 " stpt 0xd8\n" /* store timer */
279 " stckc 0xe0\n" /* store clock comparator */
280 " stpx 0x108\n" /* store prefix register */
281 " stam 0,15,0x120\n" /* store access registers */
282 " std 0,0x160\n" /* store f0 */
283 " std 2,0x168\n" /* store f2 */
284 " std 4,0x170\n" /* store f4 */
285 " std 6,0x178\n" /* store f6 */
286 " stm 0,15,0x180\n" /* store general registers */
287 " stctl 0,15,0x1c0\n" /* store control registers */
288 " oi 0x1c0,0x10\n" /* fake protection bit */
289 " lpsw 0(%1)"
290 : "=m" (ctl_buf)
291 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc");
1da177e4 292#else /* __s390x__ */
94c12cc7
MS
293 asm volatile(
294 " stctg 0,0,0(%2)\n"
295 " ni 4(%2),0xef\n" /* switch off protection */
296 " lctlg 0,0,0(%2)\n"
297 " lghi 1,0x1000\n"
298 " stpt 0x328(1)\n" /* store timer */
299 " stckc 0x330(1)\n" /* store clock comparator */
300 " stpx 0x318(1)\n" /* store prefix register */
301 " stam 0,15,0x340(1)\n"/* store access registers */
302 " stfpc 0x31c(1)\n" /* store fpu control */
303 " std 0,0x200(1)\n" /* store f0 */
304 " std 1,0x208(1)\n" /* store f1 */
305 " std 2,0x210(1)\n" /* store f2 */
306 " std 3,0x218(1)\n" /* store f3 */
307 " std 4,0x220(1)\n" /* store f4 */
308 " std 5,0x228(1)\n" /* store f5 */
309 " std 6,0x230(1)\n" /* store f6 */
310 " std 7,0x238(1)\n" /* store f7 */
311 " std 8,0x240(1)\n" /* store f8 */
312 " std 9,0x248(1)\n" /* store f9 */
313 " std 10,0x250(1)\n" /* store f10 */
314 " std 11,0x258(1)\n" /* store f11 */
315 " std 12,0x260(1)\n" /* store f12 */
316 " std 13,0x268(1)\n" /* store f13 */
317 " std 14,0x270(1)\n" /* store f14 */
318 " std 15,0x278(1)\n" /* store f15 */
319 " stmg 0,15,0x280(1)\n"/* store general registers */
320 " stctg 0,15,0x380(1)\n"/* store control registers */
321 " oi 0x384(1),0x10\n"/* fake protection bit */
322 " lpswe 0(%1)"
323 : "=m" (ctl_buf)
324 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0");
1da177e4
LT
325#endif /* __s390x__ */
326}
327
ab14de6c
HC
328/*
329 * Basic Machine Check/Program Check Handler.
330 */
331
332extern void s390_base_mcck_handler(void);
333extern void s390_base_pgm_handler(void);
334extern void s390_base_ext_handler(void);
335
336extern void (*s390_base_mcck_handler_fn)(void);
337extern void (*s390_base_pgm_handler_fn)(void);
338extern void (*s390_base_ext_handler_fn)(void);
339
1da177e4
LT
340/*
341 * CPU idle notifier chain.
342 */
dce55470
HC
343#define S390_CPU_IDLE 0
344#define S390_CPU_NOT_IDLE 1
1da177e4
LT
345
346struct notifier_block;
347int register_idle_notifier(struct notifier_block *nb);
348int unregister_idle_notifier(struct notifier_block *nb);
349
dfd54cbc
HC
350#define ARCH_LOW_ADDRESS_LIMIT 0x7fffffffUL
351
1da177e4
LT
352#endif
353
de1a3f1c
MS
354/*
355 * Helper macro for exception table entries
356 */
357#ifndef __s390x__
358#define EX_TABLE(_fault,_target) \
359 ".section __ex_table,\"a\"\n" \
360 " .align 4\n" \
361 " .long " #_fault "," #_target "\n" \
362 ".previous\n"
363#else
364#define EX_TABLE(_fault,_target) \
365 ".section __ex_table,\"a\"\n" \
366 " .align 8\n" \
367 " .quad " #_fault "," #_target "\n" \
368 ".previous\n"
369#endif
370
1da177e4 371#endif /* __ASM_S390_PROCESSOR_H */