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1 | /* |
2 | * include/asm-s390/spinlock.h | |
3 | * | |
4 | * S390 version | |
5 | * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation | |
6 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) | |
7 | * | |
8 | * Derived from "include/asm-i386/spinlock.h" | |
9 | */ | |
10 | ||
11 | #ifndef __ASM_SPINLOCK_H | |
12 | #define __ASM_SPINLOCK_H | |
13 | ||
14 | #ifdef __s390x__ | |
15 | /* | |
16 | * Grmph, take care of %&#! user space programs that include | |
17 | * asm/spinlock.h. The diagnose is only available in kernel | |
18 | * context. | |
19 | */ | |
20 | #ifdef __KERNEL__ | |
21 | #include <asm/lowcore.h> | |
22 | #define __DIAG44_INSN "ex" | |
23 | #define __DIAG44_OPERAND __LC_DIAG44_OPCODE | |
24 | #else | |
25 | #define __DIAG44_INSN "#" | |
26 | #define __DIAG44_OPERAND 0 | |
27 | #endif | |
28 | #endif /* __s390x__ */ | |
29 | ||
30 | /* | |
31 | * Simple spin lock operations. There are two variants, one clears IRQ's | |
32 | * on the local processor, one does not. | |
33 | * | |
34 | * We make no fairness assumptions. They have a cost. | |
35 | */ | |
36 | ||
37 | typedef struct { | |
38 | volatile unsigned int lock; | |
39 | #ifdef CONFIG_PREEMPT | |
40 | unsigned int break_lock; | |
41 | #endif | |
42 | } __attribute__ ((aligned (4))) spinlock_t; | |
43 | ||
44 | #define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 } | |
45 | #define spin_lock_init(lp) do { (lp)->lock = 0; } while(0) | |
46 | #define spin_unlock_wait(lp) do { barrier(); } while(((volatile spinlock_t *)(lp))->lock) | |
47 | #define spin_is_locked(x) ((x)->lock != 0) | |
48 | #define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock) | |
49 | ||
50 | extern inline void _raw_spin_lock(spinlock_t *lp) | |
51 | { | |
52 | #ifndef __s390x__ | |
53 | unsigned int reg1, reg2; | |
54 | __asm__ __volatile__(" bras %0,1f\n" | |
55 | "0: diag 0,0,68\n" | |
56 | "1: slr %1,%1\n" | |
57 | " cs %1,%0,0(%3)\n" | |
58 | " jl 0b\n" | |
59 | : "=&d" (reg1), "=&d" (reg2), "=m" (lp->lock) | |
60 | : "a" (&lp->lock), "m" (lp->lock) | |
61 | : "cc", "memory" ); | |
62 | #else /* __s390x__ */ | |
63 | unsigned long reg1, reg2; | |
64 | __asm__ __volatile__(" bras %1,1f\n" | |
65 | "0: " __DIAG44_INSN " 0,%4\n" | |
66 | "1: slr %0,%0\n" | |
67 | " cs %0,%1,0(%3)\n" | |
68 | " jl 0b\n" | |
69 | : "=&d" (reg1), "=&d" (reg2), "=m" (lp->lock) | |
70 | : "a" (&lp->lock), "i" (__DIAG44_OPERAND), | |
71 | "m" (lp->lock) : "cc", "memory" ); | |
72 | #endif /* __s390x__ */ | |
73 | } | |
74 | ||
75 | extern inline int _raw_spin_trylock(spinlock_t *lp) | |
76 | { | |
77 | unsigned long reg; | |
78 | unsigned int result; | |
79 | ||
80 | __asm__ __volatile__(" basr %1,0\n" | |
81 | "0: cs %0,%1,0(%3)" | |
82 | : "=d" (result), "=&d" (reg), "=m" (lp->lock) | |
83 | : "a" (&lp->lock), "m" (lp->lock), "0" (0) | |
84 | : "cc", "memory" ); | |
85 | return !result; | |
86 | } | |
87 | ||
88 | extern inline void _raw_spin_unlock(spinlock_t *lp) | |
89 | { | |
90 | unsigned int old; | |
91 | ||
92 | __asm__ __volatile__("cs %0,%3,0(%4)" | |
93 | : "=d" (old), "=m" (lp->lock) | |
94 | : "0" (lp->lock), "d" (0), "a" (lp) | |
95 | : "cc", "memory" ); | |
96 | } | |
97 | ||
98 | /* | |
99 | * Read-write spinlocks, allowing multiple readers | |
100 | * but only one writer. | |
101 | * | |
102 | * NOTE! it is quite common to have readers in interrupts | |
103 | * but no interrupt writers. For those circumstances we | |
104 | * can "mix" irq-safe locks - any writer needs to get a | |
105 | * irq-safe write-lock, but readers can get non-irqsafe | |
106 | * read-locks. | |
107 | */ | |
108 | typedef struct { | |
109 | volatile unsigned long lock; | |
110 | volatile unsigned long owner_pc; | |
111 | #ifdef CONFIG_PREEMPT | |
112 | unsigned int break_lock; | |
113 | #endif | |
114 | } rwlock_t; | |
115 | ||
116 | #define RW_LOCK_UNLOCKED (rwlock_t) { 0, 0 } | |
117 | ||
118 | #define rwlock_init(x) do { *(x) = RW_LOCK_UNLOCKED; } while(0) | |
119 | ||
120 | /** | |
121 | * read_can_lock - would read_trylock() succeed? | |
122 | * @lock: the rwlock in question. | |
123 | */ | |
124 | #define read_can_lock(x) ((int)(x)->lock >= 0) | |
125 | ||
126 | /** | |
127 | * write_can_lock - would write_trylock() succeed? | |
128 | * @lock: the rwlock in question. | |
129 | */ | |
130 | #define write_can_lock(x) ((x)->lock == 0) | |
131 | ||
132 | #ifndef __s390x__ | |
133 | #define _raw_read_lock(rw) \ | |
134 | asm volatile(" l 2,0(%1)\n" \ | |
135 | " j 1f\n" \ | |
136 | "0: diag 0,0,68\n" \ | |
137 | "1: la 2,0(2)\n" /* clear high (=write) bit */ \ | |
138 | " la 3,1(2)\n" /* one more reader */ \ | |
139 | " cs 2,3,0(%1)\n" /* try to write new value */ \ | |
140 | " jl 0b" \ | |
141 | : "=m" ((rw)->lock) : "a" (&(rw)->lock), \ | |
142 | "m" ((rw)->lock) : "2", "3", "cc", "memory" ) | |
143 | #else /* __s390x__ */ | |
144 | #define _raw_read_lock(rw) \ | |
145 | asm volatile(" lg 2,0(%1)\n" \ | |
146 | " j 1f\n" \ | |
147 | "0: " __DIAG44_INSN " 0,%2\n" \ | |
148 | "1: nihh 2,0x7fff\n" /* clear high (=write) bit */ \ | |
149 | " la 3,1(2)\n" /* one more reader */ \ | |
150 | " csg 2,3,0(%1)\n" /* try to write new value */ \ | |
151 | " jl 0b" \ | |
152 | : "=m" ((rw)->lock) \ | |
153 | : "a" (&(rw)->lock), "i" (__DIAG44_OPERAND), \ | |
154 | "m" ((rw)->lock) : "2", "3", "cc", "memory" ) | |
155 | #endif /* __s390x__ */ | |
156 | ||
157 | #ifndef __s390x__ | |
158 | #define _raw_read_unlock(rw) \ | |
159 | asm volatile(" l 2,0(%1)\n" \ | |
160 | " j 1f\n" \ | |
161 | "0: diag 0,0,68\n" \ | |
162 | "1: lr 3,2\n" \ | |
163 | " ahi 3,-1\n" /* one less reader */ \ | |
164 | " cs 2,3,0(%1)\n" \ | |
165 | " jl 0b" \ | |
166 | : "=m" ((rw)->lock) : "a" (&(rw)->lock), \ | |
167 | "m" ((rw)->lock) : "2", "3", "cc", "memory" ) | |
168 | #else /* __s390x__ */ | |
169 | #define _raw_read_unlock(rw) \ | |
170 | asm volatile(" lg 2,0(%1)\n" \ | |
171 | " j 1f\n" \ | |
172 | "0: " __DIAG44_INSN " 0,%2\n" \ | |
173 | "1: lgr 3,2\n" \ | |
174 | " bctgr 3,0\n" /* one less reader */ \ | |
175 | " csg 2,3,0(%1)\n" \ | |
176 | " jl 0b" \ | |
177 | : "=m" ((rw)->lock) \ | |
178 | : "a" (&(rw)->lock), "i" (__DIAG44_OPERAND), \ | |
179 | "m" ((rw)->lock) : "2", "3", "cc", "memory" ) | |
180 | #endif /* __s390x__ */ | |
181 | ||
182 | #ifndef __s390x__ | |
183 | #define _raw_write_lock(rw) \ | |
184 | asm volatile(" lhi 3,1\n" \ | |
185 | " sll 3,31\n" /* new lock value = 0x80000000 */ \ | |
186 | " j 1f\n" \ | |
187 | "0: diag 0,0,68\n" \ | |
188 | "1: slr 2,2\n" /* old lock value must be 0 */ \ | |
189 | " cs 2,3,0(%1)\n" \ | |
190 | " jl 0b" \ | |
191 | : "=m" ((rw)->lock) : "a" (&(rw)->lock), \ | |
192 | "m" ((rw)->lock) : "2", "3", "cc", "memory" ) | |
193 | #else /* __s390x__ */ | |
194 | #define _raw_write_lock(rw) \ | |
195 | asm volatile(" llihh 3,0x8000\n" /* new lock value = 0x80...0 */ \ | |
196 | " j 1f\n" \ | |
197 | "0: " __DIAG44_INSN " 0,%2\n" \ | |
198 | "1: slgr 2,2\n" /* old lock value must be 0 */ \ | |
199 | " csg 2,3,0(%1)\n" \ | |
200 | " jl 0b" \ | |
201 | : "=m" ((rw)->lock) \ | |
202 | : "a" (&(rw)->lock), "i" (__DIAG44_OPERAND), \ | |
203 | "m" ((rw)->lock) : "2", "3", "cc", "memory" ) | |
204 | #endif /* __s390x__ */ | |
205 | ||
206 | #ifndef __s390x__ | |
207 | #define _raw_write_unlock(rw) \ | |
208 | asm volatile(" slr 3,3\n" /* new lock value = 0 */ \ | |
209 | " j 1f\n" \ | |
210 | "0: diag 0,0,68\n" \ | |
211 | "1: lhi 2,1\n" \ | |
212 | " sll 2,31\n" /* old lock value must be 0x80000000 */ \ | |
213 | " cs 2,3,0(%1)\n" \ | |
214 | " jl 0b" \ | |
215 | : "=m" ((rw)->lock) : "a" (&(rw)->lock), \ | |
216 | "m" ((rw)->lock) : "2", "3", "cc", "memory" ) | |
217 | #else /* __s390x__ */ | |
218 | #define _raw_write_unlock(rw) \ | |
219 | asm volatile(" slgr 3,3\n" /* new lock value = 0 */ \ | |
220 | " j 1f\n" \ | |
221 | "0: " __DIAG44_INSN " 0,%2\n" \ | |
222 | "1: llihh 2,0x8000\n" /* old lock value must be 0x8..0 */\ | |
223 | " csg 2,3,0(%1)\n" \ | |
224 | " jl 0b" \ | |
225 | : "=m" ((rw)->lock) \ | |
226 | : "a" (&(rw)->lock), "i" (__DIAG44_OPERAND), \ | |
227 | "m" ((rw)->lock) : "2", "3", "cc", "memory" ) | |
228 | #endif /* __s390x__ */ | |
229 | ||
230 | #define _raw_read_trylock(lock) generic_raw_read_trylock(lock) | |
231 | ||
232 | extern inline int _raw_write_trylock(rwlock_t *rw) | |
233 | { | |
234 | unsigned long result, reg; | |
235 | ||
236 | __asm__ __volatile__( | |
237 | #ifndef __s390x__ | |
238 | " lhi %1,1\n" | |
239 | " sll %1,31\n" | |
240 | " cs %0,%1,0(%3)" | |
241 | #else /* __s390x__ */ | |
242 | " llihh %1,0x8000\n" | |
243 | "0: csg %0,%1,0(%3)\n" | |
244 | #endif /* __s390x__ */ | |
245 | : "=d" (result), "=&d" (reg), "=m" (rw->lock) | |
246 | : "a" (&rw->lock), "m" (rw->lock), "0" (0UL) | |
247 | : "cc", "memory" ); | |
248 | return result == 0; | |
249 | } | |
250 | ||
251 | #endif /* __ASM_SPINLOCK_H */ |