[mirror_ubuntu-zesty-kernel.git] / include / asm-sh / processor.h

/*
 * include/asm-sh/processor.h
 *
 * Copyright (C) 1999, 2000  Niibe Yutaka
 * Copyright (C) 2002, 2003  Paul Mundt
 */

#ifndef __ASM_SH_PROCESSOR_H
#define __ASM_SH_PROCESSOR_H
#ifdef __KERNEL__

#include <asm/page.h>
#include <asm/types.h>
#include <asm/cache.h>
#include <asm/ptrace.h>

/*
 * Default implementation of macro that returns current
 * instruction pointer ("program counter").
 */
#define current_text_addr() ({ void *pc; __asm__("mova	1f, %0\n1:":"=z" (pc)); pc; })

/* Core Processor Version Register */
#define CCN_PVR		0xff000030
#define CCN_CVR		0xff000040
#define CCN_PRR		0xff000044

/*
 *  CPU type and hardware bug flags. Kept separately for each CPU.
 *
 *  Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry
 *  in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c
 *  for parsing the subtype in get_cpu_subtype().
 */
enum cpu_type {
	/* SH-2 types */
	CPU_SH7604,

	/* SH-3 types */
	CPU_SH7705, CPU_SH7707,  CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
	CPU_SH7709, CPU_SH7709A, CPU_SH7729, CPU_SH7300,

	/* SH-4 types */
	CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
	CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501,
	CPU_SH73180, CPU_SH7770, CPU_SH7780, CPU_SH7781,

	/* Unknown subtype */
	CPU_SH_NONE
};

struct sh_cpuinfo {
	enum cpu_type type;
	unsigned long loops_per_jiffy;

	struct cache_info icache;
	struct cache_info dcache;

	unsigned long flags;
};

extern struct sh_cpuinfo boot_cpu_data;

#ifdef CONFIG_SMP
extern struct sh_cpuinfo cpu_data[];
#define current_cpu_data cpu_data[smp_processor_id()]
#else
#define cpu_data (&boot_cpu_data)
#define current_cpu_data boot_cpu_data
#endif

/*
 * User space process size: 2GB.
 *
 * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
 */
#define TASK_SIZE	0x7c000000UL

/* This decides where the kernel will search for a free chunk of vm
 * space during mmap's.
 */
#define TASK_UNMAPPED_BASE	(TASK_SIZE / 3)

/*
 * Bit of SR register
 *
 * FD-bit:
 *     When it's set, it means the processor doesn't have right to use FPU,
 *     and it results exception when the floating operation is executed.
 *
 * IMASK-bit:
 *     Interrupt level mask
 */
#define SR_FD		0x00008000
#define SR_DSP		0x00001000
#define SR_IMASK	0x000000f0

/*
 * FPU structure and data
 */

struct sh_fpu_hard_struct {
	unsigned long fp_regs[16];
	unsigned long xfp_regs[16];
	unsigned long fpscr;
	unsigned long fpul;

	long status; /* software status information */
};

/* Dummy fpu emulator  */
struct sh_fpu_soft_struct {
	unsigned long fp_regs[16];
	unsigned long xfp_regs[16];
	unsigned long fpscr;
	unsigned long fpul;

	unsigned char lookahead;
	unsigned long entry_pc;
};

union sh_fpu_union {
	struct sh_fpu_hard_struct hard;
	struct sh_fpu_soft_struct soft;
};

/*
 * Processor flags
 */

#define CPU_HAS_FPU		0x0001	/* Hardware FPU support */
#define CPU_HAS_P2_FLUSH_BUG	0x0002	/* Need to flush the cache in P2 area */
#define CPU_HAS_MMU_PAGE_ASSOC	0x0004	/* SH3: TLB way selection bit support */
#define CPU_HAS_DSP		0x0008	/* SH-DSP: DSP support */
#define CPU_HAS_PERF_COUNTER	0x0010	/* Hardware performance counters */
#define CPU_HAS_PTEA		0x0020	/* PTEA register */

struct thread_struct {
	unsigned long sp;
	unsigned long pc;

	unsigned long trap_no, error_code;
	unsigned long address;
	/* Hardware debugging registers may come here */
	unsigned long ubc_pc;

	/* floating point info */
	union sh_fpu_union fpu;
};

/* Count of active tasks with UBC settings */
extern int ubc_usercnt;

#define INIT_THREAD  {						\
	sizeof(init_stack) + (long) &init_stack, /* sp */	\
	0,					 /* pc */	\
	0, 0,							\
	0,							\
	0,							\
	{{{0,}},}				/* fpu state */	\
}

/*
 * Do necessary setup to start up a newly executed thread.
 */
#define start_thread(regs, new_pc, new_sp)	 \
	set_fs(USER_DS);			 \
	regs->pr = 0;				 \
	regs->sr = SR_FD;	/* User mode. */ \
	regs->pc = new_pc;			 \
	regs->regs[15] = new_sp

/* Forward declaration, a strange C thing */
struct task_struct;
struct mm_struct;

/* Free all resources held by a thread. */
extern void release_thread(struct task_struct *);

/* Prepare to copy thread state - unlazy all lazy status */
#define prepare_to_copy(tsk)	do { } while (0)

/*
 * create a kernel thread without removing it from tasklists
 */
extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);

/* Copy and release all segment info associated with a VM */
#define copy_segments(p, mm)	do { } while(0)
#define release_segments(mm)	do { } while(0)

/*
 * FPU lazy state save handling.
 */

static __inline__ void disable_fpu(void)
{
	unsigned long __dummy;

	/* Set FD flag in SR */
	__asm__ __volatile__("stc	sr, %0\n\t"
			     "or	%1, %0\n\t"
			     "ldc	%0, sr"
			     : "=&r" (__dummy)
			     : "r" (SR_FD));
}

static __inline__ void enable_fpu(void)
{
	unsigned long __dummy;

	/* Clear out FD flag in SR */
	__asm__ __volatile__("stc	sr, %0\n\t"
			     "and	%1, %0\n\t"
			     "ldc	%0, sr"
			     : "=&r" (__dummy)
			     : "r" (~SR_FD));
}

static __inline__ void release_fpu(struct pt_regs *regs)
{
	regs->sr |= SR_FD;
}

static __inline__ void grab_fpu(struct pt_regs *regs)
{
	regs->sr &= ~SR_FD;
}

#ifdef CONFIG_CPU_SH4
extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs);
#else
#define save_fpu(tsk)	do { } while (0)
#endif

#define unlazy_fpu(tsk, regs) do {			\
	if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) {	\
		save_fpu(tsk, regs);			\
	}						\
} while (0)

#define clear_fpu(tsk, regs) do {				\
	if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) {		\
		clear_tsk_thread_flag(tsk, TIF_USEDFPU);	\
		release_fpu(regs);				\
	}							\
} while (0)

/* Double presision, NANS as NANS, rounding to nearest, no exceptions */
#define FPSCR_INIT  0x00080000

#define	FPSCR_CAUSE_MASK	0x0001f000	/* Cause bits */
#define	FPSCR_FLAG_MASK		0x0000007c	/* Flag bits */

/*
 * Return saved PC of a blocked thread.
 */
#define thread_saved_pc(tsk)	(tsk->thread.pc)

extern unsigned long get_wchan(struct task_struct *p);

#define KSTK_EIP(tsk)  ((tsk)->thread.pc)
#define KSTK_ESP(tsk)  ((tsk)->thread.sp)

#define cpu_sleep()	__asm__ __volatile__ ("sleep" : : : "memory")
#define cpu_relax()	do { } while (0)

#endif /* __KERNEL__ */
#endif /* __ASM_SH_PROCESSOR_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* include/asm-sh/processor.h
	3	*
	4	* Copyright (C) 1999, 2000 Niibe Yutaka
	5	* Copyright (C) 2002, 2003 Paul Mundt
	6	*/
	7
	8	#ifndef __ASM_SH_PROCESSOR_H
	9	#define __ASM_SH_PROCESSOR_H
	10	#ifdef __KERNEL__
	11
	12	#include <asm/page.h>
	13	#include <asm/types.h>
	14	#include <asm/cache.h>
1da177e4 LT	15	#include <asm/ptrace.h>
	16
	17	/*
	18	* Default implementation of macro that returns current
	19	* instruction pointer ("program counter").
	20	*/
	21	#define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; })
	22
	23	/* Core Processor Version Register */
	24	#define CCN_PVR 0xff000030
	25	#define CCN_CVR 0xff000040
	26	#define CCN_PRR 0xff000044
	27
	28	/*
	29	* CPU type and hardware bug flags. Kept separately for each CPU.
	30	*
	31	* Each one of these also needs a CONFIG_CPU_SUBTYPE_xxx entry
de02797a	32	* in arch/sh/mm/Kconfig, as well as an entry in arch/sh/kernel/setup.c
1da177e4 LT	33	* for parsing the subtype in get_cpu_subtype().
	34	*/
	35	enum cpu_type {
	36	/* SH-2 types */
	37	CPU_SH7604,
	38
	39	/* SH-3 types */
	40	CPU_SH7705, CPU_SH7707, CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
	41	CPU_SH7709, CPU_SH7709A, CPU_SH7729, CPU_SH7300,
	42
	43	/* SH-4 types */
	44	CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
	45	CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501,
de02797a	46	CPU_SH73180, CPU_SH7770, CPU_SH7780, CPU_SH7781,
1da177e4 LT	47
	48	/* Unknown subtype */
	49	CPU_SH_NONE
	50	};
	51
	52	struct sh_cpuinfo {
	53	enum cpu_type type;
1da177e4 LT	54	unsigned long loops_per_jiffy;
1da177e4 LT	55
1da177e4 LT	56	struct cache_info icache;
	57	struct cache_info dcache;
	58
	59	unsigned long flags;
	60	};
	61
	62	extern struct sh_cpuinfo boot_cpu_data;
	63
	64	#ifdef CONFIG_SMP
	65	extern struct sh_cpuinfo cpu_data[];
	66	#define current_cpu_data cpu_data[smp_processor_id()]
	67	#else
	68	#define cpu_data (&boot_cpu_data)
	69	#define current_cpu_data boot_cpu_data
	70	#endif
	71
	72	/*
	73	* User space process size: 2GB.
	74	*
	75	* Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
	76	*/
	77	#define TASK_SIZE 0x7c000000UL
	78
	79	/* This decides where the kernel will search for a free chunk of vm
	80	* space during mmap's.
	81	*/
	82	#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
	83
	84	/*
	85	* Bit of SR register
	86	*
	87	* FD-bit:
	88	* When it's set, it means the processor doesn't have right to use FPU,
	89	* and it results exception when the floating operation is executed.
	90	*
	91	* IMASK-bit:
	92	* Interrupt level mask
	93	*/
	94	#define SR_FD 0x00008000
	95	#define SR_DSP 0x00001000
	96	#define SR_IMASK 0x000000f0
	97
	98	/*
	99	* FPU structure and data
	100	*/
	101
	102	struct sh_fpu_hard_struct {
	103	unsigned long fp_regs[16];
	104	unsigned long xfp_regs[16];
	105	unsigned long fpscr;
	106	unsigned long fpul;
	107
	108	long status; /* software status information */
	109	};
	110
	111	/* Dummy fpu emulator */
	112	struct sh_fpu_soft_struct {
	113	unsigned long fp_regs[16];
	114	unsigned long xfp_regs[16];
	115	unsigned long fpscr;
	116	unsigned long fpul;
	117
	118	unsigned char lookahead;
	119	unsigned long entry_pc;
120	};
121
122	union sh_fpu_union {
123	struct sh_fpu_hard_struct hard;
124	struct sh_fpu_soft_struct soft;
125	};
126
de02797a	127	/*
1da177e4 LT	128	* Processor flags
	129	*/
	130
	131	#define CPU_HAS_FPU 0x0001 /* Hardware FPU support */
	132	#define CPU_HAS_P2_FLUSH_BUG 0x0002 /* Need to flush the cache in P2 area */
	133	#define CPU_HAS_MMU_PAGE_ASSOC 0x0004 /* SH3: TLB way selection bit support */
	134	#define CPU_HAS_DSP 0x0008 /* SH-DSP: DSP support */
	135	#define CPU_HAS_PERF_COUNTER 0x0010 /* Hardware performance counters */
de02797a	136	#define CPU_HAS_PTEA 0x0020 /* PTEA register */
1da177e4 LT	137
	138	struct thread_struct {
	139	unsigned long sp;
	140	unsigned long pc;
	141
	142	unsigned long trap_no, error_code;
	143	unsigned long address;
	144	/* Hardware debugging registers may come here */
	145	unsigned long ubc_pc;
	146
	147	/* floating point info */
	148	union sh_fpu_union fpu;
	149	};
	150
	151	/* Count of active tasks with UBC settings */
	152	extern int ubc_usercnt;
	153
	154	#define INIT_THREAD { \
	155	sizeof(init_stack) + (long) &init_stack, /* sp */ \
	156	0, /* pc */ \
de02797a PM	157	0, 0, \
	158	0, \
	159	0, \
	160	{{{0,}},} /* fpu state */ \
1da177e4 LT	161	}
	162
	163	/*
	164	* Do necessary setup to start up a newly executed thread.
	165	*/
	166	#define start_thread(regs, new_pc, new_sp) \
	167	set_fs(USER_DS); \
de02797a	168	regs->pr = 0; \
1da177e4 LT	169	regs->sr = SR_FD; /* User mode. */ \
	170	regs->pc = new_pc; \
	171	regs->regs[15] = new_sp
	172
	173	/* Forward declaration, a strange C thing */
	174	struct task_struct;
	175	struct mm_struct;
	176
	177	/* Free all resources held by a thread. */
	178	extern void release_thread(struct task_struct *);
	179
	180	/* Prepare to copy thread state - unlazy all lazy status */
	181	#define prepare_to_copy(tsk) do { } while (0)
	182
	183	/*
	184	* create a kernel thread without removing it from tasklists
	185	*/
	186	extern int kernel_thread(int (fn)(void ), void * arg, unsigned long flags);
	187
	188	/* Copy and release all segment info associated with a VM */
	189	#define copy_segments(p, mm) do { } while(0)
	190	#define release_segments(mm) do { } while(0)
	191
	192	/*
	193	* FPU lazy state save handling.
	194	*/
	195
	196	static __inline__ void disable_fpu(void)
	197	{
	198	unsigned long __dummy;
	199
	200	/* Set FD flag in SR */
	201	__asm__ __volatile__("stc sr, %0\n\t"
	202	"or %1, %0\n\t"
	203	"ldc %0, sr"
	204	: "=&r" (__dummy)
	205	: "r" (SR_FD));
	206	}
	207
	208	static __inline__ void enable_fpu(void)
	209	{
	210	unsigned long __dummy;
	211
	212	/* Clear out FD flag in SR */
	213	__asm__ __volatile__("stc sr, %0\n\t"
	214	"and %1, %0\n\t"
	215	"ldc %0, sr"
	216	: "=&r" (__dummy)
	217	: "r" (~SR_FD));
	218	}
	219
	220	static __inline__ void release_fpu(struct pt_regs *regs)
	221	{
	222	regs->sr \|= SR_FD;
	223	}
	224
	225	static __inline__ void grab_fpu(struct pt_regs *regs)
	226	{
	227	regs->sr &= ~SR_FD;
	228	}
	229
	230	#ifdef CONFIG_CPU_SH4
	231	extern void save_fpu(struct task_struct __tsk, struct pt_regs regs);
	232	#else
233	#define save_fpu(tsk) do { } while (0)
234	#endif
235
de02797a	236	#define unlazy_fpu(tsk, regs) do { \
1da177e4	237	if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
de02797a	238	save_fpu(tsk, regs); \
1da177e4 LT	239	} \
	240	} while (0)
	241
de02797a PM	242	#define clear_fpu(tsk, regs) do { \
	243	if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
	244	clear_tsk_thread_flag(tsk, TIF_USEDFPU); \
	245	release_fpu(regs); \
1da177e4 LT	246	} \
	247	} while (0)
	248
	249	/* Double presision, NANS as NANS, rounding to nearest, no exceptions */
	250	#define FPSCR_INIT 0x00080000
	251
	252	#define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
	253	#define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
	254
	255	/*
	256	* Return saved PC of a blocked thread.
	257	*/
	258	#define thread_saved_pc(tsk) (tsk->thread.pc)
	259
	260	extern unsigned long get_wchan(struct task_struct *p);
	261
	262	#define KSTK_EIP(tsk) ((tsk)->thread.pc)
	263	#define KSTK_ESP(tsk) ((tsk)->thread.sp)
	264
	265	#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
	266	#define cpu_relax() do { } while (0)
	267
	268	#endif /* __KERNEL__ */
	269	#endif /* __ASM_SH_PROCESSOR_H */