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1 | /* $Id: bitops.h,v 1.67 2001/11/19 18:36:34 davem Exp $ |
2 | * bitops.h: Bit string operations on the Sparc. | |
3 | * | |
4 | * Copyright 1995 David S. Miller (davem@caip.rutgers.edu) | |
5 | * Copyright 1996 Eddie C. Dost (ecd@skynet.be) | |
6 | * Copyright 2001 Anton Blanchard (anton@samba.org) | |
7 | */ | |
8 | ||
9 | #ifndef _SPARC_BITOPS_H | |
10 | #define _SPARC_BITOPS_H | |
11 | ||
12 | #include <linux/compiler.h> | |
13 | #include <asm/byteorder.h> | |
14 | ||
15 | #ifdef __KERNEL__ | |
16 | ||
8a8b836b DM |
17 | extern unsigned long ___set_bit(unsigned long *addr, unsigned long mask); |
18 | extern unsigned long ___clear_bit(unsigned long *addr, unsigned long mask); | |
19 | extern unsigned long ___change_bit(unsigned long *addr, unsigned long mask); | |
20 | ||
1da177e4 LT |
21 | /* |
22 | * Set bit 'nr' in 32-bit quantity at address 'addr' where bit '0' | |
23 | * is in the highest of the four bytes and bit '31' is the high bit | |
24 | * within the first byte. Sparc is BIG-Endian. Unless noted otherwise | |
25 | * all bit-ops return 0 if bit was previously clear and != 0 otherwise. | |
26 | */ | |
27 | static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *addr) | |
28 | { | |
8a8b836b | 29 | unsigned long *ADDR, mask; |
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30 | |
31 | ADDR = ((unsigned long *) addr) + (nr >> 5); | |
32 | mask = 1 << (nr & 31); | |
33 | ||
8a8b836b | 34 | return ___set_bit(ADDR, mask) != 0; |
1da177e4 LT |
35 | } |
36 | ||
37 | static inline void set_bit(unsigned long nr, volatile unsigned long *addr) | |
38 | { | |
8a8b836b | 39 | unsigned long *ADDR, mask; |
1da177e4 LT |
40 | |
41 | ADDR = ((unsigned long *) addr) + (nr >> 5); | |
42 | mask = 1 << (nr & 31); | |
43 | ||
8a8b836b | 44 | (void) ___set_bit(ADDR, mask); |
1da177e4 LT |
45 | } |
46 | ||
47 | static inline int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr) | |
48 | { | |
8a8b836b | 49 | unsigned long *ADDR, mask; |
1da177e4 LT |
50 | |
51 | ADDR = ((unsigned long *) addr) + (nr >> 5); | |
52 | mask = 1 << (nr & 31); | |
53 | ||
8a8b836b | 54 | return ___clear_bit(ADDR, mask) != 0; |
1da177e4 LT |
55 | } |
56 | ||
57 | static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) | |
58 | { | |
8a8b836b | 59 | unsigned long *ADDR, mask; |
1da177e4 LT |
60 | |
61 | ADDR = ((unsigned long *) addr) + (nr >> 5); | |
62 | mask = 1 << (nr & 31); | |
63 | ||
8a8b836b | 64 | (void) ___clear_bit(ADDR, mask); |
1da177e4 LT |
65 | } |
66 | ||
67 | static inline int test_and_change_bit(unsigned long nr, volatile unsigned long *addr) | |
68 | { | |
8a8b836b | 69 | unsigned long *ADDR, mask; |
1da177e4 LT |
70 | |
71 | ADDR = ((unsigned long *) addr) + (nr >> 5); | |
72 | mask = 1 << (nr & 31); | |
73 | ||
8a8b836b | 74 | return ___change_bit(ADDR, mask) != 0; |
1da177e4 LT |
75 | } |
76 | ||
77 | static inline void change_bit(unsigned long nr, volatile unsigned long *addr) | |
78 | { | |
8a8b836b | 79 | unsigned long *ADDR, mask; |
1da177e4 LT |
80 | |
81 | ADDR = ((unsigned long *) addr) + (nr >> 5); | |
82 | mask = 1 << (nr & 31); | |
83 | ||
8a8b836b | 84 | (void) ___change_bit(ADDR, mask); |
1da177e4 LT |
85 | } |
86 | ||
d59288b7 | 87 | #include <asm-generic/bitops/non-atomic.h> |
1da177e4 LT |
88 | |
89 | #define smp_mb__before_clear_bit() do { } while(0) | |
90 | #define smp_mb__after_clear_bit() do { } while(0) | |
91 | ||
d59288b7 AM |
92 | #include <asm-generic/bitops/ffz.h> |
93 | #include <asm-generic/bitops/__ffs.h> | |
94 | #include <asm-generic/bitops/sched.h> | |
95 | #include <asm-generic/bitops/ffs.h> | |
96 | #include <asm-generic/bitops/fls.h> | |
97 | #include <asm-generic/bitops/fls64.h> | |
98 | #include <asm-generic/bitops/hweight.h> | |
99 | #include <asm-generic/bitops/find.h> | |
100 | #include <asm-generic/bitops/ext2-non-atomic.h> | |
101 | #include <asm-generic/bitops/ext2-atomic.h> | |
102 | #include <asm-generic/bitops/minix.h> | |
1da177e4 LT |
103 | |
104 | #endif /* __KERNEL__ */ | |
105 | ||
106 | #endif /* defined(_SPARC_BITOPS_H) */ |