]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* spinlock.h: 32-bit Sparc spinlock support. |
2 | * | |
3 | * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) | |
4 | */ | |
5 | ||
6 | #ifndef __SPARC_SPINLOCK_H | |
7 | #define __SPARC_SPINLOCK_H | |
8 | ||
9 | #include <linux/threads.h> /* For NR_CPUS */ | |
10 | ||
11 | #ifndef __ASSEMBLY__ | |
12 | ||
13 | #include <asm/psr.h> | |
14 | ||
15 | #ifdef CONFIG_DEBUG_SPINLOCK | |
16 | struct _spinlock_debug { | |
17 | unsigned char lock; | |
18 | unsigned long owner_pc; | |
19 | #ifdef CONFIG_PREEMPT | |
20 | unsigned int break_lock; | |
21 | #endif | |
22 | }; | |
23 | typedef struct _spinlock_debug spinlock_t; | |
24 | ||
25 | #define SPIN_LOCK_UNLOCKED (spinlock_t) { 0, 0 } | |
26 | #define spin_lock_init(lp) do { *(lp)= SPIN_LOCK_UNLOCKED; } while(0) | |
27 | #define spin_is_locked(lp) (*((volatile unsigned char *)(&((lp)->lock))) != 0) | |
28 | #define spin_unlock_wait(lp) do { barrier(); } while(*(volatile unsigned char *)(&(lp)->lock)) | |
29 | ||
30 | extern void _do_spin_lock(spinlock_t *lock, char *str); | |
31 | extern int _spin_trylock(spinlock_t *lock); | |
32 | extern void _do_spin_unlock(spinlock_t *lock); | |
33 | ||
34 | #define _raw_spin_trylock(lp) _spin_trylock(lp) | |
35 | #define _raw_spin_lock(lock) _do_spin_lock(lock, "spin_lock") | |
36 | #define _raw_spin_unlock(lock) _do_spin_unlock(lock) | |
37 | ||
38 | struct _rwlock_debug { | |
39 | volatile unsigned int lock; | |
40 | unsigned long owner_pc; | |
41 | unsigned long reader_pc[NR_CPUS]; | |
42 | #ifdef CONFIG_PREEMPT | |
43 | unsigned int break_lock; | |
44 | #endif | |
45 | }; | |
46 | typedef struct _rwlock_debug rwlock_t; | |
47 | ||
48 | #define RW_LOCK_UNLOCKED (rwlock_t) { 0, 0, {0} } | |
49 | ||
50 | #define rwlock_init(lp) do { *(lp)= RW_LOCK_UNLOCKED; } while(0) | |
51 | ||
52 | extern void _do_read_lock(rwlock_t *rw, char *str); | |
53 | extern void _do_read_unlock(rwlock_t *rw, char *str); | |
54 | extern void _do_write_lock(rwlock_t *rw, char *str); | |
55 | extern void _do_write_unlock(rwlock_t *rw); | |
56 | ||
57 | #define _raw_read_lock(lock) \ | |
58 | do { unsigned long flags; \ | |
59 | local_irq_save(flags); \ | |
60 | _do_read_lock(lock, "read_lock"); \ | |
61 | local_irq_restore(flags); \ | |
62 | } while(0) | |
63 | ||
64 | #define _raw_read_unlock(lock) \ | |
65 | do { unsigned long flags; \ | |
66 | local_irq_save(flags); \ | |
67 | _do_read_unlock(lock, "read_unlock"); \ | |
68 | local_irq_restore(flags); \ | |
69 | } while(0) | |
70 | ||
71 | #define _raw_write_lock(lock) \ | |
72 | do { unsigned long flags; \ | |
73 | local_irq_save(flags); \ | |
74 | _do_write_lock(lock, "write_lock"); \ | |
75 | local_irq_restore(flags); \ | |
76 | } while(0) | |
77 | ||
78 | #define _raw_write_unlock(lock) \ | |
79 | do { unsigned long flags; \ | |
80 | local_irq_save(flags); \ | |
81 | _do_write_unlock(lock); \ | |
82 | local_irq_restore(flags); \ | |
83 | } while(0) | |
84 | ||
85 | #else /* !CONFIG_DEBUG_SPINLOCK */ | |
86 | ||
87 | typedef struct { | |
88 | unsigned char lock; | |
89 | #ifdef CONFIG_PREEMPT | |
90 | unsigned int break_lock; | |
91 | #endif | |
92 | } spinlock_t; | |
93 | ||
94 | #define SPIN_LOCK_UNLOCKED (spinlock_t) { 0 } | |
95 | ||
96 | #define spin_lock_init(lock) (*((unsigned char *)(lock)) = 0) | |
97 | #define spin_is_locked(lock) (*((volatile unsigned char *)(lock)) != 0) | |
98 | ||
99 | #define spin_unlock_wait(lock) \ | |
100 | do { \ | |
101 | barrier(); \ | |
102 | } while(*((volatile unsigned char *)lock)) | |
103 | ||
104 | extern __inline__ void _raw_spin_lock(spinlock_t *lock) | |
105 | { | |
106 | __asm__ __volatile__( | |
107 | "\n1:\n\t" | |
108 | "ldstub [%0], %%g2\n\t" | |
109 | "orcc %%g2, 0x0, %%g0\n\t" | |
110 | "bne,a 2f\n\t" | |
111 | " ldub [%0], %%g2\n\t" | |
112 | ".subsection 2\n" | |
113 | "2:\n\t" | |
114 | "orcc %%g2, 0x0, %%g0\n\t" | |
115 | "bne,a 2b\n\t" | |
116 | " ldub [%0], %%g2\n\t" | |
117 | "b,a 1b\n\t" | |
118 | ".previous\n" | |
119 | : /* no outputs */ | |
120 | : "r" (lock) | |
121 | : "g2", "memory", "cc"); | |
122 | } | |
123 | ||
124 | extern __inline__ int _raw_spin_trylock(spinlock_t *lock) | |
125 | { | |
126 | unsigned int result; | |
127 | __asm__ __volatile__("ldstub [%1], %0" | |
128 | : "=r" (result) | |
129 | : "r" (lock) | |
130 | : "memory"); | |
131 | return (result == 0); | |
132 | } | |
133 | ||
134 | extern __inline__ void _raw_spin_unlock(spinlock_t *lock) | |
135 | { | |
136 | __asm__ __volatile__("stb %%g0, [%0]" : : "r" (lock) : "memory"); | |
137 | } | |
138 | ||
139 | /* Read-write spinlocks, allowing multiple readers | |
140 | * but only one writer. | |
141 | * | |
142 | * NOTE! it is quite common to have readers in interrupts | |
143 | * but no interrupt writers. For those circumstances we | |
144 | * can "mix" irq-safe locks - any writer needs to get a | |
145 | * irq-safe write-lock, but readers can get non-irqsafe | |
146 | * read-locks. | |
147 | * | |
148 | * XXX This might create some problems with my dual spinlock | |
149 | * XXX scheme, deadlocks etc. -DaveM | |
150 | */ | |
151 | typedef struct { | |
152 | volatile unsigned int lock; | |
153 | #ifdef CONFIG_PREEMPT | |
154 | unsigned int break_lock; | |
155 | #endif | |
156 | } rwlock_t; | |
157 | ||
158 | #define RW_LOCK_UNLOCKED (rwlock_t) { 0 } | |
159 | ||
160 | #define rwlock_init(lp) do { *(lp)= RW_LOCK_UNLOCKED; } while(0) | |
161 | ||
162 | ||
163 | /* Sort of like atomic_t's on Sparc, but even more clever. | |
164 | * | |
165 | * ------------------------------------ | |
166 | * | 24-bit counter | wlock | rwlock_t | |
167 | * ------------------------------------ | |
168 | * 31 8 7 0 | |
169 | * | |
170 | * wlock signifies the one writer is in or somebody is updating | |
171 | * counter. For a writer, if he successfully acquires the wlock, | |
172 | * but counter is non-zero, he has to release the lock and wait, | |
173 | * till both counter and wlock are zero. | |
174 | * | |
175 | * Unfortunately this scheme limits us to ~16,000,000 cpus. | |
176 | */ | |
177 | extern __inline__ void _read_lock(rwlock_t *rw) | |
178 | { | |
179 | register rwlock_t *lp asm("g1"); | |
180 | lp = rw; | |
181 | __asm__ __volatile__( | |
182 | "mov %%o7, %%g4\n\t" | |
183 | "call ___rw_read_enter\n\t" | |
184 | " ldstub [%%g1 + 3], %%g2\n" | |
185 | : /* no outputs */ | |
186 | : "r" (lp) | |
187 | : "g2", "g4", "memory", "cc"); | |
188 | } | |
189 | ||
190 | #define _raw_read_lock(lock) \ | |
191 | do { unsigned long flags; \ | |
192 | local_irq_save(flags); \ | |
193 | _read_lock(lock); \ | |
194 | local_irq_restore(flags); \ | |
195 | } while(0) | |
196 | ||
197 | extern __inline__ void _read_unlock(rwlock_t *rw) | |
198 | { | |
199 | register rwlock_t *lp asm("g1"); | |
200 | lp = rw; | |
201 | __asm__ __volatile__( | |
202 | "mov %%o7, %%g4\n\t" | |
203 | "call ___rw_read_exit\n\t" | |
204 | " ldstub [%%g1 + 3], %%g2\n" | |
205 | : /* no outputs */ | |
206 | : "r" (lp) | |
207 | : "g2", "g4", "memory", "cc"); | |
208 | } | |
209 | ||
210 | #define _raw_read_unlock(lock) \ | |
211 | do { unsigned long flags; \ | |
212 | local_irq_save(flags); \ | |
213 | _read_unlock(lock); \ | |
214 | local_irq_restore(flags); \ | |
215 | } while(0) | |
216 | ||
217 | extern __inline__ void _raw_write_lock(rwlock_t *rw) | |
218 | { | |
219 | register rwlock_t *lp asm("g1"); | |
220 | lp = rw; | |
221 | __asm__ __volatile__( | |
222 | "mov %%o7, %%g4\n\t" | |
223 | "call ___rw_write_enter\n\t" | |
224 | " ldstub [%%g1 + 3], %%g2\n" | |
225 | : /* no outputs */ | |
226 | : "r" (lp) | |
227 | : "g2", "g4", "memory", "cc"); | |
228 | } | |
229 | ||
230 | #define _raw_write_unlock(rw) do { (rw)->lock = 0; } while(0) | |
231 | ||
232 | #endif /* CONFIG_DEBUG_SPINLOCK */ | |
233 | ||
234 | #define _raw_spin_lock_flags(lock, flags) _raw_spin_lock(lock) | |
235 | ||
236 | #endif /* !(__ASSEMBLY__) */ | |
237 | ||
238 | #endif /* __SPARC_SPINLOCK_H */ |