[mirror_ubuntu-bionic-kernel.git] / include / asm-x86 / io_32.h

#ifndef _ASM_IO_H
#define _ASM_IO_H

#include <linux/string.h>
#include <linux/compiler.h>

/*
 * This file contains the definitions for the x86 IO instructions
 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
 * versions of the single-IO instructions (inb_p/inw_p/..).
 *
 * This file is not meant to be obfuscating: it's just complicated
 * to (a) handle it all in a way that makes gcc able to optimize it
 * as well as possible and (b) trying to avoid writing the same thing
 * over and over again with slight variations and possibly making a
 * mistake somewhere.
 */

/*
 * Thanks to James van Artsdalen for a better timing-fix than
 * the two short jumps: using outb's to a nonexistent port seems
 * to guarantee better timings even on fast machines.
 *
 * On the other hand, I'd like to be sure of a non-existent port:
 * I feel a bit unsafe about using 0x80 (should be safe, though)
 *
 *		Linus
 */

 /*
  *  Bit simplified and optimized by Jan Hubicka
  *  Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
  *
  *  isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
  *  isa_read[wl] and isa_write[wl] fixed
  *  - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
  */

#define IO_SPACE_LIMIT 0xffff

#define XQUAD_PORTIO_BASE 0xfe400000
#define XQUAD_PORTIO_QUAD 0x40000  /* 256k per quad. */

#ifdef __KERNEL__

#include <asm-generic/iomap.h>

#include <linux/vmalloc.h>

/*
 * Convert a virtual cached pointer to an uncached pointer
 */
#define xlate_dev_kmem_ptr(p)	p

/**
 *	virt_to_phys	-	map virtual addresses to physical
 *	@address: address to remap
 *
 *	The returned physical address is the physical (CPU) mapping for
 *	the memory address given. It is only valid to use this function on
 *	addresses directly mapped or allocated via kmalloc.
 *
 *	This function does not give bus mappings for DMA transfers. In
 *	almost all conceivable cases a device driver should not be using
 *	this function
 */

static inline unsigned long virt_to_phys(volatile void *address)
{
	return __pa(address);
}

/**
 *	phys_to_virt	-	map physical address to virtual
 *	@address: address to remap
 *
 *	The returned virtual address is a current CPU mapping for
 *	the memory address given. It is only valid to use this function on
 *	addresses that have a kernel mapping
 *
 *	This function does not handle bus mappings for DMA transfers. In
 *	almost all conceivable cases a device driver should not be using
 *	this function
 */

static inline void *phys_to_virt(unsigned long address)
{
	return __va(address);
}

/*
 * Change "struct page" to physical address.
 */
#define page_to_phys(page)    ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)

/**
 * ioremap     -   map bus memory into CPU space
 * @offset:    bus address of the memory
 * @size:      size of the resource to map
 *
 * ioremap performs a platform specific sequence of operations to
 * make bus memory CPU accessible via the readb/readw/readl/writeb/
 * writew/writel functions and the other mmio helpers. The returned
 * address is not guaranteed to be usable directly as a virtual
 * address.
 *
 * If the area you are trying to map is a PCI BAR you should have a
 * look at pci_iomap().
 */
extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);

/*
 * The default ioremap() behavior is non-cached:
 */
static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
{
	return ioremap_nocache(offset, size);
}

extern void iounmap(volatile void __iomem *addr);

/*
 * early_ioremap() and early_iounmap() are for temporary early boot-time
 * mappings, before the real ioremap() is functional.
 * A boot-time mapping is currently limited to at most 16 pages.
 */
extern void early_ioremap_init(void);
extern void early_ioremap_clear(void);
extern void early_ioremap_reset(void);
extern void *early_ioremap(unsigned long offset, unsigned long size);
extern void early_iounmap(void *addr, unsigned long size);
extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);

/* Use early IO mappings for DMI because it's initialized early */
#define dmi_ioremap early_ioremap
#define dmi_iounmap early_iounmap
#define dmi_alloc alloc_bootmem

/*
 * ISA I/O bus memory addresses are 1:1 with the physical address.
 */
#define isa_virt_to_bus virt_to_phys
#define isa_page_to_bus page_to_phys
#define isa_bus_to_virt phys_to_virt

/*
 * However PCI ones are not necessarily 1:1 and therefore these interfaces
 * are forbidden in portable PCI drivers.
 *
 * Allow them on x86 for legacy drivers, though.
 */
#define virt_to_bus virt_to_phys
#define bus_to_virt phys_to_virt

/*
 * readX/writeX() are used to access memory mapped devices. On some
 * architectures the memory mapped IO stuff needs to be accessed
 * differently. On the x86 architecture, we just read/write the
 * memory location directly.
 */

static inline unsigned char readb(const volatile void __iomem *addr)
{
	return *(volatile unsigned char __force *)addr;
}

static inline unsigned short readw(const volatile void __iomem *addr)
{
	return *(volatile unsigned short __force *)addr;
}

static inline unsigned int readl(const volatile void __iomem *addr)
{
	return *(volatile unsigned int __force *) addr;
}

#define readb_relaxed(addr) readb(addr)
#define readw_relaxed(addr) readw(addr)
#define readl_relaxed(addr) readl(addr)
#define __raw_readb readb
#define __raw_readw readw
#define __raw_readl readl

static inline void writeb(unsigned char b, volatile void __iomem *addr)
{
	*(volatile unsigned char __force *)addr = b;
}

static inline void writew(unsigned short b, volatile void __iomem *addr)
{
	*(volatile unsigned short __force *)addr = b;
}

static inline void writel(unsigned int b, volatile void __iomem *addr)
{
	*(volatile unsigned int __force *)addr = b;
}
#define __raw_writeb writeb
#define __raw_writew writew
#define __raw_writel writel

#define mmiowb()

static inline void
memset_io(volatile void __iomem *addr, unsigned char val, int count)
{
	memset((void __force *)addr, val, count);
}

static inline void
memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
{
	__memcpy(dst, (const void __force *)src, count);
}

static inline void
memcpy_toio(volatile void __iomem *dst, const void *src, int count)
{
	__memcpy((void __force *)dst, src, count);
}

/*
 * ISA space is 'always mapped' on a typical x86 system, no need to
 * explicitly ioremap() it. The fact that the ISA IO space is mapped
 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
 * are physical addresses. The following constant pointer can be
 * used as the IO-area pointer (it can be iounmapped as well, so the
 * analogy with PCI is quite large):
 */
#define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))

/*
 *	Cache management
 *
 *	This needed for two cases
 *	1. Out of order aware processors
 *	2. Accidentally out of order processors (PPro errata #51)
 */

#if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)

static inline void flush_write_buffers(void)
{
	asm volatile("lock; addl $0,0(%%esp)": : :"memory");
}

#else

#define flush_write_buffers() do { } while (0)

#endif

#endif /* __KERNEL__ */

extern void native_io_delay(void);

extern int io_delay_type;
extern void io_delay_init(void);

#if defined(CONFIG_PARAVIRT)
#include <asm/paravirt.h>
#else

static inline void slow_down_io(void)
{
	native_io_delay();
#ifdef REALLY_SLOW_IO
	native_io_delay();
	native_io_delay();
	native_io_delay();
#endif
}

#endif

#define __BUILDIO(bwl, bw, type)				\
static inline void out##bwl(unsigned type value, int port)	\
{								\
	out##bwl##_local(value, port);				\
}								\
								\
static inline unsigned type in##bwl(int port)			\
{								\
	return in##bwl##_local(port);				\
}

#define BUILDIO(bwl, bw, type)						\
static inline void out##bwl##_local(unsigned type value, int port)	\
{									\
	asm volatile("out" #bwl " %" #bw "0, %w1"		\
		     : : "a"(value), "Nd"(port));			\
}									\
									\
static inline unsigned type in##bwl##_local(int port)			\
{									\
	unsigned type value;						\
	asm volatile("in" #bwl " %w1, %" #bw "0"		\
		     : "=a"(value) : "Nd"(port));			\
	return value;							\
}									\
									\
static inline void out##bwl##_local_p(unsigned type value, int port)	\
{									\
	out##bwl##_local(value, port);					\
	slow_down_io();							\
}									\
									\
static inline unsigned type in##bwl##_local_p(int port)			\
{									\
	unsigned type value = in##bwl##_local(port);			\
	slow_down_io();							\
	return value;							\
}									\
									\
__BUILDIO(bwl, bw, type)						\
									\
static inline void out##bwl##_p(unsigned type value, int port)		\
{									\
	out##bwl(value, port);						\
	slow_down_io();							\
}									\
									\
static inline unsigned type in##bwl##_p(int port)			\
{									\
	unsigned type value = in##bwl(port);				\
	slow_down_io();							\
	return value;							\
}									\
									\
static inline void outs##bwl(int port, const void *addr, unsigned long count) \
{									\
	asm volatile("rep; outs" #bwl					\
		     : "+S"(addr), "+c"(count) : "d"(port));		\
}									\
									\
static inline void ins##bwl(int port, void *addr, unsigned long count)	\
{									\
	asm volatile("rep; ins" #bwl					\
		     : "+D"(addr), "+c"(count) : "d"(port));		\
}

BUILDIO(b, b, char)
BUILDIO(w, w, short)
BUILDIO(l, , int)

#endif
Commit	Line	Data
1da177e4 LT	1	#ifndef _ASM_IO_H
	2	#define _ASM_IO_H
	3
1da177e4 LT	4	#include <linux/string.h>
	5	#include <linux/compiler.h>
	6
	7	/*
	8	* This file contains the definitions for the x86 IO instructions
	9	* inb/inw/inl/outb/outw/outl and the "string versions" of the same
	10	* (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
	11	* versions of the single-IO instructions (inb_p/inw_p/..).
	12	*
	13	* This file is not meant to be obfuscating: it's just complicated
	14	* to (a) handle it all in a way that makes gcc able to optimize it
	15	* as well as possible and (b) trying to avoid writing the same thing
	16	* over and over again with slight variations and possibly making a
	17	* mistake somewhere.
	18	*/
	19
	20	/*
	21	* Thanks to James van Artsdalen for a better timing-fix than
	22	* the two short jumps: using outb's to a nonexistent port seems
	23	* to guarantee better timings even on fast machines.
	24	*
	25	* On the other hand, I'd like to be sure of a non-existent port:
	26	* I feel a bit unsafe about using 0x80 (should be safe, though)
	27	*
	28	* Linus
	29	*/
	30
	31	/*
	32	* Bit simplified and optimized by Jan Hubicka
	33	* Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
	34	*
	35	* isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
	36	* isa_read[wl] and isa_write[wl] fixed
	37	* - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
	38	*/
	39
	40	#define IO_SPACE_LIMIT 0xffff
	41
	42	#define XQUAD_PORTIO_BASE 0xfe400000
	43	#define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
	44
	45	#ifdef __KERNEL__
	46
	47	#include <asm-generic/iomap.h>
	48
	49	#include <linux/vmalloc.h>
	50
1da177e4 LT	51	/*
	52	* Convert a virtual cached pointer to an uncached pointer
	53	*/
	54	#define xlate_dev_kmem_ptr(p) p
	55
	56	/**
	57	* virt_to_phys - map virtual addresses to physical
	58	* @address: address to remap
	59	*
	60	* The returned physical address is the physical (CPU) mapping for
	61	* the memory address given. It is only valid to use this function on
dcd215c9	62	* addresses directly mapped or allocated via kmalloc.
1da177e4 LT	63	*
	64	* This function does not give bus mappings for DMA transfers. In
	65	* almost all conceivable cases a device driver should not be using
	66	* this function
	67	*/
dcd215c9 JP	68
dcd215c9 JP	69	static inline unsigned long virt_to_phys(volatile void *address)
1da177e4 LT	70	{
	71	return __pa(address);
	72	}
	73
	74	/**
	75	* phys_to_virt - map physical address to virtual
	76	* @address: address to remap
	77	*
	78	* The returned virtual address is a current CPU mapping for
	79	* the memory address given. It is only valid to use this function on
	80	* addresses that have a kernel mapping
	81	*
	82	* This function does not handle bus mappings for DMA transfers. In
	83	* almost all conceivable cases a device driver should not be using
	84	* this function
	85	*/
	86
dcd215c9	87	static inline void *phys_to_virt(unsigned long address)
1da177e4 LT	88	{
	89	return __va(address);
	90	}
	91
	92	/*
	93	* Change "struct page" to physical address.
	94	*/
	95	#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
	96
1da177e4 LT	97	/**
	98	* ioremap - map bus memory into CPU space
	99	* @offset: bus address of the memory
	100	* @size: size of the resource to map
	101	*
	102	* ioremap performs a platform specific sequence of operations to
	103	* make bus memory CPU accessible via the readb/readw/readl/writeb/
	104	* writew/writel functions and the other mmio helpers. The returned
	105	* address is not guaranteed to be usable directly as a virtual
6371b495	106	* address.
5ca24814 REB	107	*
	108	* If the area you are trying to map is a PCI BAR you should have a
	109	* look at pci_iomap().
1da177e4	110	*/
b9e76a00 LT	111	extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
b9e76a00 LT	112	extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
1da177e4	113
6371b495 IM	114	/*
	115	* The default ioremap() behavior is non-cached:
	116	*/
b9e76a00	117	static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
6371b495 IM	118	{
	119	return ioremap_nocache(offset, size);
	120	}
	121
1da177e4 LT	122	extern void iounmap(volatile void __iomem *addr);
	123
	124	/*
beacfaac	125	* early_ioremap() and early_iounmap() are for temporary early boot-time
1da177e4 LT	126	* mappings, before the real ioremap() is functional.
	127	* A boot-time mapping is currently limited to at most 16 pages.
	128	*/
beacfaac HY	129	extern void early_ioremap_init(void);
	130	extern void early_ioremap_clear(void);
	131	extern void early_ioremap_reset(void);
	132	extern void *early_ioremap(unsigned long offset, unsigned long size);
	133	extern void early_iounmap(void *addr, unsigned long size);
18a8bd94	134	extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
1da177e4	135
e9928674	136	/* Use early IO mappings for DMI because it's initialized early */
beacfaac HY	137	#define dmi_ioremap early_ioremap
beacfaac HY	138	#define dmi_iounmap early_iounmap
e9928674 AK	139	#define dmi_alloc alloc_bootmem
e9928674 AK	140
1da177e4 LT	141	/*
	142	* ISA I/O bus memory addresses are 1:1 with the physical address.
	143	*/
	144	#define isa_virt_to_bus virt_to_phys
	145	#define isa_page_to_bus page_to_phys
	146	#define isa_bus_to_virt phys_to_virt
	147
	148	/*
	149	* However PCI ones are not necessarily 1:1 and therefore these interfaces
	150	* are forbidden in portable PCI drivers.
	151	*
	152	* Allow them on x86 for legacy drivers, though.
	153	*/
	154	#define virt_to_bus virt_to_phys
	155	#define bus_to_virt phys_to_virt
	156
	157	/*
	158	* readX/writeX() are used to access memory mapped devices. On some
	159	* architectures the memory mapped IO stuff needs to be accessed
	160	* differently. On the x86 architecture, we just read/write the
	161	* memory location directly.
	162	*/
	163
	164	static inline unsigned char readb(const volatile void __iomem *addr)
	165	{
dcd215c9	166	return (volatile unsigned char __force )addr;
1da177e4	167	}
dcd215c9	168
1da177e4 LT	169	static inline unsigned short readw(const volatile void __iomem *addr)
1da177e4 LT	170	{
dcd215c9	171	return (volatile unsigned short __force )addr;
1da177e4	172	}
dcd215c9	173
1da177e4 LT	174	static inline unsigned int readl(const volatile void __iomem *addr)
	175	{
	176	return (volatile unsigned int __force ) addr;
	177	}
dcd215c9	178
1da177e4 LT	179	#define readb_relaxed(addr) readb(addr)
	180	#define readw_relaxed(addr) readw(addr)
	181	#define readl_relaxed(addr) readl(addr)
	182	#define __raw_readb readb
	183	#define __raw_readw readw
	184	#define __raw_readl readl
	185
	186	static inline void writeb(unsigned char b, volatile void __iomem *addr)
	187	{
dcd215c9	188	(volatile unsigned char __force )addr = b;
1da177e4	189	}
dcd215c9	190
1da177e4 LT	191	static inline void writew(unsigned short b, volatile void __iomem *addr)
1da177e4 LT	192	{
dcd215c9	193	(volatile unsigned short __force )addr = b;
1da177e4	194	}
dcd215c9	195
1da177e4 LT	196	static inline void writel(unsigned int b, volatile void __iomem *addr)
1da177e4 LT	197	{
dcd215c9	198	(volatile unsigned int __force )addr = b;
1da177e4 LT	199	}
	200	#define __raw_writeb writeb
	201	#define __raw_writew writew
	202	#define __raw_writel writel
	203
	204	#define mmiowb()
	205
3c215b66 AM	206	static inline void
3c215b66 AM	207	memset_io(volatile void __iomem *addr, unsigned char val, int count)
1da177e4	208	{
3c215b66	209	memset((void __force *)addr, val, count);
1da177e4	210	}
3c215b66 AM	211
	212	static inline void
	213	memcpy_fromio(void dst, const volatile void __iomem src, int count)
1da177e4	214	{
3c215b66	215	__memcpy(dst, (const void __force *)src, count);
1da177e4	216	}
3c215b66 AM	217
	218	static inline void
	219	memcpy_toio(volatile void __iomem dst, const void src, int count)
1da177e4	220	{
3c215b66	221	__memcpy((void __force *)dst, src, count);
1da177e4 LT	222	}
	223
	224	/*
	225	* ISA space is 'always mapped' on a typical x86 system, no need to
	226	* explicitly ioremap() it. The fact that the ISA IO space is mapped
	227	* to PAGE_OFFSET is pure coincidence - it does not mean ISA values
	228	* are physical addresses. The following constant pointer can be
	229	* used as the IO-area pointer (it can be iounmapped as well, so the
	230	* analogy with PCI is quite large):
	231	*/
	232	#define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
	233
1da177e4 LT	234	/*
	235	* Cache management
	236	*
	237	* This needed for two cases
	238	* 1. Out of order aware processors
	239	* 2. Accidentally out of order processors (PPro errata #51)
	240	*/
dcd215c9	241
1da177e4 LT	242	#if defined(CONFIG_X86_OOSTORE) \|\| defined(CONFIG_X86_PPRO_FENCE)
	243
	244	static inline void flush_write_buffers(void)
	245	{
dcd215c9	246	asm volatile("lock; addl $0,0(%%esp)": : :"memory");
1da177e4 LT	247	}
1da177e4 LT	248
1da177e4 LT	249	#else
1da177e4 LT	250
622a9edd	251	#define flush_write_buffers() do { } while (0)
1da177e4 LT	252
	253	#endif
	254
	255	#endif /* __KERNEL__ */
	256
b02aae9c	257	extern void native_io_delay(void);
90a0a06a	258
6e7c4025 IM	259	extern int io_delay_type;
	260	extern void io_delay_init(void);
	261
d3561b7f RR	262	#if defined(CONFIG_PARAVIRT)
d3561b7f RR	263	#include <asm/paravirt.h>
1da177e4	264	#else
d3561b7f	265
dcd215c9 JP	266	static inline void slow_down_io(void)
dcd215c9 JP	267	{
90a0a06a	268	native_io_delay();
1da177e4	269	#ifdef REALLY_SLOW_IO
90a0a06a RR	270	native_io_delay();
	271	native_io_delay();
	272	native_io_delay();
1da177e4	273	#endif
1da177e4 LT	274	}
1da177e4 LT	275
d3561b7f RR	276	#endif
d3561b7f RR	277
dcd215c9 JP	278	#define __BUILDIO(bwl, bw, type) \
	279	static inline void out##bwl(unsigned type value, int port) \
	280	{ \
	281	out##bwl##_local(value, port); \
	282	} \
	283	\
	284	static inline unsigned type in##bwl(int port) \
	285	{ \
	286	return in##bwl##_local(port); \
1da177e4	287	}
1da177e4	288
dcd215c9 JP	289	#define BUILDIO(bwl, bw, type) \
	290	static inline void out##bwl##_local(unsigned type value, int port) \
	291	{ \
	292	asm volatile("out" #bwl " %" #bw "0, %w1" \
	293	: : "a"(value), "Nd"(port)); \
	294	} \
	295	\
	296	static inline unsigned type in##bwl##_local(int port) \
	297	{ \
	298	unsigned type value; \
	299	asm volatile("in" #bwl " %w1, %" #bw "0" \
	300	: "=a"(value) : "Nd"(port)); \
	301	return value; \
	302	} \
	303	\
	304	static inline void out##bwl##_local_p(unsigned type value, int port) \
	305	{ \
	306	out##bwl##_local(value, port); \
	307	slow_down_io(); \
	308	} \
	309	\
	310	static inline unsigned type in##bwl##_local_p(int port) \
	311	{ \
	312	unsigned type value = in##bwl##_local(port); \
	313	slow_down_io(); \
	314	return value; \
	315	} \
	316	\
	317	__BUILDIO(bwl, bw, type) \
	318	\
	319	static inline void out##bwl##_p(unsigned type value, int port) \
	320	{ \
	321	out##bwl(value, port); \
	322	slow_down_io(); \
	323	} \
	324	\
	325	static inline unsigned type in##bwl##_p(int port) \
	326	{ \
	327	unsigned type value = in##bwl(port); \
	328	slow_down_io(); \
	329	return value; \
	330	} \
	331	\
	332	static inline void outs##bwl(int port, const void *addr, unsigned long count) \
	333	{ \
	334	asm volatile("rep; outs" #bwl \
	335	: "+S"(addr), "+c"(count) : "d"(port)); \
	336	} \
	337	\
	338	static inline void ins##bwl(int port, void *addr, unsigned long count) \
	339	{ \
	340	asm volatile("rep; ins" #bwl \
	341	: "+D"(addr), "+c"(count) : "d"(port)); \
1da177e4 LT	342	}
1da177e4 LT	343
dcd215c9 JP	344	BUILDIO(b, b, char)
	345	BUILDIO(w, w, short)
	346	BUILDIO(l, , int)
1da177e4 LT	347
1da177e4 LT	348	#endif