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KVM: VMX: Enable EPT feature for KVM
[mirror_ubuntu-artful-kernel.git] / include / asm-x86 / kvm_host.h
CommitLineData
043405e1
CO		 1#/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
edf88417
AK		 11#ifndef ASM_KVM_HOST_H
12#define ASM_KVM_HOST_H
043405e1 13
34c16eec
ZX		 14#include <linux/types.h>
15#include <linux/mm.h>
16
17#include <linux/kvm.h>
18#include <linux/kvm_para.h>
edf88417 19#include <linux/kvm_types.h>
34c16eec 20
e01a1b57
HB		 21#include <asm/desc.h>
22
69a9f69b
AK		 23#define KVM_MAX_VCPUS 16
24#define KVM_MEMORY_SLOTS 32
25/* memory slots that does not exposed to userspace */
26#define KVM_PRIVATE_MEM_SLOTS 4
27
28#define KVM_PIO_PAGE_OFFSET 1
29
cd6e8f87
ZX		 30#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
31#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
7d76b4d3
JP		 32#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
33 0xFFFFFF0000000000ULL)
cd6e8f87 34
7d76b4d3 35#define KVM_GUEST_CR0_MASK \
cd6e8f87
ZX		 36 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \
37 | X86_CR0_NW | X86_CR0_CD)
7d76b4d3 38#define KVM_VM_CR0_ALWAYS_ON \
cd6e8f87
ZX		 39 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \
40 | X86_CR0_MP)
7d76b4d3 41#define KVM_GUEST_CR4_MASK \
cd6e8f87
ZX		 42 (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE)
43#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
44#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
45
46#define INVALID_PAGE (~(hpa_t)0)
47#define UNMAPPED_GVA (~(gpa_t)0)
48
05da4558
MT		 49/* shadow tables are PAE even on non-PAE hosts */
50#define KVM_HPAGE_SHIFT 21
51#define KVM_HPAGE_SIZE (1UL << KVM_HPAGE_SHIFT)
52#define KVM_HPAGE_MASK (~(KVM_HPAGE_SIZE - 1))
53
54#define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE)
55
cd6e8f87
ZX		 56#define DE_VECTOR 0
57#define UD_VECTOR 6
58#define NM_VECTOR 7
59#define DF_VECTOR 8
60#define TS_VECTOR 10
61#define NP_VECTOR 11
62#define SS_VECTOR 12
63#define GP_VECTOR 13
64#define PF_VECTOR 14
53371b50 65#define MC_VECTOR 18
cd6e8f87
ZX		 66
67#define SELECTOR_TI_MASK (1 << 2)
68#define SELECTOR_RPL_MASK 0x03
69
70#define IOPL_SHIFT 12
71
d69fb81f
ZX		 72#define KVM_ALIAS_SLOTS 4
73
d657a98e
ZX		 74#define KVM_PERMILLE_MMU_PAGES 20
75#define KVM_MIN_ALLOC_MMU_PAGES 64
1ae0a13d
DE		 76#define KVM_MMU_HASH_SHIFT 10
77#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
d657a98e
ZX		 78#define KVM_MIN_FREE_MMU_PAGES 5
79#define KVM_REFILL_PAGES 25
80#define KVM_MAX_CPUID_ENTRIES 40
81
e9b11c17
ZX		 82extern spinlock_t kvm_lock;
83extern struct list_head vm_list;
84
d657a98e
ZX		 85struct kvm_vcpu;
86struct kvm;
87
2b3ccfa0
ZX		 88enum {
89 VCPU_REGS_RAX = 0,
90 VCPU_REGS_RCX = 1,
91 VCPU_REGS_RDX = 2,
92 VCPU_REGS_RBX = 3,
93 VCPU_REGS_RSP = 4,
94 VCPU_REGS_RBP = 5,
95 VCPU_REGS_RSI = 6,
96 VCPU_REGS_RDI = 7,
97#ifdef CONFIG_X86_64
98 VCPU_REGS_R8 = 8,
99 VCPU_REGS_R9 = 9,
100 VCPU_REGS_R10 = 10,
101 VCPU_REGS_R11 = 11,
102 VCPU_REGS_R12 = 12,
103 VCPU_REGS_R13 = 13,
104 VCPU_REGS_R14 = 14,
105 VCPU_REGS_R15 = 15,
106#endif
107 NR_VCPU_REGS
108};
109
110enum {
111 VCPU_SREG_CS,
112 VCPU_SREG_DS,
113 VCPU_SREG_ES,
114 VCPU_SREG_FS,
115 VCPU_SREG_GS,
116 VCPU_SREG_SS,
117 VCPU_SREG_TR,
118 VCPU_SREG_LDTR,
119};
120
edf88417 121#include <asm/kvm_x86_emulate.h>
2b3ccfa0 122
d657a98e
ZX		 123#define KVM_NR_MEM_OBJS 40
124
69a9f69b
AK		 125struct kvm_guest_debug {
126 int enabled;
127 unsigned long bp[4];
128 int singlestep;
129};
130
d657a98e
ZX		 131/*
132 * We don't want allocation failures within the mmu code, so we preallocate
133 * enough memory for a single page fault in a cache.
134 */
135struct kvm_mmu_memory_cache {
136 int nobjs;
137 void *objects[KVM_NR_MEM_OBJS];
138};
139
140#define NR_PTE_CHAIN_ENTRIES 5
141
142struct kvm_pte_chain {
143 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
144 struct hlist_node link;
145};
146
147/*
148 * kvm_mmu_page_role, below, is defined as:
149 *
150 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
151 * bits 4:7 - page table level for this shadow (1-4)
152 * bits 8:9 - page table quadrant for 2-level guests
153 * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
154 * bits 17:19 - common access permissions for all ptes in this shadow page
155 */
156union kvm_mmu_page_role {
157 unsigned word;
158 struct {
7d76b4d3
JP		 159 unsigned glevels:4;
160 unsigned level:4;
161 unsigned quadrant:2;
162 unsigned pad_for_nice_hex_output:6;
163 unsigned metaphysical:1;
164 unsigned access:3;
2e53d63a 165 unsigned invalid:1;
d657a98e
ZX		 166 };
167};
168
169struct kvm_mmu_page {
170 struct list_head link;
171 struct hlist_node hash_link;
172
173 /*
174 * The following two entries are used to key the shadow page in the
175 * hash table.
176 */
177 gfn_t gfn;
178 union kvm_mmu_page_role role;
179
180 u64 *spt;
181 /* hold the gfn of each spte inside spt */
182 gfn_t *gfns;
183 unsigned long slot_bitmap; /* One bit set per slot which has memory
184 * in this shadow page.
185 */
186 int multimapped; /* More than one parent_pte? */
187 int root_count; /* Currently serving as active root */
188 union {
189 u64 *parent_pte; /* !multimapped */
190 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
191 };
192};
193
194/*
195 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
196 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
197 * mode.
198 */
199struct kvm_mmu {
200 void (*new_cr3)(struct kvm_vcpu *vcpu);
201 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
202 void (*free)(struct kvm_vcpu *vcpu);
203 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
204 void (*prefetch_page)(struct kvm_vcpu *vcpu,
205 struct kvm_mmu_page *page);
206 hpa_t root_hpa;
207 int root_level;
208 int shadow_root_level;
209
210 u64 *pae_root;
211};
212
ad312c7c 213struct kvm_vcpu_arch {
34c16eec
ZX		 214 u64 host_tsc;
215 int interrupt_window_open;
216 unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
217 DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS);
218 unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
219 unsigned long rip; /* needs vcpu_load_rsp_rip() */
220
221 unsigned long cr0;
222 unsigned long cr2;
223 unsigned long cr3;
224 unsigned long cr4;
225 unsigned long cr8;
226 u64 pdptrs[4]; /* pae */
227 u64 shadow_efer;
228 u64 apic_base;
229 struct kvm_lapic *apic; /* kernel irqchip context */
34c16eec
ZX		 230 int mp_state;
231 int sipi_vector;
232 u64 ia32_misc_enable_msr;
b209749f 233 bool tpr_access_reporting;
34c16eec
ZX		 234
235 struct kvm_mmu mmu;
236
237 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
238 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
239 struct kvm_mmu_memory_cache mmu_page_cache;
240 struct kvm_mmu_memory_cache mmu_page_header_cache;
241
242 gfn_t last_pt_write_gfn;
243 int last_pt_write_count;
244 u64 *last_pte_updated;
245
d7824fff 246 struct {
35149e21
AL		 247 gfn_t gfn; /* presumed gfn during guest pte update */
248 pfn_t pfn; /* pfn corresponding to that gfn */
05da4558 249 int largepage;
d7824fff
AK		 250 } update_pte;
251
34c16eec
ZX		 252 struct i387_fxsave_struct host_fx_image;
253 struct i387_fxsave_struct guest_fx_image;
254
255 gva_t mmio_fault_cr2;
256 struct kvm_pio_request pio;
257 void *pio_data;
258
298101da
AK		 259 struct kvm_queued_exception {
260 bool pending;
261 bool has_error_code;
262 u8 nr;
263 u32 error_code;
264 } exception;
265
34c16eec
ZX		 266 struct {
267 int active;
268 u8 save_iopl;
269 struct kvm_save_segment {
270 u16 selector;
271 unsigned long base;
272 u32 limit;
273 u32 ar;
274 } tr, es, ds, fs, gs;
275 } rmode;
276 int halt_request; /* real mode on Intel only */
277
278 int cpuid_nent;
07716717 279 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
34c16eec
ZX		 280 /* emulate context */
281
282 struct x86_emulate_ctxt emulate_ctxt;
18068523
GOC		 283
284 gpa_t time;
285 struct kvm_vcpu_time_info hv_clock;
286 unsigned int time_offset;
287 struct page *time_page;
34c16eec
ZX		 288};
289
d69fb81f
ZX		 290struct kvm_mem_alias {
291 gfn_t base_gfn;
292 unsigned long npages;
293 gfn_t target_gfn;
294};
295
296struct kvm_arch{
297 int naliases;
298 struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
f05e70ac
ZX		 299
300 unsigned int n_free_mmu_pages;
301 unsigned int n_requested_mmu_pages;
302 unsigned int n_alloc_mmu_pages;
303 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
304 /*
305 * Hash table of struct kvm_mmu_page.
306 */
307 struct list_head active_mmu_pages;
d7deeeb0
ZX		 308 struct kvm_pic *vpic;
309 struct kvm_ioapic *vioapic;
7837699f 310 struct kvm_pit *vpit;
bfc6d222
ZX		 311
312 int round_robin_prev_vcpu;
313 unsigned int tss_addr;
314 struct page *apic_access_page;
18068523
GOC		 315
316 gpa_t wall_clock;
b7ebfb05
SY		 317
318 struct page *ept_identity_pagetable;
319 bool ept_identity_pagetable_done;
d69fb81f
ZX		 320};
321
0711456c
ZX		 322struct kvm_vm_stat {
323 u32 mmu_shadow_zapped;
324 u32 mmu_pte_write;
325 u32 mmu_pte_updated;
326 u32 mmu_pde_zapped;
327 u32 mmu_flooded;
328 u32 mmu_recycled;
dfc5aa00 329 u32 mmu_cache_miss;
0711456c 330 u32 remote_tlb_flush;
05da4558 331 u32 lpages;
0711456c
ZX		 332};
333
77b4c255
ZX		 334struct kvm_vcpu_stat {
335 u32 pf_fixed;
336 u32 pf_guest;
337 u32 tlb_flush;
338 u32 invlpg;
339
340 u32 exits;
341 u32 io_exits;
342 u32 mmio_exits;
343 u32 signal_exits;
344 u32 irq_window_exits;
345 u32 halt_exits;
346 u32 halt_wakeup;
347 u32 request_irq_exits;
348 u32 irq_exits;
349 u32 host_state_reload;
350 u32 efer_reload;
351 u32 fpu_reload;
352 u32 insn_emulation;
353 u32 insn_emulation_fail;
f11c3a8d 354 u32 hypercalls;
77b4c255 355};
ad312c7c 356
e01a1b57
HB		 357struct descriptor_table {
358 u16 limit;
359 unsigned long base;
360} __attribute__((packed));
361
ea4a5ff8
ZX		 362struct kvm_x86_ops {
363 int (*cpu_has_kvm_support)(void); /* __init */
364 int (*disabled_by_bios)(void); /* __init */
365 void (*hardware_enable)(void *dummy); /* __init */
366 void (*hardware_disable)(void *dummy);
367 void (*check_processor_compatibility)(void *rtn);
368 int (*hardware_setup)(void); /* __init */
369 void (*hardware_unsetup)(void); /* __exit */
774ead3a 370 bool (*cpu_has_accelerated_tpr)(void);
ea4a5ff8
ZX		 371
372 /* Create, but do not attach this VCPU */
373 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
374 void (*vcpu_free)(struct kvm_vcpu *vcpu);
375 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
376
377 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
378 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
379 void (*vcpu_put)(struct kvm_vcpu *vcpu);
380 void (*vcpu_decache)(struct kvm_vcpu *vcpu);
381
382 int (*set_guest_debug)(struct kvm_vcpu *vcpu,
383 struct kvm_debug_guest *dbg);
384 void (*guest_debug_pre)(struct kvm_vcpu *vcpu);
385 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
386 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
387 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
388 void (*get_segment)(struct kvm_vcpu *vcpu,
389 struct kvm_segment *var, int seg);
2e4d2653 390 int (*get_cpl)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 391 void (*set_segment)(struct kvm_vcpu *vcpu,
392 struct kvm_segment *var, int seg);
393 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
394 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
395 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
396 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
397 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
398 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
399 void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
400 void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
401 void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
402 void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
403 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
404 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
405 int *exception);
406 void (*cache_regs)(struct kvm_vcpu *vcpu);
407 void (*decache_regs)(struct kvm_vcpu *vcpu);
408 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
409 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
410
411 void (*tlb_flush)(struct kvm_vcpu *vcpu);
ea4a5ff8 412
ea4a5ff8
ZX		 413 void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
414 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);
415 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
416 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
417 unsigned char *hypercall_addr);
418 int (*get_irq)(struct kvm_vcpu *vcpu);
419 void (*set_irq)(struct kvm_vcpu *vcpu, int vec);
298101da
AK		 420 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
421 bool has_error_code, u32 error_code);
422 bool (*exception_injected)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX		 423 void (*inject_pending_irq)(struct kvm_vcpu *vcpu);
424 void (*inject_pending_vectors)(struct kvm_vcpu *vcpu,
425 struct kvm_run *run);
426
427 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
67253af5 428 int (*get_tdp_level)(void);
ea4a5ff8
ZX		 429};
430
97896d04
ZX		 431extern struct kvm_x86_ops *kvm_x86_ops;
432
54f1585a
ZX		 433int kvm_mmu_module_init(void);
434void kvm_mmu_module_exit(void);
435
436void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
437int kvm_mmu_create(struct kvm_vcpu *vcpu);
438int kvm_mmu_setup(struct kvm_vcpu *vcpu);
439void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
7b52345e
SY		 440void kvm_mmu_set_base_ptes(u64 base_pte);
441void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
442 u64 dirty_mask, u64 nx_mask, u64 x_mask);
54f1585a
ZX		 443
444int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
445void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
446void kvm_mmu_zap_all(struct kvm *kvm);
3ad82a7e 447unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
54f1585a
ZX		 448void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
449
cc4b6871
JR		 450int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
451
3200f405 452int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
9f811285 453 const void *val, int bytes);
2f333bcb
MT		 454int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
455 gpa_t addr, unsigned long *ret);
456
457extern bool tdp_enabled;
9f811285 458
54f1585a
ZX		 459enum emulation_result {
460 EMULATE_DONE, /* no further processing */
461 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
462 EMULATE_FAIL, /* can't emulate this instruction */
463};
464
571008da
SY		 465#define EMULTYPE_NO_DECODE (1 << 0)
466#define EMULTYPE_TRAP_UD (1 << 1)
54f1585a 467int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
571008da 468 unsigned long cr2, u16 error_code, int emulation_type);
54f1585a
ZX		 469void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context);
470void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
471void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
472void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
473 unsigned long *rflags);
474
475unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
476void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
477 unsigned long *rflags);
f2b4b7dd 478void kvm_enable_efer_bits(u64);
54f1585a
ZX		 479int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
480int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
481
482struct x86_emulate_ctxt;
483
484int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
485 int size, unsigned port);
486int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
487 int size, unsigned long count, int down,
488 gva_t address, int rep, unsigned port);
489void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
490int kvm_emulate_halt(struct kvm_vcpu *vcpu);
491int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
492int emulate_clts(struct kvm_vcpu *vcpu);
493int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
494 unsigned long *dest);
495int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
496 unsigned long value);
497
37817f29
IE		 498int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason);
499
2d3ad1f4 500void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
9c20456a
JR		 501void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
502void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
503void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
2d3ad1f4
AK		 504unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
505void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
54f1585a
ZX		 506void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
507
508int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
509int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
510
298101da
AK		 511void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
512void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
c3c91fee
AK		 513void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
514 u32 error_code);
298101da 515
54f1585a
ZX		 516void fx_init(struct kvm_vcpu *vcpu);
517
518int emulator_read_std(unsigned long addr,
519 void *val,
520 unsigned int bytes,
521 struct kvm_vcpu *vcpu);
522int emulator_write_emulated(unsigned long addr,
523 const void *val,
524 unsigned int bytes,
525 struct kvm_vcpu *vcpu);
526
527unsigned long segment_base(u16 selector);
528
d835dfec 529void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
54f1585a
ZX		 530void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
531 const u8 *new, int bytes);
532int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
533void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
534int kvm_mmu_load(struct kvm_vcpu *vcpu);
535void kvm_mmu_unload(struct kvm_vcpu *vcpu);
536
537int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
538
539int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
540
3067714c 541int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
34c16eec 542
18552672
JR		 543void kvm_enable_tdp(void);
544
a03490ed 545int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
de7d789a 546int complete_pio(struct kvm_vcpu *vcpu);
ec6d273d
ZX		 547
548static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
549{
550 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
551
552 return (struct kvm_mmu_page *)page_private(page);
553}
554
555static inline u16 read_fs(void)
556{
557 u16 seg;
558 asm("mov %%fs, %0" : "=g"(seg));
559 return seg;
560}
561
562static inline u16 read_gs(void)
563{
564 u16 seg;
565 asm("mov %%gs, %0" : "=g"(seg));
566 return seg;
567}
568
569static inline u16 read_ldt(void)
570{
571 u16 ldt;
572 asm("sldt %0" : "=g"(ldt));
573 return ldt;
574}
575
576static inline void load_fs(u16 sel)
577{
578 asm("mov %0, %%fs" : : "rm"(sel));
579}
580
581static inline void load_gs(u16 sel)
582{
583 asm("mov %0, %%gs" : : "rm"(sel));
584}
585
586#ifndef load_ldt
587static inline void load_ldt(u16 sel)
588{
589 asm("lldt %0" : : "rm"(sel));
590}
591#endif
592
593static inline void get_idt(struct descriptor_table *table)
594{
595 asm("sidt %0" : "=m"(*table));
596}
597
598static inline void get_gdt(struct descriptor_table *table)
599{
600 asm("sgdt %0" : "=m"(*table));
601}
602
603static inline unsigned long read_tr_base(void)
604{
605 u16 tr;
606 asm("str %0" : "=g"(tr));
607 return segment_base(tr);
608}
609
610#ifdef CONFIG_X86_64
611static inline unsigned long read_msr(unsigned long msr)
612{
613 u64 value;
614
615 rdmsrl(msr, value);
616 return value;
617}
618#endif
619
620static inline void fx_save(struct i387_fxsave_struct *image)
621{
622 asm("fxsave (%0)":: "r" (image));
623}
624
625static inline void fx_restore(struct i387_fxsave_struct *image)
626{
627 asm("fxrstor (%0)":: "r" (image));
628}
629
630static inline void fpu_init(void)
631{
632 asm("finit");
633}
634
635static inline u32 get_rdx_init_val(void)
636{
637 return 0x600; /* P6 family */
638}
639
c1a5d4f9
AK		 640static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
641{
642 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
643}
644
ec6d273d
ZX		 645#define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
646#define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
647#define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
648#define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
649#define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
650#define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
651#define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
652#define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
653#define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
1439442c 654#define ASM_VMX_INVEPT ".byte 0x66, 0x0f, 0x38, 0x80, 0x08"
2384d2b3 655#define ASM_VMX_INVVPID ".byte 0x66, 0x0f, 0x38, 0x81, 0x08"
ec6d273d
ZX		 656
657#define MSR_IA32_TIME_STAMP_COUNTER 0x010
658
659#define TSS_IOPB_BASE_OFFSET 0x66
660#define TSS_BASE_SIZE 0x68
661#define TSS_IOPB_SIZE (65536 / 8)
662#define TSS_REDIRECTION_SIZE (256 / 8)
7d76b4d3
JP		 663#define RMODE_TSS_SIZE \
664 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
53e0aa7b 665
37817f29
IE		 666enum {
667 TASK_SWITCH_CALL = 0,
668 TASK_SWITCH_IRET = 1,
669 TASK_SWITCH_JMP = 2,
670 TASK_SWITCH_GATE = 3,
671};
672
2714d1d3
FEL		 673#define KVMTRACE_5D(evt, vcpu, d1, d2, d3, d4, d5, name) \
674 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
675 vcpu, 5, d1, d2, d3, d4, d5)
676#define KVMTRACE_4D(evt, vcpu, d1, d2, d3, d4, name) \
677 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
678 vcpu, 4, d1, d2, d3, d4, 0)
679#define KVMTRACE_3D(evt, vcpu, d1, d2, d3, name) \
680 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
681 vcpu, 3, d1, d2, d3, 0, 0)
682#define KVMTRACE_2D(evt, vcpu, d1, d2, name) \
683 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
684 vcpu, 2, d1, d2, 0, 0, 0)
685#define KVMTRACE_1D(evt, vcpu, d1, name) \
686 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
687 vcpu, 1, d1, 0, 0, 0, 0)
688#define KVMTRACE_0D(evt, vcpu, name) \
689 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
690 vcpu, 0, 0, 0, 0, 0, 0)
691
043405e1 692#endif
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