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Commit | Line | Data |
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a656c8ef | 1 | /* |
043405e1 CO |
2 | * Kernel-based Virtual Machine driver for Linux |
3 | * | |
4 | * This header defines architecture specific interfaces, x86 version | |
5 | * | |
6 | * This work is licensed under the terms of the GNU GPL, version 2. See | |
7 | * the COPYING file in the top-level directory. | |
8 | * | |
9 | */ | |
10 | ||
77ef50a5 VN |
11 | #ifndef ASM_X86__KVM_HOST_H |
12 | #define ASM_X86__KVM_HOST_H | |
043405e1 | 13 | |
34c16eec ZX |
14 | #include <linux/types.h> |
15 | #include <linux/mm.h> | |
e930bffe | 16 | #include <linux/mmu_notifier.h> |
34c16eec ZX |
17 | |
18 | #include <linux/kvm.h> | |
19 | #include <linux/kvm_para.h> | |
edf88417 | 20 | #include <linux/kvm_types.h> |
34c16eec | 21 | |
50d0a0f9 | 22 | #include <asm/pvclock-abi.h> |
e01a1b57 HB |
23 | #include <asm/desc.h> |
24 | ||
69a9f69b AK |
25 | #define KVM_MAX_VCPUS 16 |
26 | #define KVM_MEMORY_SLOTS 32 | |
27 | /* memory slots that does not exposed to userspace */ | |
28 | #define KVM_PRIVATE_MEM_SLOTS 4 | |
29 | ||
30 | #define KVM_PIO_PAGE_OFFSET 1 | |
542472b5 | 31 | #define KVM_COALESCED_MMIO_PAGE_OFFSET 2 |
69a9f69b | 32 | |
cd6e8f87 ZX |
33 | #define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1) |
34 | #define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD)) | |
7d76b4d3 JP |
35 | #define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \ |
36 | 0xFFFFFF0000000000ULL) | |
cd6e8f87 | 37 | |
7d76b4d3 | 38 | #define KVM_GUEST_CR0_MASK \ |
cd6e8f87 ZX |
39 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \ |
40 | | X86_CR0_NW | X86_CR0_CD) | |
7d76b4d3 | 41 | #define KVM_VM_CR0_ALWAYS_ON \ |
cd6e8f87 ZX |
42 | (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \ |
43 | | X86_CR0_MP) | |
7d76b4d3 | 44 | #define KVM_GUEST_CR4_MASK \ |
cd6e8f87 ZX |
45 | (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE) |
46 | #define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE) | |
47 | #define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE) | |
48 | ||
49 | #define INVALID_PAGE (~(hpa_t)0) | |
50 | #define UNMAPPED_GVA (~(gpa_t)0) | |
51 | ||
05da4558 MT |
52 | /* shadow tables are PAE even on non-PAE hosts */ |
53 | #define KVM_HPAGE_SHIFT 21 | |
54 | #define KVM_HPAGE_SIZE (1UL << KVM_HPAGE_SHIFT) | |
55 | #define KVM_HPAGE_MASK (~(KVM_HPAGE_SIZE - 1)) | |
56 | ||
57 | #define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE) | |
58 | ||
cd6e8f87 | 59 | #define DE_VECTOR 0 |
19bd8afd | 60 | #define DB_VECTOR 1 |
77ab6db0 JK |
61 | #define BP_VECTOR 3 |
62 | #define OF_VECTOR 4 | |
63 | #define BR_VECTOR 5 | |
cd6e8f87 ZX |
64 | #define UD_VECTOR 6 |
65 | #define NM_VECTOR 7 | |
66 | #define DF_VECTOR 8 | |
67 | #define TS_VECTOR 10 | |
68 | #define NP_VECTOR 11 | |
69 | #define SS_VECTOR 12 | |
70 | #define GP_VECTOR 13 | |
71 | #define PF_VECTOR 14 | |
77ab6db0 | 72 | #define MF_VECTOR 16 |
53371b50 | 73 | #define MC_VECTOR 18 |
cd6e8f87 ZX |
74 | |
75 | #define SELECTOR_TI_MASK (1 << 2) | |
76 | #define SELECTOR_RPL_MASK 0x03 | |
77 | ||
78 | #define IOPL_SHIFT 12 | |
79 | ||
d69fb81f ZX |
80 | #define KVM_ALIAS_SLOTS 4 |
81 | ||
d657a98e ZX |
82 | #define KVM_PERMILLE_MMU_PAGES 20 |
83 | #define KVM_MIN_ALLOC_MMU_PAGES 64 | |
1ae0a13d DE |
84 | #define KVM_MMU_HASH_SHIFT 10 |
85 | #define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT) | |
d657a98e ZX |
86 | #define KVM_MIN_FREE_MMU_PAGES 5 |
87 | #define KVM_REFILL_PAGES 25 | |
88 | #define KVM_MAX_CPUID_ENTRIES 40 | |
9ba075a6 | 89 | #define KVM_NR_VAR_MTRR 8 |
d657a98e | 90 | |
e9b11c17 ZX |
91 | extern spinlock_t kvm_lock; |
92 | extern struct list_head vm_list; | |
93 | ||
d657a98e ZX |
94 | struct kvm_vcpu; |
95 | struct kvm; | |
96 | ||
5fdbf976 | 97 | enum kvm_reg { |
2b3ccfa0 ZX |
98 | VCPU_REGS_RAX = 0, |
99 | VCPU_REGS_RCX = 1, | |
100 | VCPU_REGS_RDX = 2, | |
101 | VCPU_REGS_RBX = 3, | |
102 | VCPU_REGS_RSP = 4, | |
103 | VCPU_REGS_RBP = 5, | |
104 | VCPU_REGS_RSI = 6, | |
105 | VCPU_REGS_RDI = 7, | |
106 | #ifdef CONFIG_X86_64 | |
107 | VCPU_REGS_R8 = 8, | |
108 | VCPU_REGS_R9 = 9, | |
109 | VCPU_REGS_R10 = 10, | |
110 | VCPU_REGS_R11 = 11, | |
111 | VCPU_REGS_R12 = 12, | |
112 | VCPU_REGS_R13 = 13, | |
113 | VCPU_REGS_R14 = 14, | |
114 | VCPU_REGS_R15 = 15, | |
115 | #endif | |
5fdbf976 | 116 | VCPU_REGS_RIP, |
2b3ccfa0 ZX |
117 | NR_VCPU_REGS |
118 | }; | |
119 | ||
120 | enum { | |
81609e3e | 121 | VCPU_SREG_ES, |
2b3ccfa0 | 122 | VCPU_SREG_CS, |
81609e3e | 123 | VCPU_SREG_SS, |
2b3ccfa0 | 124 | VCPU_SREG_DS, |
2b3ccfa0 ZX |
125 | VCPU_SREG_FS, |
126 | VCPU_SREG_GS, | |
2b3ccfa0 ZX |
127 | VCPU_SREG_TR, |
128 | VCPU_SREG_LDTR, | |
129 | }; | |
130 | ||
edf88417 | 131 | #include <asm/kvm_x86_emulate.h> |
2b3ccfa0 | 132 | |
d657a98e ZX |
133 | #define KVM_NR_MEM_OBJS 40 |
134 | ||
69a9f69b AK |
135 | struct kvm_guest_debug { |
136 | int enabled; | |
137 | unsigned long bp[4]; | |
138 | int singlestep; | |
139 | }; | |
140 | ||
d657a98e ZX |
141 | /* |
142 | * We don't want allocation failures within the mmu code, so we preallocate | |
143 | * enough memory for a single page fault in a cache. | |
144 | */ | |
145 | struct kvm_mmu_memory_cache { | |
146 | int nobjs; | |
147 | void *objects[KVM_NR_MEM_OBJS]; | |
148 | }; | |
149 | ||
150 | #define NR_PTE_CHAIN_ENTRIES 5 | |
151 | ||
152 | struct kvm_pte_chain { | |
153 | u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES]; | |
154 | struct hlist_node link; | |
155 | }; | |
156 | ||
157 | /* | |
158 | * kvm_mmu_page_role, below, is defined as: | |
159 | * | |
160 | * bits 0:3 - total guest paging levels (2-4, or zero for real mode) | |
161 | * bits 4:7 - page table level for this shadow (1-4) | |
162 | * bits 8:9 - page table quadrant for 2-level guests | |
163 | * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode) | |
164 | * bits 17:19 - common access permissions for all ptes in this shadow page | |
165 | */ | |
166 | union kvm_mmu_page_role { | |
167 | unsigned word; | |
168 | struct { | |
7d76b4d3 JP |
169 | unsigned glevels:4; |
170 | unsigned level:4; | |
171 | unsigned quadrant:2; | |
172 | unsigned pad_for_nice_hex_output:6; | |
173 | unsigned metaphysical:1; | |
174 | unsigned access:3; | |
2e53d63a | 175 | unsigned invalid:1; |
d657a98e ZX |
176 | }; |
177 | }; | |
178 | ||
179 | struct kvm_mmu_page { | |
180 | struct list_head link; | |
181 | struct hlist_node hash_link; | |
182 | ||
183 | /* | |
184 | * The following two entries are used to key the shadow page in the | |
185 | * hash table. | |
186 | */ | |
187 | gfn_t gfn; | |
188 | union kvm_mmu_page_role role; | |
189 | ||
190 | u64 *spt; | |
191 | /* hold the gfn of each spte inside spt */ | |
192 | gfn_t *gfns; | |
193 | unsigned long slot_bitmap; /* One bit set per slot which has memory | |
194 | * in this shadow page. | |
195 | */ | |
196 | int multimapped; /* More than one parent_pte? */ | |
197 | int root_count; /* Currently serving as active root */ | |
198 | union { | |
199 | u64 *parent_pte; /* !multimapped */ | |
200 | struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */ | |
201 | }; | |
202 | }; | |
203 | ||
6ad18fba DH |
204 | struct kvm_pv_mmu_op_buffer { |
205 | void *ptr; | |
206 | unsigned len; | |
207 | unsigned processed; | |
208 | char buf[512] __aligned(sizeof(long)); | |
209 | }; | |
210 | ||
d657a98e ZX |
211 | /* |
212 | * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level | |
213 | * 32-bit). The kvm_mmu structure abstracts the details of the current mmu | |
214 | * mode. | |
215 | */ | |
216 | struct kvm_mmu { | |
217 | void (*new_cr3)(struct kvm_vcpu *vcpu); | |
218 | int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err); | |
219 | void (*free)(struct kvm_vcpu *vcpu); | |
220 | gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva); | |
221 | void (*prefetch_page)(struct kvm_vcpu *vcpu, | |
222 | struct kvm_mmu_page *page); | |
223 | hpa_t root_hpa; | |
224 | int root_level; | |
225 | int shadow_root_level; | |
226 | ||
227 | u64 *pae_root; | |
228 | }; | |
229 | ||
ad312c7c | 230 | struct kvm_vcpu_arch { |
34c16eec ZX |
231 | u64 host_tsc; |
232 | int interrupt_window_open; | |
233 | unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */ | |
234 | DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS); | |
5fdbf976 MT |
235 | /* |
236 | * rip and regs accesses must go through | |
237 | * kvm_{register,rip}_{read,write} functions. | |
238 | */ | |
239 | unsigned long regs[NR_VCPU_REGS]; | |
240 | u32 regs_avail; | |
241 | u32 regs_dirty; | |
34c16eec ZX |
242 | |
243 | unsigned long cr0; | |
244 | unsigned long cr2; | |
245 | unsigned long cr3; | |
246 | unsigned long cr4; | |
247 | unsigned long cr8; | |
248 | u64 pdptrs[4]; /* pae */ | |
249 | u64 shadow_efer; | |
250 | u64 apic_base; | |
251 | struct kvm_lapic *apic; /* kernel irqchip context */ | |
34c16eec ZX |
252 | int mp_state; |
253 | int sipi_vector; | |
254 | u64 ia32_misc_enable_msr; | |
b209749f | 255 | bool tpr_access_reporting; |
34c16eec ZX |
256 | |
257 | struct kvm_mmu mmu; | |
6ad18fba DH |
258 | /* only needed in kvm_pv_mmu_op() path, but it's hot so |
259 | * put it here to avoid allocation */ | |
260 | struct kvm_pv_mmu_op_buffer mmu_op_buffer; | |
34c16eec ZX |
261 | |
262 | struct kvm_mmu_memory_cache mmu_pte_chain_cache; | |
263 | struct kvm_mmu_memory_cache mmu_rmap_desc_cache; | |
264 | struct kvm_mmu_memory_cache mmu_page_cache; | |
265 | struct kvm_mmu_memory_cache mmu_page_header_cache; | |
266 | ||
267 | gfn_t last_pt_write_gfn; | |
268 | int last_pt_write_count; | |
269 | u64 *last_pte_updated; | |
1b7fcd32 | 270 | gfn_t last_pte_gfn; |
34c16eec | 271 | |
d7824fff | 272 | struct { |
35149e21 AL |
273 | gfn_t gfn; /* presumed gfn during guest pte update */ |
274 | pfn_t pfn; /* pfn corresponding to that gfn */ | |
05da4558 | 275 | int largepage; |
e930bffe | 276 | unsigned long mmu_seq; |
d7824fff AK |
277 | } update_pte; |
278 | ||
34c16eec ZX |
279 | struct i387_fxsave_struct host_fx_image; |
280 | struct i387_fxsave_struct guest_fx_image; | |
281 | ||
282 | gva_t mmio_fault_cr2; | |
283 | struct kvm_pio_request pio; | |
284 | void *pio_data; | |
285 | ||
298101da AK |
286 | struct kvm_queued_exception { |
287 | bool pending; | |
288 | bool has_error_code; | |
289 | u8 nr; | |
290 | u32 error_code; | |
291 | } exception; | |
292 | ||
937a7eae AK |
293 | struct kvm_queued_interrupt { |
294 | bool pending; | |
295 | u8 nr; | |
296 | } interrupt; | |
297 | ||
34c16eec ZX |
298 | struct { |
299 | int active; | |
300 | u8 save_iopl; | |
301 | struct kvm_save_segment { | |
302 | u16 selector; | |
303 | unsigned long base; | |
304 | u32 limit; | |
305 | u32 ar; | |
306 | } tr, es, ds, fs, gs; | |
307 | } rmode; | |
308 | int halt_request; /* real mode on Intel only */ | |
309 | ||
310 | int cpuid_nent; | |
07716717 | 311 | struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES]; |
34c16eec ZX |
312 | /* emulate context */ |
313 | ||
314 | struct x86_emulate_ctxt emulate_ctxt; | |
18068523 GOC |
315 | |
316 | gpa_t time; | |
50d0a0f9 GH |
317 | struct pvclock_vcpu_time_info hv_clock; |
318 | unsigned int hv_clock_tsc_khz; | |
18068523 GOC |
319 | unsigned int time_offset; |
320 | struct page *time_page; | |
3419ffc8 SY |
321 | |
322 | bool nmi_pending; | |
668f612f | 323 | bool nmi_injected; |
9ba075a6 AK |
324 | |
325 | u64 mtrr[0x100]; | |
34c16eec ZX |
326 | }; |
327 | ||
d69fb81f ZX |
328 | struct kvm_mem_alias { |
329 | gfn_t base_gfn; | |
330 | unsigned long npages; | |
331 | gfn_t target_gfn; | |
332 | }; | |
333 | ||
564f1537 AK |
334 | struct kvm_irq_ack_notifier { |
335 | struct hlist_node link; | |
336 | unsigned gsi; | |
337 | void (*irq_acked)(struct kvm_irq_ack_notifier *kian); | |
338 | }; | |
339 | ||
4d5c5d0f BAY |
340 | struct kvm_assigned_dev_kernel { |
341 | struct kvm_irq_ack_notifier ack_notifier; | |
342 | struct work_struct interrupt_work; | |
343 | struct list_head list; | |
344 | struct kvm_assigned_pci_dev assigned_dev; | |
345 | int assigned_dev_id; | |
346 | int host_busnr; | |
347 | int host_devfn; | |
348 | int host_irq; | |
349 | int guest_irq; | |
350 | int irq_requested; | |
351 | struct pci_dev *dev; | |
352 | struct kvm *kvm; | |
353 | }; | |
354 | ||
d69fb81f ZX |
355 | struct kvm_arch{ |
356 | int naliases; | |
357 | struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS]; | |
f05e70ac ZX |
358 | |
359 | unsigned int n_free_mmu_pages; | |
360 | unsigned int n_requested_mmu_pages; | |
361 | unsigned int n_alloc_mmu_pages; | |
362 | struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES]; | |
363 | /* | |
364 | * Hash table of struct kvm_mmu_page. | |
365 | */ | |
366 | struct list_head active_mmu_pages; | |
4d5c5d0f | 367 | struct list_head assigned_dev_head; |
d7deeeb0 ZX |
368 | struct kvm_pic *vpic; |
369 | struct kvm_ioapic *vioapic; | |
7837699f | 370 | struct kvm_pit *vpit; |
564f1537 | 371 | struct hlist_head irq_ack_notifier_list; |
bfc6d222 ZX |
372 | |
373 | int round_robin_prev_vcpu; | |
374 | unsigned int tss_addr; | |
375 | struct page *apic_access_page; | |
18068523 GOC |
376 | |
377 | gpa_t wall_clock; | |
b7ebfb05 SY |
378 | |
379 | struct page *ept_identity_pagetable; | |
380 | bool ept_identity_pagetable_done; | |
d69fb81f ZX |
381 | }; |
382 | ||
0711456c ZX |
383 | struct kvm_vm_stat { |
384 | u32 mmu_shadow_zapped; | |
385 | u32 mmu_pte_write; | |
386 | u32 mmu_pte_updated; | |
387 | u32 mmu_pde_zapped; | |
388 | u32 mmu_flooded; | |
389 | u32 mmu_recycled; | |
dfc5aa00 | 390 | u32 mmu_cache_miss; |
0711456c | 391 | u32 remote_tlb_flush; |
05da4558 | 392 | u32 lpages; |
0711456c ZX |
393 | }; |
394 | ||
77b4c255 ZX |
395 | struct kvm_vcpu_stat { |
396 | u32 pf_fixed; | |
397 | u32 pf_guest; | |
398 | u32 tlb_flush; | |
399 | u32 invlpg; | |
400 | ||
401 | u32 exits; | |
402 | u32 io_exits; | |
403 | u32 mmio_exits; | |
404 | u32 signal_exits; | |
405 | u32 irq_window_exits; | |
f08864b4 | 406 | u32 nmi_window_exits; |
77b4c255 ZX |
407 | u32 halt_exits; |
408 | u32 halt_wakeup; | |
409 | u32 request_irq_exits; | |
410 | u32 irq_exits; | |
411 | u32 host_state_reload; | |
412 | u32 efer_reload; | |
413 | u32 fpu_reload; | |
414 | u32 insn_emulation; | |
415 | u32 insn_emulation_fail; | |
f11c3a8d | 416 | u32 hypercalls; |
77b4c255 | 417 | }; |
ad312c7c | 418 | |
e01a1b57 HB |
419 | struct descriptor_table { |
420 | u16 limit; | |
421 | unsigned long base; | |
422 | } __attribute__((packed)); | |
423 | ||
ea4a5ff8 ZX |
424 | struct kvm_x86_ops { |
425 | int (*cpu_has_kvm_support)(void); /* __init */ | |
426 | int (*disabled_by_bios)(void); /* __init */ | |
427 | void (*hardware_enable)(void *dummy); /* __init */ | |
428 | void (*hardware_disable)(void *dummy); | |
429 | void (*check_processor_compatibility)(void *rtn); | |
430 | int (*hardware_setup)(void); /* __init */ | |
431 | void (*hardware_unsetup)(void); /* __exit */ | |
774ead3a | 432 | bool (*cpu_has_accelerated_tpr)(void); |
ea4a5ff8 ZX |
433 | |
434 | /* Create, but do not attach this VCPU */ | |
435 | struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id); | |
436 | void (*vcpu_free)(struct kvm_vcpu *vcpu); | |
437 | int (*vcpu_reset)(struct kvm_vcpu *vcpu); | |
438 | ||
439 | void (*prepare_guest_switch)(struct kvm_vcpu *vcpu); | |
440 | void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu); | |
441 | void (*vcpu_put)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 ZX |
442 | |
443 | int (*set_guest_debug)(struct kvm_vcpu *vcpu, | |
444 | struct kvm_debug_guest *dbg); | |
445 | void (*guest_debug_pre)(struct kvm_vcpu *vcpu); | |
446 | int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata); | |
447 | int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
448 | u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg); | |
449 | void (*get_segment)(struct kvm_vcpu *vcpu, | |
450 | struct kvm_segment *var, int seg); | |
2e4d2653 | 451 | int (*get_cpl)(struct kvm_vcpu *vcpu); |
ea4a5ff8 ZX |
452 | void (*set_segment)(struct kvm_vcpu *vcpu, |
453 | struct kvm_segment *var, int seg); | |
454 | void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l); | |
455 | void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu); | |
456 | void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0); | |
457 | void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3); | |
458 | void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4); | |
459 | void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer); | |
460 | void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
461 | void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
462 | void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
463 | void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt); | |
464 | unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr); | |
465 | void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value, | |
466 | int *exception); | |
5fdbf976 | 467 | void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg); |
ea4a5ff8 ZX |
468 | unsigned long (*get_rflags)(struct kvm_vcpu *vcpu); |
469 | void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags); | |
470 | ||
471 | void (*tlb_flush)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 | 472 | |
ea4a5ff8 ZX |
473 | void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run); |
474 | int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu); | |
475 | void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu); | |
476 | void (*patch_hypercall)(struct kvm_vcpu *vcpu, | |
477 | unsigned char *hypercall_addr); | |
478 | int (*get_irq)(struct kvm_vcpu *vcpu); | |
479 | void (*set_irq)(struct kvm_vcpu *vcpu, int vec); | |
298101da AK |
480 | void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr, |
481 | bool has_error_code, u32 error_code); | |
482 | bool (*exception_injected)(struct kvm_vcpu *vcpu); | |
ea4a5ff8 ZX |
483 | void (*inject_pending_irq)(struct kvm_vcpu *vcpu); |
484 | void (*inject_pending_vectors)(struct kvm_vcpu *vcpu, | |
485 | struct kvm_run *run); | |
486 | ||
487 | int (*set_tss_addr)(struct kvm *kvm, unsigned int addr); | |
67253af5 | 488 | int (*get_tdp_level)(void); |
ea4a5ff8 ZX |
489 | }; |
490 | ||
97896d04 ZX |
491 | extern struct kvm_x86_ops *kvm_x86_ops; |
492 | ||
54f1585a ZX |
493 | int kvm_mmu_module_init(void); |
494 | void kvm_mmu_module_exit(void); | |
495 | ||
496 | void kvm_mmu_destroy(struct kvm_vcpu *vcpu); | |
497 | int kvm_mmu_create(struct kvm_vcpu *vcpu); | |
498 | int kvm_mmu_setup(struct kvm_vcpu *vcpu); | |
499 | void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte); | |
7b52345e SY |
500 | void kvm_mmu_set_base_ptes(u64 base_pte); |
501 | void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, | |
502 | u64 dirty_mask, u64 nx_mask, u64 x_mask); | |
54f1585a ZX |
503 | |
504 | int kvm_mmu_reset_context(struct kvm_vcpu *vcpu); | |
505 | void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot); | |
506 | void kvm_mmu_zap_all(struct kvm *kvm); | |
3ad82a7e | 507 | unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm); |
54f1585a ZX |
508 | void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages); |
509 | ||
cc4b6871 JR |
510 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); |
511 | ||
3200f405 | 512 | int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa, |
9f811285 | 513 | const void *val, int bytes); |
2f333bcb MT |
514 | int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes, |
515 | gpa_t addr, unsigned long *ret); | |
516 | ||
517 | extern bool tdp_enabled; | |
9f811285 | 518 | |
54f1585a ZX |
519 | enum emulation_result { |
520 | EMULATE_DONE, /* no further processing */ | |
521 | EMULATE_DO_MMIO, /* kvm_run filled with mmio request */ | |
522 | EMULATE_FAIL, /* can't emulate this instruction */ | |
523 | }; | |
524 | ||
571008da SY |
525 | #define EMULTYPE_NO_DECODE (1 << 0) |
526 | #define EMULTYPE_TRAP_UD (1 << 1) | |
54f1585a | 527 | int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run, |
571008da | 528 | unsigned long cr2, u16 error_code, int emulation_type); |
54f1585a ZX |
529 | void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context); |
530 | void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
531 | void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address); | |
532 | void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw, | |
533 | unsigned long *rflags); | |
534 | ||
535 | unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr); | |
536 | void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value, | |
537 | unsigned long *rflags); | |
f2b4b7dd | 538 | void kvm_enable_efer_bits(u64); |
54f1585a ZX |
539 | int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data); |
540 | int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data); | |
541 | ||
542 | struct x86_emulate_ctxt; | |
543 | ||
544 | int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | |
545 | int size, unsigned port); | |
546 | int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in, | |
547 | int size, unsigned long count, int down, | |
548 | gva_t address, int rep, unsigned port); | |
549 | void kvm_emulate_cpuid(struct kvm_vcpu *vcpu); | |
550 | int kvm_emulate_halt(struct kvm_vcpu *vcpu); | |
551 | int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address); | |
552 | int emulate_clts(struct kvm_vcpu *vcpu); | |
553 | int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, | |
554 | unsigned long *dest); | |
555 | int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, | |
556 | unsigned long value); | |
557 | ||
3e6e0aab GT |
558 | void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg); |
559 | int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, | |
560 | int type_bits, int seg); | |
561 | ||
37817f29 IE |
562 | int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason); |
563 | ||
2d3ad1f4 | 564 | void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0); |
9c20456a JR |
565 | void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3); |
566 | void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4); | |
567 | void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8); | |
2d3ad1f4 AK |
568 | unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu); |
569 | void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw); | |
54f1585a ZX |
570 | void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l); |
571 | ||
572 | int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata); | |
573 | int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data); | |
574 | ||
298101da AK |
575 | void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr); |
576 | void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code); | |
c3c91fee AK |
577 | void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2, |
578 | u32 error_code); | |
298101da | 579 | |
3419ffc8 SY |
580 | void kvm_inject_nmi(struct kvm_vcpu *vcpu); |
581 | ||
54f1585a ZX |
582 | void fx_init(struct kvm_vcpu *vcpu); |
583 | ||
584 | int emulator_read_std(unsigned long addr, | |
585 | void *val, | |
586 | unsigned int bytes, | |
587 | struct kvm_vcpu *vcpu); | |
588 | int emulator_write_emulated(unsigned long addr, | |
589 | const void *val, | |
590 | unsigned int bytes, | |
591 | struct kvm_vcpu *vcpu); | |
592 | ||
593 | unsigned long segment_base(u16 selector); | |
594 | ||
d835dfec | 595 | void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu); |
54f1585a ZX |
596 | void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa, |
597 | const u8 *new, int bytes); | |
598 | int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva); | |
599 | void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu); | |
600 | int kvm_mmu_load(struct kvm_vcpu *vcpu); | |
601 | void kvm_mmu_unload(struct kvm_vcpu *vcpu); | |
602 | ||
603 | int kvm_emulate_hypercall(struct kvm_vcpu *vcpu); | |
604 | ||
605 | int kvm_fix_hypercall(struct kvm_vcpu *vcpu); | |
606 | ||
3067714c | 607 | int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code); |
34c16eec | 608 | |
18552672 | 609 | void kvm_enable_tdp(void); |
5f4cb662 | 610 | void kvm_disable_tdp(void); |
18552672 | 611 | |
a03490ed | 612 | int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3); |
de7d789a | 613 | int complete_pio(struct kvm_vcpu *vcpu); |
ec6d273d ZX |
614 | |
615 | static inline struct kvm_mmu_page *page_header(hpa_t shadow_page) | |
616 | { | |
617 | struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT); | |
618 | ||
619 | return (struct kvm_mmu_page *)page_private(page); | |
620 | } | |
621 | ||
d6e88aec | 622 | static inline u16 kvm_read_fs(void) |
ec6d273d ZX |
623 | { |
624 | u16 seg; | |
625 | asm("mov %%fs, %0" : "=g"(seg)); | |
626 | return seg; | |
627 | } | |
628 | ||
d6e88aec | 629 | static inline u16 kvm_read_gs(void) |
ec6d273d ZX |
630 | { |
631 | u16 seg; | |
632 | asm("mov %%gs, %0" : "=g"(seg)); | |
633 | return seg; | |
634 | } | |
635 | ||
d6e88aec | 636 | static inline u16 kvm_read_ldt(void) |
ec6d273d ZX |
637 | { |
638 | u16 ldt; | |
639 | asm("sldt %0" : "=g"(ldt)); | |
640 | return ldt; | |
641 | } | |
642 | ||
d6e88aec | 643 | static inline void kvm_load_fs(u16 sel) |
ec6d273d ZX |
644 | { |
645 | asm("mov %0, %%fs" : : "rm"(sel)); | |
646 | } | |
647 | ||
d6e88aec | 648 | static inline void kvm_load_gs(u16 sel) |
ec6d273d ZX |
649 | { |
650 | asm("mov %0, %%gs" : : "rm"(sel)); | |
651 | } | |
652 | ||
d6e88aec | 653 | static inline void kvm_load_ldt(u16 sel) |
ec6d273d ZX |
654 | { |
655 | asm("lldt %0" : : "rm"(sel)); | |
656 | } | |
ec6d273d | 657 | |
d6e88aec | 658 | static inline void kvm_get_idt(struct descriptor_table *table) |
ec6d273d ZX |
659 | { |
660 | asm("sidt %0" : "=m"(*table)); | |
661 | } | |
662 | ||
d6e88aec | 663 | static inline void kvm_get_gdt(struct descriptor_table *table) |
ec6d273d ZX |
664 | { |
665 | asm("sgdt %0" : "=m"(*table)); | |
666 | } | |
667 | ||
d6e88aec | 668 | static inline unsigned long kvm_read_tr_base(void) |
ec6d273d ZX |
669 | { |
670 | u16 tr; | |
671 | asm("str %0" : "=g"(tr)); | |
672 | return segment_base(tr); | |
673 | } | |
674 | ||
675 | #ifdef CONFIG_X86_64 | |
676 | static inline unsigned long read_msr(unsigned long msr) | |
677 | { | |
678 | u64 value; | |
679 | ||
680 | rdmsrl(msr, value); | |
681 | return value; | |
682 | } | |
683 | #endif | |
684 | ||
d6e88aec | 685 | static inline void kvm_fx_save(struct i387_fxsave_struct *image) |
ec6d273d ZX |
686 | { |
687 | asm("fxsave (%0)":: "r" (image)); | |
688 | } | |
689 | ||
d6e88aec | 690 | static inline void kvm_fx_restore(struct i387_fxsave_struct *image) |
ec6d273d ZX |
691 | { |
692 | asm("fxrstor (%0)":: "r" (image)); | |
693 | } | |
694 | ||
d6e88aec | 695 | static inline void kvm_fx_finit(void) |
ec6d273d ZX |
696 | { |
697 | asm("finit"); | |
698 | } | |
699 | ||
700 | static inline u32 get_rdx_init_val(void) | |
701 | { | |
702 | return 0x600; /* P6 family */ | |
703 | } | |
704 | ||
c1a5d4f9 AK |
705 | static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code) |
706 | { | |
707 | kvm_queue_exception_e(vcpu, GP_VECTOR, error_code); | |
708 | } | |
709 | ||
ec6d273d ZX |
710 | #define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30" |
711 | #define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2" | |
712 | #define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3" | |
713 | #define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30" | |
714 | #define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0" | |
715 | #define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0" | |
716 | #define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4" | |
717 | #define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4" | |
718 | #define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30" | |
1439442c | 719 | #define ASM_VMX_INVEPT ".byte 0x66, 0x0f, 0x38, 0x80, 0x08" |
2384d2b3 | 720 | #define ASM_VMX_INVVPID ".byte 0x66, 0x0f, 0x38, 0x81, 0x08" |
ec6d273d ZX |
721 | |
722 | #define MSR_IA32_TIME_STAMP_COUNTER 0x010 | |
723 | ||
724 | #define TSS_IOPB_BASE_OFFSET 0x66 | |
725 | #define TSS_BASE_SIZE 0x68 | |
726 | #define TSS_IOPB_SIZE (65536 / 8) | |
727 | #define TSS_REDIRECTION_SIZE (256 / 8) | |
7d76b4d3 JP |
728 | #define RMODE_TSS_SIZE \ |
729 | (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1) | |
53e0aa7b | 730 | |
37817f29 IE |
731 | enum { |
732 | TASK_SWITCH_CALL = 0, | |
733 | TASK_SWITCH_IRET = 1, | |
734 | TASK_SWITCH_JMP = 2, | |
735 | TASK_SWITCH_GATE = 3, | |
736 | }; | |
737 | ||
2714d1d3 | 738 | |
4ecac3fd | 739 | #ifdef CONFIG_64BIT |
33a37eb4 IM |
740 | # define KVM_EX_ENTRY ".quad" |
741 | # define KVM_EX_PUSH "pushq" | |
4ecac3fd | 742 | #else |
33a37eb4 IM |
743 | # define KVM_EX_ENTRY ".long" |
744 | # define KVM_EX_PUSH "pushl" | |
4ecac3fd AK |
745 | #endif |
746 | ||
747 | /* | |
748 | * Hardware virtualization extension instructions may fault if a | |
749 | * reboot turns off virtualization while processes are running. | |
750 | * Trap the fault and ignore the instruction if that happens. | |
751 | */ | |
752 | asmlinkage void kvm_handle_fault_on_reboot(void); | |
753 | ||
754 | #define __kvm_handle_fault_on_reboot(insn) \ | |
755 | "666: " insn "\n\t" \ | |
18b13e54 | 756 | ".pushsection .fixup, \"ax\" \n" \ |
4ecac3fd | 757 | "667: \n\t" \ |
33a37eb4 | 758 | KVM_EX_PUSH " $666b \n\t" \ |
4ecac3fd AK |
759 | "jmp kvm_handle_fault_on_reboot \n\t" \ |
760 | ".popsection \n\t" \ | |
761 | ".pushsection __ex_table, \"a\" \n\t" \ | |
762 | KVM_EX_ENTRY " 666b, 667b \n\t" \ | |
763 | ".popsection" | |
764 | ||
e930bffe AA |
765 | #define KVM_ARCH_WANT_MMU_NOTIFIER |
766 | int kvm_unmap_hva(struct kvm *kvm, unsigned long hva); | |
767 | int kvm_age_hva(struct kvm *kvm, unsigned long hva); | |
768 | ||
77ef50a5 | 769 | #endif /* ASM_X86__KVM_HOST_H */ |