[mirror_ubuntu-artful-kernel.git] / include / asm-x86 / kvm_host.h

#/*
 * Kernel-based Virtual Machine driver for Linux
 *
 * This header defines architecture specific interfaces, x86 version
 *
 * This work is licensed under the terms of the GNU GPL, version 2.  See
 * the COPYING file in the top-level directory.
 *
 */

#ifndef ASM_KVM_HOST_H
#define ASM_KVM_HOST_H

#include <linux/types.h>
#include <linux/mm.h>

#include <linux/kvm.h>
#include <linux/kvm_para.h>
#include <linux/kvm_types.h>

#include <asm/desc.h>

#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS |	\
				  0xFFFFFF0000000000ULL)

#define KVM_GUEST_CR0_MASK				   \
	(X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \
	 | X86_CR0_NW | X86_CR0_CD)
#define KVM_VM_CR0_ALWAYS_ON						\
	(X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \
	 | X86_CR0_MP)
#define KVM_GUEST_CR4_MASK						\
	(X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE)
#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)

#define INVALID_PAGE (~(hpa_t)0)
#define UNMAPPED_GVA (~(gpa_t)0)

#define DE_VECTOR 0
#define UD_VECTOR 6
#define NM_VECTOR 7
#define DF_VECTOR 8
#define TS_VECTOR 10
#define NP_VECTOR 11
#define SS_VECTOR 12
#define GP_VECTOR 13
#define PF_VECTOR 14

#define SELECTOR_TI_MASK (1 << 2)
#define SELECTOR_RPL_MASK 0x03

#define IOPL_SHIFT 12

#define KVM_ALIAS_SLOTS 4

#define KVM_PERMILLE_MMU_PAGES 20
#define KVM_MIN_ALLOC_MMU_PAGES 64
#define KVM_MMU_HASH_SHIFT 10
#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
#define KVM_MIN_FREE_MMU_PAGES 5
#define KVM_REFILL_PAGES 25
#define KVM_MAX_CPUID_ENTRIES 40

extern spinlock_t kvm_lock;
extern struct list_head vm_list;

struct kvm_vcpu;
struct kvm;

enum {
	VCPU_REGS_RAX = 0,
	VCPU_REGS_RCX = 1,
	VCPU_REGS_RDX = 2,
	VCPU_REGS_RBX = 3,
	VCPU_REGS_RSP = 4,
	VCPU_REGS_RBP = 5,
	VCPU_REGS_RSI = 6,
	VCPU_REGS_RDI = 7,
#ifdef CONFIG_X86_64
	VCPU_REGS_R8 = 8,
	VCPU_REGS_R9 = 9,
	VCPU_REGS_R10 = 10,
	VCPU_REGS_R11 = 11,
	VCPU_REGS_R12 = 12,
	VCPU_REGS_R13 = 13,
	VCPU_REGS_R14 = 14,
	VCPU_REGS_R15 = 15,
#endif
	NR_VCPU_REGS
};

enum {
	VCPU_SREG_CS,
	VCPU_SREG_DS,
	VCPU_SREG_ES,
	VCPU_SREG_FS,
	VCPU_SREG_GS,
	VCPU_SREG_SS,
	VCPU_SREG_TR,
	VCPU_SREG_LDTR,
};

#include <asm/kvm_x86_emulate.h>

#define KVM_NR_MEM_OBJS 40

/*
 * We don't want allocation failures within the mmu code, so we preallocate
 * enough memory for a single page fault in a cache.
 */
struct kvm_mmu_memory_cache {
	int nobjs;
	void *objects[KVM_NR_MEM_OBJS];
};

#define NR_PTE_CHAIN_ENTRIES 5

struct kvm_pte_chain {
	u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
	struct hlist_node link;
};

/*
 * kvm_mmu_page_role, below, is defined as:
 *
 *   bits 0:3 - total guest paging levels (2-4, or zero for real mode)
 *   bits 4:7 - page table level for this shadow (1-4)
 *   bits 8:9 - page table quadrant for 2-level guests
 *   bit   16 - "metaphysical" - gfn is not a real page (huge page/real mode)
 *   bits 17:19 - common access permissions for all ptes in this shadow page
 */
union kvm_mmu_page_role {
	unsigned word;
	struct {
		unsigned glevels:4;
		unsigned level:4;
		unsigned quadrant:2;
		unsigned pad_for_nice_hex_output:6;
		unsigned metaphysical:1;
		unsigned access:3;
	};
};

struct kvm_mmu_page {
	struct list_head link;
	struct hlist_node hash_link;

	/*
	 * The following two entries are used to key the shadow page in the
	 * hash table.
	 */
	gfn_t gfn;
	union kvm_mmu_page_role role;

	u64 *spt;
	/* hold the gfn of each spte inside spt */
	gfn_t *gfns;
	unsigned long slot_bitmap; /* One bit set per slot which has memory
				    * in this shadow page.
				    */
	int multimapped;         /* More than one parent_pte? */
	int root_count;          /* Currently serving as active root */
	union {
		u64 *parent_pte;               /* !multimapped */
		struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
	};
};

/*
 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
 * 32-bit).  The kvm_mmu structure abstracts the details of the current mmu
 * mode.
 */
struct kvm_mmu {
	void (*new_cr3)(struct kvm_vcpu *vcpu);
	int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
	void (*free)(struct kvm_vcpu *vcpu);
	gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
	void (*prefetch_page)(struct kvm_vcpu *vcpu,
			      struct kvm_mmu_page *page);
	hpa_t root_hpa;
	int root_level;
	int shadow_root_level;

	u64 *pae_root;
};

struct kvm_vcpu_arch {
	u64 host_tsc;
	int interrupt_window_open;
	unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
	DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS);
	unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
	unsigned long rip;      /* needs vcpu_load_rsp_rip() */

	unsigned long cr0;
	unsigned long cr2;
	unsigned long cr3;
	unsigned long cr4;
	unsigned long cr8;
	u64 pdptrs[4]; /* pae */
	u64 shadow_efer;
	u64 apic_base;
	struct kvm_lapic *apic;    /* kernel irqchip context */
#define VCPU_MP_STATE_RUNNABLE          0
#define VCPU_MP_STATE_UNINITIALIZED     1
#define VCPU_MP_STATE_INIT_RECEIVED     2
#define VCPU_MP_STATE_SIPI_RECEIVED     3
#define VCPU_MP_STATE_HALTED            4
	int mp_state;
	int sipi_vector;
	u64 ia32_misc_enable_msr;
	bool tpr_access_reporting;

	struct kvm_mmu mmu;

	struct kvm_mmu_memory_cache mmu_pte_chain_cache;
	struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
	struct kvm_mmu_memory_cache mmu_page_cache;
	struct kvm_mmu_memory_cache mmu_page_header_cache;

	gfn_t last_pt_write_gfn;
	int   last_pt_write_count;
	u64  *last_pte_updated;

	struct {
		gfn_t gfn;          /* presumed gfn during guest pte update */
		struct page *page;  /* page corresponding to that gfn */
	} update_pte;

	struct i387_fxsave_struct host_fx_image;
	struct i387_fxsave_struct guest_fx_image;

	gva_t mmio_fault_cr2;
	struct kvm_pio_request pio;
	void *pio_data;

	struct kvm_queued_exception {
		bool pending;
		bool has_error_code;
		u8 nr;
		u32 error_code;
	} exception;

	struct {
		int active;
		u8 save_iopl;
		struct kvm_save_segment {
			u16 selector;
			unsigned long base;
			u32 limit;
			u32 ar;
		} tr, es, ds, fs, gs;
	} rmode;
	int halt_request; /* real mode on Intel only */

	int cpuid_nent;
	struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
	/* emulate context */

	struct x86_emulate_ctxt emulate_ctxt;

	gpa_t time;
	struct kvm_vcpu_time_info hv_clock;
	unsigned int time_offset;
	struct page *time_page;
};

struct kvm_mem_alias {
	gfn_t base_gfn;
	unsigned long npages;
	gfn_t target_gfn;
};

struct kvm_arch{
	int naliases;
	struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];

	unsigned int n_free_mmu_pages;
	unsigned int n_requested_mmu_pages;
	unsigned int n_alloc_mmu_pages;
	struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
	/*
	 * Hash table of struct kvm_mmu_page.
	 */
	struct list_head active_mmu_pages;
	struct kvm_pic *vpic;
	struct kvm_ioapic *vioapic;

	int round_robin_prev_vcpu;
	unsigned int tss_addr;
	struct page *apic_access_page;

	gpa_t wall_clock;
};

struct kvm_vm_stat {
	u32 mmu_shadow_zapped;
	u32 mmu_pte_write;
	u32 mmu_pte_updated;
	u32 mmu_pde_zapped;
	u32 mmu_flooded;
	u32 mmu_recycled;
	u32 mmu_cache_miss;
	u32 remote_tlb_flush;
};

struct kvm_vcpu_stat {
	u32 pf_fixed;
	u32 pf_guest;
	u32 tlb_flush;
	u32 invlpg;

	u32 exits;
	u32 io_exits;
	u32 mmio_exits;
	u32 signal_exits;
	u32 irq_window_exits;
	u32 halt_exits;
	u32 halt_wakeup;
	u32 request_irq_exits;
	u32 irq_exits;
	u32 host_state_reload;
	u32 efer_reload;
	u32 fpu_reload;
	u32 insn_emulation;
	u32 insn_emulation_fail;
};

struct descriptor_table {
	u16 limit;
	unsigned long base;
} __attribute__((packed));

struct kvm_x86_ops {
	int (*cpu_has_kvm_support)(void);          /* __init */
	int (*disabled_by_bios)(void);             /* __init */
	void (*hardware_enable)(void *dummy);      /* __init */
	void (*hardware_disable)(void *dummy);
	void (*check_processor_compatibility)(void *rtn);
	int (*hardware_setup)(void);               /* __init */
	void (*hardware_unsetup)(void);            /* __exit */
	bool (*cpu_has_accelerated_tpr)(void);

	/* Create, but do not attach this VCPU */
	struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
	void (*vcpu_free)(struct kvm_vcpu *vcpu);
	int (*vcpu_reset)(struct kvm_vcpu *vcpu);

	void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
	void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
	void (*vcpu_put)(struct kvm_vcpu *vcpu);
	void (*vcpu_decache)(struct kvm_vcpu *vcpu);

	int (*set_guest_debug)(struct kvm_vcpu *vcpu,
			       struct kvm_debug_guest *dbg);
	void (*guest_debug_pre)(struct kvm_vcpu *vcpu);
	int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
	int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
	u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
	void (*get_segment)(struct kvm_vcpu *vcpu,
			    struct kvm_segment *var, int seg);
	void (*set_segment)(struct kvm_vcpu *vcpu,
			    struct kvm_segment *var, int seg);
	void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
	void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
	void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
	void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
	void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
	void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
	void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
	void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
	void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
	void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
	unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
	void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
		       int *exception);
	void (*cache_regs)(struct kvm_vcpu *vcpu);
	void (*decache_regs)(struct kvm_vcpu *vcpu);
	unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
	void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);

	void (*tlb_flush)(struct kvm_vcpu *vcpu);

	void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
	int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);
	void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
	void (*patch_hypercall)(struct kvm_vcpu *vcpu,
				unsigned char *hypercall_addr);
	int (*get_irq)(struct kvm_vcpu *vcpu);
	void (*set_irq)(struct kvm_vcpu *vcpu, int vec);
	void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
				bool has_error_code, u32 error_code);
	bool (*exception_injected)(struct kvm_vcpu *vcpu);
	void (*inject_pending_irq)(struct kvm_vcpu *vcpu);
	void (*inject_pending_vectors)(struct kvm_vcpu *vcpu,
				       struct kvm_run *run);

	int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
};

extern struct kvm_x86_ops *kvm_x86_ops;

int kvm_mmu_module_init(void);
void kvm_mmu_module_exit(void);

void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
int kvm_mmu_create(struct kvm_vcpu *vcpu);
int kvm_mmu_setup(struct kvm_vcpu *vcpu);
void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);

int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
void kvm_mmu_zap_all(struct kvm *kvm);
unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);

int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);

enum emulation_result {
	EMULATE_DONE,       /* no further processing */
	EMULATE_DO_MMIO,      /* kvm_run filled with mmio request */
	EMULATE_FAIL,         /* can't emulate this instruction */
};

#define EMULTYPE_NO_DECODE	    (1 << 0)
#define EMULTYPE_TRAP_UD	    (1 << 1)
int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
			unsigned long cr2, u16 error_code, int emulation_type);
void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context);
void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
		   unsigned long *rflags);

unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
		     unsigned long *rflags);
void kvm_enable_efer_bits(u64);
int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);

struct x86_emulate_ctxt;

int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
		     int size, unsigned port);
int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
			   int size, unsigned long count, int down,
			    gva_t address, int rep, unsigned port);
void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
int kvm_emulate_halt(struct kvm_vcpu *vcpu);
int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
int emulate_clts(struct kvm_vcpu *vcpu);
int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
		    unsigned long *dest);
int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
		    unsigned long value);

void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0);
void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0);
void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0);
unsigned long get_cr8(struct kvm_vcpu *vcpu);
void lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);

int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);

void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
			   u32 error_code);

void fx_init(struct kvm_vcpu *vcpu);

int emulator_read_std(unsigned long addr,
		      void *val,
		      unsigned int bytes,
		      struct kvm_vcpu *vcpu);
int emulator_write_emulated(unsigned long addr,
			    const void *val,
			    unsigned int bytes,
			    struct kvm_vcpu *vcpu);

unsigned long segment_base(u16 selector);

void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
		       const u8 *new, int bytes);
int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
int kvm_mmu_load(struct kvm_vcpu *vcpu);
void kvm_mmu_unload(struct kvm_vcpu *vcpu);

int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);

int kvm_fix_hypercall(struct kvm_vcpu *vcpu);

int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);

void kvm_enable_tdp(void);

int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
int complete_pio(struct kvm_vcpu *vcpu);

static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
{
	struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);

	return (struct kvm_mmu_page *)page_private(page);
}

static inline u16 read_fs(void)
{
	u16 seg;
	asm("mov %%fs, %0" : "=g"(seg));
	return seg;
}

static inline u16 read_gs(void)
{
	u16 seg;
	asm("mov %%gs, %0" : "=g"(seg));
	return seg;
}

static inline u16 read_ldt(void)
{
	u16 ldt;
	asm("sldt %0" : "=g"(ldt));
	return ldt;
}

static inline void load_fs(u16 sel)
{
	asm("mov %0, %%fs" : : "rm"(sel));
}

static inline void load_gs(u16 sel)
{
	asm("mov %0, %%gs" : : "rm"(sel));
}

#ifndef load_ldt
static inline void load_ldt(u16 sel)
{
	asm("lldt %0" : : "rm"(sel));
}
#endif

static inline void get_idt(struct descriptor_table *table)
{
	asm("sidt %0" : "=m"(*table));
}

static inline void get_gdt(struct descriptor_table *table)
{
	asm("sgdt %0" : "=m"(*table));
}

static inline unsigned long read_tr_base(void)
{
	u16 tr;
	asm("str %0" : "=g"(tr));
	return segment_base(tr);
}

#ifdef CONFIG_X86_64
static inline unsigned long read_msr(unsigned long msr)
{
	u64 value;

	rdmsrl(msr, value);
	return value;
}
#endif

static inline void fx_save(struct i387_fxsave_struct *image)
{
	asm("fxsave (%0)":: "r" (image));
}

static inline void fx_restore(struct i387_fxsave_struct *image)
{
	asm("fxrstor (%0)":: "r" (image));
}

static inline void fpu_init(void)
{
	asm("finit");
}

static inline u32 get_rdx_init_val(void)
{
	return 0x600; /* P6 family */
}

static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
{
	kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
}

#define ASM_VMX_VMCLEAR_RAX       ".byte 0x66, 0x0f, 0xc7, 0x30"
#define ASM_VMX_VMLAUNCH          ".byte 0x0f, 0x01, 0xc2"
#define ASM_VMX_VMRESUME          ".byte 0x0f, 0x01, 0xc3"
#define ASM_VMX_VMPTRLD_RAX       ".byte 0x0f, 0xc7, 0x30"
#define ASM_VMX_VMREAD_RDX_RAX    ".byte 0x0f, 0x78, 0xd0"
#define ASM_VMX_VMWRITE_RAX_RDX   ".byte 0x0f, 0x79, 0xd0"
#define ASM_VMX_VMWRITE_RSP_RDX   ".byte 0x0f, 0x79, 0xd4"
#define ASM_VMX_VMXOFF            ".byte 0x0f, 0x01, 0xc4"
#define ASM_VMX_VMXON_RAX         ".byte 0xf3, 0x0f, 0xc7, 0x30"
#define ASM_VMX_INVVPID		  ".byte 0x66, 0x0f, 0x38, 0x81, 0x08"

#define MSR_IA32_TIME_STAMP_COUNTER		0x010

#define TSS_IOPB_BASE_OFFSET 0x66
#define TSS_BASE_SIZE 0x68
#define TSS_IOPB_SIZE (65536 / 8)
#define TSS_REDIRECTION_SIZE (256 / 8)
#define RMODE_TSS_SIZE							\
	(TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)

#endif
Commit	Line	Data
043405e1 CO	1	#/*
	2	* Kernel-based Virtual Machine driver for Linux
	3	*
	4	* This header defines architecture specific interfaces, x86 version
	5	*
	6	* This work is licensed under the terms of the GNU GPL, version 2. See
	7	* the COPYING file in the top-level directory.
	8	*
	9	*/
	10
edf88417 AK	11	#ifndef ASM_KVM_HOST_H
edf88417 AK	12	#define ASM_KVM_HOST_H
043405e1	13
34c16eec ZX	14	#include <linux/types.h>
	15	#include <linux/mm.h>
	16
	17	#include <linux/kvm.h>
	18	#include <linux/kvm_para.h>
edf88417	19	#include <linux/kvm_types.h>
34c16eec	20
e01a1b57 HB	21	#include <asm/desc.h>
e01a1b57 HB	22
cd6e8f87 ZX	23	#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT \| X86_CR3_PCD) - 1)
cd6e8f87 ZX	24	#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT \| X86_CR3_PCD))
7d76b4d3 JP	25	#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS \| \
7d76b4d3 JP	26	0xFFFFFF0000000000ULL)
cd6e8f87	27
7d76b4d3	28	#define KVM_GUEST_CR0_MASK \
cd6e8f87 ZX	29	(X86_CR0_PG \| X86_CR0_PE \| X86_CR0_WP \| X86_CR0_NE \
cd6e8f87 ZX	30	\| X86_CR0_NW \| X86_CR0_CD)
7d76b4d3	31	#define KVM_VM_CR0_ALWAYS_ON \
cd6e8f87 ZX	32	(X86_CR0_PG \| X86_CR0_PE \| X86_CR0_WP \| X86_CR0_NE \| X86_CR0_TS \
cd6e8f87 ZX	33	\| X86_CR0_MP)
7d76b4d3	34	#define KVM_GUEST_CR4_MASK \
cd6e8f87 ZX	35	(X86_CR4_VME \| X86_CR4_PSE \| X86_CR4_PAE \| X86_CR4_PGE \| X86_CR4_VMXE)
	36	#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE \| X86_CR4_VMXE)
	37	#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME \| X86_CR4_PAE \| X86_CR4_VMXE)
	38
	39	#define INVALID_PAGE (~(hpa_t)0)
	40	#define UNMAPPED_GVA (~(gpa_t)0)
	41
	42	#define DE_VECTOR 0
	43	#define UD_VECTOR 6
	44	#define NM_VECTOR 7
	45	#define DF_VECTOR 8
	46	#define TS_VECTOR 10
	47	#define NP_VECTOR 11
	48	#define SS_VECTOR 12
	49	#define GP_VECTOR 13
	50	#define PF_VECTOR 14
	51
	52	#define SELECTOR_TI_MASK (1 << 2)
	53	#define SELECTOR_RPL_MASK 0x03
	54
	55	#define IOPL_SHIFT 12
	56
d69fb81f ZX	57	#define KVM_ALIAS_SLOTS 4
d69fb81f ZX	58
d657a98e ZX	59	#define KVM_PERMILLE_MMU_PAGES 20
d657a98e ZX	60	#define KVM_MIN_ALLOC_MMU_PAGES 64
1ae0a13d DE	61	#define KVM_MMU_HASH_SHIFT 10
1ae0a13d DE	62	#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
d657a98e ZX	63	#define KVM_MIN_FREE_MMU_PAGES 5
	64	#define KVM_REFILL_PAGES 25
	65	#define KVM_MAX_CPUID_ENTRIES 40
	66
e9b11c17 ZX	67	extern spinlock_t kvm_lock;
	68	extern struct list_head vm_list;
	69
d657a98e ZX	70	struct kvm_vcpu;
	71	struct kvm;
	72
2b3ccfa0 ZX	73	enum {
	74	VCPU_REGS_RAX = 0,
	75	VCPU_REGS_RCX = 1,
	76	VCPU_REGS_RDX = 2,
	77	VCPU_REGS_RBX = 3,
	78	VCPU_REGS_RSP = 4,
	79	VCPU_REGS_RBP = 5,
	80	VCPU_REGS_RSI = 6,
	81	VCPU_REGS_RDI = 7,
	82	#ifdef CONFIG_X86_64
	83	VCPU_REGS_R8 = 8,
	84	VCPU_REGS_R9 = 9,
	85	VCPU_REGS_R10 = 10,
	86	VCPU_REGS_R11 = 11,
	87	VCPU_REGS_R12 = 12,
	88	VCPU_REGS_R13 = 13,
	89	VCPU_REGS_R14 = 14,
	90	VCPU_REGS_R15 = 15,
	91	#endif
	92	NR_VCPU_REGS
	93	};
	94
	95	enum {
	96	VCPU_SREG_CS,
	97	VCPU_SREG_DS,
	98	VCPU_SREG_ES,
	99	VCPU_SREG_FS,
	100	VCPU_SREG_GS,
	101	VCPU_SREG_SS,
	102	VCPU_SREG_TR,
	103	VCPU_SREG_LDTR,
	104	};
	105
edf88417	106	#include <asm/kvm_x86_emulate.h>
2b3ccfa0	107
d657a98e ZX	108	#define KVM_NR_MEM_OBJS 40
	109
	110	/*
	111	* We don't want allocation failures within the mmu code, so we preallocate
	112	* enough memory for a single page fault in a cache.
	113	*/
	114	struct kvm_mmu_memory_cache {
	115	int nobjs;
	116	void *objects[KVM_NR_MEM_OBJS];
	117	};
	118
	119	#define NR_PTE_CHAIN_ENTRIES 5
	120
	121	struct kvm_pte_chain {
	122	u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
	123	struct hlist_node link;
	124	};
	125
	126	/*
	127	* kvm_mmu_page_role, below, is defined as:
	128	*
	129	* bits 0:3 - total guest paging levels (2-4, or zero for real mode)
	130	* bits 4:7 - page table level for this shadow (1-4)
	131	* bits 8:9 - page table quadrant for 2-level guests
	132	* bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
	133	* bits 17:19 - common access permissions for all ptes in this shadow page
	134	*/
	135	union kvm_mmu_page_role {
	136	unsigned word;
	137	struct {
7d76b4d3 JP	138	unsigned glevels:4;
	139	unsigned level:4;
	140	unsigned quadrant:2;
	141	unsigned pad_for_nice_hex_output:6;
	142	unsigned metaphysical:1;
	143	unsigned access:3;
d657a98e ZX	144	};
	145	};
	146
	147	struct kvm_mmu_page {
	148	struct list_head link;
	149	struct hlist_node hash_link;
	150
	151	/*
	152	* The following two entries are used to key the shadow page in the
	153	* hash table.
	154	*/
	155	gfn_t gfn;
	156	union kvm_mmu_page_role role;
	157
	158	u64 *spt;
	159	/* hold the gfn of each spte inside spt */
	160	gfn_t *gfns;
	161	unsigned long slot_bitmap; /* One bit set per slot which has memory
	162	* in this shadow page.
	163	*/
	164	int multimapped; /* More than one parent_pte? */
	165	int root_count; /* Currently serving as active root */
	166	union {
	167	u64 parent_pte; / !multimapped */
	168	struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
	169	};
	170	};
	171
	172	/*
	173	* x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
	174	* 32-bit). The kvm_mmu structure abstracts the details of the current mmu
	175	* mode.
	176	*/
	177	struct kvm_mmu {
	178	void (new_cr3)(struct kvm_vcpu vcpu);
	179	int (page_fault)(struct kvm_vcpu vcpu, gva_t gva, u32 err);
	180	void (free)(struct kvm_vcpu vcpu);
	181	gpa_t (gva_to_gpa)(struct kvm_vcpu vcpu, gva_t gva);
	182	void (prefetch_page)(struct kvm_vcpu vcpu,
	183	struct kvm_mmu_page *page);
	184	hpa_t root_hpa;
	185	int root_level;
	186	int shadow_root_level;
	187
	188	u64 *pae_root;
	189	};
	190
ad312c7c	191	struct kvm_vcpu_arch {
34c16eec ZX	192	u64 host_tsc;
	193	int interrupt_window_open;
	194	unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
	195	DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS);
	196	unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
	197	unsigned long rip; /* needs vcpu_load_rsp_rip() */
	198
	199	unsigned long cr0;
	200	unsigned long cr2;
	201	unsigned long cr3;
	202	unsigned long cr4;
	203	unsigned long cr8;
	204	u64 pdptrs[4]; /* pae */
	205	u64 shadow_efer;
	206	u64 apic_base;
	207	struct kvm_lapic apic; / kernel irqchip context */
	208	#define VCPU_MP_STATE_RUNNABLE 0
	209	#define VCPU_MP_STATE_UNINITIALIZED 1
	210	#define VCPU_MP_STATE_INIT_RECEIVED 2
	211	#define VCPU_MP_STATE_SIPI_RECEIVED 3
	212	#define VCPU_MP_STATE_HALTED 4
	213	int mp_state;
	214	int sipi_vector;
	215	u64 ia32_misc_enable_msr;
b209749f	216	bool tpr_access_reporting;
34c16eec ZX	217
	218	struct kvm_mmu mmu;
	219
	220	struct kvm_mmu_memory_cache mmu_pte_chain_cache;
	221	struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
	222	struct kvm_mmu_memory_cache mmu_page_cache;
	223	struct kvm_mmu_memory_cache mmu_page_header_cache;
	224
	225	gfn_t last_pt_write_gfn;
	226	int last_pt_write_count;
	227	u64 *last_pte_updated;
	228
d7824fff AK	229	struct {
	230	gfn_t gfn; /* presumed gfn during guest pte update */
	231	struct page page; / page corresponding to that gfn */
	232	} update_pte;
	233
34c16eec ZX	234	struct i387_fxsave_struct host_fx_image;
	235	struct i387_fxsave_struct guest_fx_image;
	236
	237	gva_t mmio_fault_cr2;
	238	struct kvm_pio_request pio;
	239	void *pio_data;
	240
298101da AK	241	struct kvm_queued_exception {
	242	bool pending;
	243	bool has_error_code;
	244	u8 nr;
	245	u32 error_code;
	246	} exception;
	247
34c16eec ZX	248	struct {
	249	int active;
	250	u8 save_iopl;
	251	struct kvm_save_segment {
	252	u16 selector;
	253	unsigned long base;
	254	u32 limit;
	255	u32 ar;
	256	} tr, es, ds, fs, gs;
	257	} rmode;
	258	int halt_request; /* real mode on Intel only */
	259
	260	int cpuid_nent;
07716717	261	struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
34c16eec ZX	262	/* emulate context */
	263
	264	struct x86_emulate_ctxt emulate_ctxt;
18068523 GOC	265
	266	gpa_t time;
	267	struct kvm_vcpu_time_info hv_clock;
	268	unsigned int time_offset;
	269	struct page *time_page;
34c16eec ZX	270	};
34c16eec ZX	271
d69fb81f ZX	272	struct kvm_mem_alias {
	273	gfn_t base_gfn;
	274	unsigned long npages;
	275	gfn_t target_gfn;
	276	};
	277
	278	struct kvm_arch{
	279	int naliases;
	280	struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
f05e70ac ZX	281
	282	unsigned int n_free_mmu_pages;
	283	unsigned int n_requested_mmu_pages;
	284	unsigned int n_alloc_mmu_pages;
	285	struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
	286	/*
	287	* Hash table of struct kvm_mmu_page.
	288	*/
	289	struct list_head active_mmu_pages;
d7deeeb0 ZX	290	struct kvm_pic *vpic;
d7deeeb0 ZX	291	struct kvm_ioapic *vioapic;
bfc6d222 ZX	292
	293	int round_robin_prev_vcpu;
	294	unsigned int tss_addr;
	295	struct page *apic_access_page;
18068523 GOC	296
18068523 GOC	297	gpa_t wall_clock;
d69fb81f ZX	298	};
d69fb81f ZX	299
0711456c ZX	300	struct kvm_vm_stat {
	301	u32 mmu_shadow_zapped;
	302	u32 mmu_pte_write;
	303	u32 mmu_pte_updated;
	304	u32 mmu_pde_zapped;
	305	u32 mmu_flooded;
	306	u32 mmu_recycled;
dfc5aa00	307	u32 mmu_cache_miss;
0711456c ZX	308	u32 remote_tlb_flush;
	309	};
	310
77b4c255 ZX	311	struct kvm_vcpu_stat {
	312	u32 pf_fixed;
	313	u32 pf_guest;
	314	u32 tlb_flush;
	315	u32 invlpg;
	316
	317	u32 exits;
	318	u32 io_exits;
	319	u32 mmio_exits;
	320	u32 signal_exits;
	321	u32 irq_window_exits;
	322	u32 halt_exits;
	323	u32 halt_wakeup;
	324	u32 request_irq_exits;
	325	u32 irq_exits;
	326	u32 host_state_reload;
	327	u32 efer_reload;
	328	u32 fpu_reload;
	329	u32 insn_emulation;
	330	u32 insn_emulation_fail;
	331	};
ad312c7c	332
e01a1b57 HB	333	struct descriptor_table {
	334	u16 limit;
	335	unsigned long base;
	336	} __attribute__((packed));
	337
ea4a5ff8 ZX	338	struct kvm_x86_ops {
	339	int (cpu_has_kvm_support)(void); / __init */
	340	int (disabled_by_bios)(void); / __init */
	341	void (hardware_enable)(void dummy); /* __init */
	342	void (hardware_disable)(void dummy);
	343	void (check_processor_compatibility)(void rtn);
	344	int (hardware_setup)(void); / __init */
	345	void (hardware_unsetup)(void); / __exit */
774ead3a	346	bool (*cpu_has_accelerated_tpr)(void);
ea4a5ff8 ZX	347
	348	/* Create, but do not attach this VCPU */
	349	struct kvm_vcpu (vcpu_create)(struct kvm *kvm, unsigned id);
	350	void (vcpu_free)(struct kvm_vcpu vcpu);
	351	int (vcpu_reset)(struct kvm_vcpu vcpu);
	352
	353	void (prepare_guest_switch)(struct kvm_vcpu vcpu);
	354	void (vcpu_load)(struct kvm_vcpu vcpu, int cpu);
	355	void (vcpu_put)(struct kvm_vcpu vcpu);
	356	void (vcpu_decache)(struct kvm_vcpu vcpu);
	357
	358	int (set_guest_debug)(struct kvm_vcpu vcpu,
	359	struct kvm_debug_guest *dbg);
	360	void (guest_debug_pre)(struct kvm_vcpu vcpu);
	361	int (get_msr)(struct kvm_vcpu vcpu, u32 msr_index, u64 *pdata);
	362	int (set_msr)(struct kvm_vcpu vcpu, u32 msr_index, u64 data);
	363	u64 (get_segment_base)(struct kvm_vcpu vcpu, int seg);
	364	void (get_segment)(struct kvm_vcpu vcpu,
	365	struct kvm_segment *var, int seg);
	366	void (set_segment)(struct kvm_vcpu vcpu,
	367	struct kvm_segment *var, int seg);
	368	void (get_cs_db_l_bits)(struct kvm_vcpu vcpu, int db, int l);
	369	void (decache_cr4_guest_bits)(struct kvm_vcpu vcpu);
	370	void (set_cr0)(struct kvm_vcpu vcpu, unsigned long cr0);
	371	void (set_cr3)(struct kvm_vcpu vcpu, unsigned long cr3);
	372	void (set_cr4)(struct kvm_vcpu vcpu, unsigned long cr4);
	373	void (set_efer)(struct kvm_vcpu vcpu, u64 efer);
	374	void (get_idt)(struct kvm_vcpu vcpu, struct descriptor_table *dt);
	375	void (set_idt)(struct kvm_vcpu vcpu, struct descriptor_table *dt);
	376	void (get_gdt)(struct kvm_vcpu vcpu, struct descriptor_table *dt);
	377	void (set_gdt)(struct kvm_vcpu vcpu, struct descriptor_table *dt);
	378	unsigned long (get_dr)(struct kvm_vcpu vcpu, int dr);
	379	void (set_dr)(struct kvm_vcpu vcpu, int dr, unsigned long value,
	380	int *exception);
	381	void (cache_regs)(struct kvm_vcpu vcpu);
	382	void (decache_regs)(struct kvm_vcpu vcpu);
	383	unsigned long (get_rflags)(struct kvm_vcpu vcpu);
	384	void (set_rflags)(struct kvm_vcpu vcpu, unsigned long rflags);
	385
	386	void (tlb_flush)(struct kvm_vcpu vcpu);
ea4a5ff8	387
ea4a5ff8 ZX	388	void (run)(struct kvm_vcpu vcpu, struct kvm_run *run);
	389	int (handle_exit)(struct kvm_run run, struct kvm_vcpu *vcpu);
	390	void (skip_emulated_instruction)(struct kvm_vcpu vcpu);
	391	void (patch_hypercall)(struct kvm_vcpu vcpu,
	392	unsigned char *hypercall_addr);
	393	int (get_irq)(struct kvm_vcpu vcpu);
	394	void (set_irq)(struct kvm_vcpu vcpu, int vec);
298101da AK	395	void (queue_exception)(struct kvm_vcpu vcpu, unsigned nr,
	396	bool has_error_code, u32 error_code);
	397	bool (exception_injected)(struct kvm_vcpu vcpu);
ea4a5ff8 ZX	398	void (inject_pending_irq)(struct kvm_vcpu vcpu);
	399	void (inject_pending_vectors)(struct kvm_vcpu vcpu,
	400	struct kvm_run *run);
	401
	402	int (set_tss_addr)(struct kvm kvm, unsigned int addr);
	403	};
	404
97896d04 ZX	405	extern struct kvm_x86_ops *kvm_x86_ops;
97896d04 ZX	406
54f1585a ZX	407	int kvm_mmu_module_init(void);
	408	void kvm_mmu_module_exit(void);
	409
	410	void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
	411	int kvm_mmu_create(struct kvm_vcpu *vcpu);
	412	int kvm_mmu_setup(struct kvm_vcpu *vcpu);
	413	void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
	414
	415	int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
	416	void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
	417	void kvm_mmu_zap_all(struct kvm *kvm);
3ad82a7e	418	unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
54f1585a ZX	419	void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
54f1585a ZX	420
cc4b6871 JR	421	int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
cc4b6871 JR	422
54f1585a ZX	423	enum emulation_result {
	424	EMULATE_DONE, /* no further processing */
	425	EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
	426	EMULATE_FAIL, /* can't emulate this instruction */
	427	};
	428
571008da SY	429	#define EMULTYPE_NO_DECODE (1 << 0)
571008da SY	430	#define EMULTYPE_TRAP_UD (1 << 1)
54f1585a	431	int emulate_instruction(struct kvm_vcpu vcpu, struct kvm_run run,
571008da	432	unsigned long cr2, u16 error_code, int emulation_type);
54f1585a ZX	433	void kvm_report_emulation_failure(struct kvm_vcpu cvpu, const char context);
	434	void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
	435	void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
	436	void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
	437	unsigned long *rflags);
	438
	439	unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
	440	void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
	441	unsigned long *rflags);
f2b4b7dd	442	void kvm_enable_efer_bits(u64);
54f1585a ZX	443	int kvm_get_msr(struct kvm_vcpu vcpu, u32 msr_index, u64 data);
	444	int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
	445
	446	struct x86_emulate_ctxt;
	447
	448	int kvm_emulate_pio(struct kvm_vcpu vcpu, struct kvm_run run, int in,
	449	int size, unsigned port);
	450	int kvm_emulate_pio_string(struct kvm_vcpu vcpu, struct kvm_run run, int in,
	451	int size, unsigned long count, int down,
	452	gva_t address, int rep, unsigned port);
	453	void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
	454	int kvm_emulate_halt(struct kvm_vcpu *vcpu);
	455	int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
	456	int emulate_clts(struct kvm_vcpu *vcpu);
	457	int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
	458	unsigned long *dest);
	459	int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
	460	unsigned long value);
	461
	462	void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
	463	void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0);
	464	void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0);
	465	void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0);
	466	unsigned long get_cr8(struct kvm_vcpu *vcpu);
	467	void lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
	468	void kvm_get_cs_db_l_bits(struct kvm_vcpu vcpu, int db, int *l);
	469
	470	int kvm_get_msr_common(struct kvm_vcpu vcpu, u32 msr, u64 pdata);
	471	int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
	472
298101da AK	473	void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
298101da AK	474	void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
c3c91fee AK	475	void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
c3c91fee AK	476	u32 error_code);
298101da	477
54f1585a ZX	478	void fx_init(struct kvm_vcpu *vcpu);
	479
	480	int emulator_read_std(unsigned long addr,
	481	void *val,
	482	unsigned int bytes,
	483	struct kvm_vcpu *vcpu);
	484	int emulator_write_emulated(unsigned long addr,
	485	const void *val,
	486	unsigned int bytes,
	487	struct kvm_vcpu *vcpu);
	488
	489	unsigned long segment_base(u16 selector);
	490
d835dfec	491	void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
54f1585a ZX	492	void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
	493	const u8 *new, int bytes);
	494	int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
	495	void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
	496	int kvm_mmu_load(struct kvm_vcpu *vcpu);
	497	void kvm_mmu_unload(struct kvm_vcpu *vcpu);
	498
	499	int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
	500
	501	int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
	502
3067714c	503	int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
34c16eec	504
18552672 JR	505	void kvm_enable_tdp(void);
18552672 JR	506
a03490ed	507	int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
de7d789a	508	int complete_pio(struct kvm_vcpu *vcpu);
ec6d273d ZX	509
	510	static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
	511	{
	512	struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
	513
	514	return (struct kvm_mmu_page *)page_private(page);
	515	}
	516
	517	static inline u16 read_fs(void)
	518	{
	519	u16 seg;
	520	asm("mov %%fs, %0" : "=g"(seg));
	521	return seg;
	522	}
	523
	524	static inline u16 read_gs(void)
	525	{
	526	u16 seg;
	527	asm("mov %%gs, %0" : "=g"(seg));
	528	return seg;
	529	}
	530
	531	static inline u16 read_ldt(void)
	532	{
	533	u16 ldt;
	534	asm("sldt %0" : "=g"(ldt));
	535	return ldt;
	536	}
	537
	538	static inline void load_fs(u16 sel)
	539	{
	540	asm("mov %0, %%fs" : : "rm"(sel));
	541	}
	542
	543	static inline void load_gs(u16 sel)
	544	{
	545	asm("mov %0, %%gs" : : "rm"(sel));
	546	}
	547
	548	#ifndef load_ldt
	549	static inline void load_ldt(u16 sel)
	550	{
	551	asm("lldt %0" : : "rm"(sel));
	552	}
	553	#endif
	554
	555	static inline void get_idt(struct descriptor_table *table)
	556	{
	557	asm("sidt %0" : "=m"(*table));
	558	}
	559
	560	static inline void get_gdt(struct descriptor_table *table)
	561	{
	562	asm("sgdt %0" : "=m"(*table));
	563	}
	564
	565	static inline unsigned long read_tr_base(void)
	566	{
	567	u16 tr;
	568	asm("str %0" : "=g"(tr));
	569	return segment_base(tr);
	570	}
	571
	572	#ifdef CONFIG_X86_64
573	static inline unsigned long read_msr(unsigned long msr)
574	{
575	u64 value;
576
577	rdmsrl(msr, value);
578	return value;
579	}
580	#endif
581
582	static inline void fx_save(struct i387_fxsave_struct *image)
583	{
584	asm("fxsave (%0)":: "r" (image));
585	}
586
587	static inline void fx_restore(struct i387_fxsave_struct *image)
588	{
589	asm("fxrstor (%0)":: "r" (image));
590	}
591
592	static inline void fpu_init(void)
593	{
594	asm("finit");
595	}
596
597	static inline u32 get_rdx_init_val(void)
598	{
599	return 0x600; /* P6 family */
600	}
601
c1a5d4f9 AK	602	static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
	603	{
	604	kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
	605	}
	606
ec6d273d ZX	607	#define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
	608	#define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
	609	#define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
	610	#define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
	611	#define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
	612	#define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
	613	#define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
	614	#define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
	615	#define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
2384d2b3	616	#define ASM_VMX_INVVPID ".byte 0x66, 0x0f, 0x38, 0x81, 0x08"
ec6d273d ZX	617
	618	#define MSR_IA32_TIME_STAMP_COUNTER 0x010
	619
	620	#define TSS_IOPB_BASE_OFFSET 0x66
	621	#define TSS_BASE_SIZE 0x68
	622	#define TSS_IOPB_SIZE (65536 / 8)
	623	#define TSS_REDIRECTION_SIZE (256 / 8)
7d76b4d3 JP	624	#define RMODE_TSS_SIZE \
7d76b4d3 JP	625	(TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
53e0aa7b	626
043405e1	627	#endif