]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - include/asm-x86/kvm_host.h
KVM: VMX: Enable NMI with in-kernel irqchip
[mirror_ubuntu-bionic-kernel.git] / include / asm-x86 / kvm_host.h
CommitLineData
043405e1
CO
1#/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
edf88417
AK
11#ifndef ASM_KVM_HOST_H
12#define ASM_KVM_HOST_H
043405e1 13
34c16eec
ZX
14#include <linux/types.h>
15#include <linux/mm.h>
16
17#include <linux/kvm.h>
18#include <linux/kvm_para.h>
edf88417 19#include <linux/kvm_types.h>
34c16eec 20
50d0a0f9 21#include <asm/pvclock-abi.h>
e01a1b57
HB
22#include <asm/desc.h>
23
69a9f69b
AK
24#define KVM_MAX_VCPUS 16
25#define KVM_MEMORY_SLOTS 32
26/* memory slots that does not exposed to userspace */
27#define KVM_PRIVATE_MEM_SLOTS 4
28
29#define KVM_PIO_PAGE_OFFSET 1
30
cd6e8f87
ZX
31#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
32#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
7d76b4d3
JP
33#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
34 0xFFFFFF0000000000ULL)
cd6e8f87 35
7d76b4d3 36#define KVM_GUEST_CR0_MASK \
cd6e8f87
ZX
37 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \
38 | X86_CR0_NW | X86_CR0_CD)
7d76b4d3 39#define KVM_VM_CR0_ALWAYS_ON \
cd6e8f87
ZX
40 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \
41 | X86_CR0_MP)
7d76b4d3 42#define KVM_GUEST_CR4_MASK \
cd6e8f87
ZX
43 (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE)
44#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
45#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
46
47#define INVALID_PAGE (~(hpa_t)0)
48#define UNMAPPED_GVA (~(gpa_t)0)
49
05da4558
MT
50/* shadow tables are PAE even on non-PAE hosts */
51#define KVM_HPAGE_SHIFT 21
52#define KVM_HPAGE_SIZE (1UL << KVM_HPAGE_SHIFT)
53#define KVM_HPAGE_MASK (~(KVM_HPAGE_SIZE - 1))
54
55#define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE)
56
cd6e8f87
ZX
57#define DE_VECTOR 0
58#define UD_VECTOR 6
59#define NM_VECTOR 7
60#define DF_VECTOR 8
61#define TS_VECTOR 10
62#define NP_VECTOR 11
63#define SS_VECTOR 12
64#define GP_VECTOR 13
65#define PF_VECTOR 14
53371b50 66#define MC_VECTOR 18
cd6e8f87
ZX
67
68#define SELECTOR_TI_MASK (1 << 2)
69#define SELECTOR_RPL_MASK 0x03
70
71#define IOPL_SHIFT 12
72
d69fb81f
ZX
73#define KVM_ALIAS_SLOTS 4
74
d657a98e
ZX
75#define KVM_PERMILLE_MMU_PAGES 20
76#define KVM_MIN_ALLOC_MMU_PAGES 64
1ae0a13d
DE
77#define KVM_MMU_HASH_SHIFT 10
78#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
d657a98e
ZX
79#define KVM_MIN_FREE_MMU_PAGES 5
80#define KVM_REFILL_PAGES 25
81#define KVM_MAX_CPUID_ENTRIES 40
82
e9b11c17
ZX
83extern spinlock_t kvm_lock;
84extern struct list_head vm_list;
85
d657a98e
ZX
86struct kvm_vcpu;
87struct kvm;
88
2b3ccfa0
ZX
89enum {
90 VCPU_REGS_RAX = 0,
91 VCPU_REGS_RCX = 1,
92 VCPU_REGS_RDX = 2,
93 VCPU_REGS_RBX = 3,
94 VCPU_REGS_RSP = 4,
95 VCPU_REGS_RBP = 5,
96 VCPU_REGS_RSI = 6,
97 VCPU_REGS_RDI = 7,
98#ifdef CONFIG_X86_64
99 VCPU_REGS_R8 = 8,
100 VCPU_REGS_R9 = 9,
101 VCPU_REGS_R10 = 10,
102 VCPU_REGS_R11 = 11,
103 VCPU_REGS_R12 = 12,
104 VCPU_REGS_R13 = 13,
105 VCPU_REGS_R14 = 14,
106 VCPU_REGS_R15 = 15,
107#endif
108 NR_VCPU_REGS
109};
110
111enum {
112 VCPU_SREG_CS,
113 VCPU_SREG_DS,
114 VCPU_SREG_ES,
115 VCPU_SREG_FS,
116 VCPU_SREG_GS,
117 VCPU_SREG_SS,
118 VCPU_SREG_TR,
119 VCPU_SREG_LDTR,
120};
121
edf88417 122#include <asm/kvm_x86_emulate.h>
2b3ccfa0 123
d657a98e
ZX
124#define KVM_NR_MEM_OBJS 40
125
69a9f69b
AK
126struct kvm_guest_debug {
127 int enabled;
128 unsigned long bp[4];
129 int singlestep;
130};
131
d657a98e
ZX
132/*
133 * We don't want allocation failures within the mmu code, so we preallocate
134 * enough memory for a single page fault in a cache.
135 */
136struct kvm_mmu_memory_cache {
137 int nobjs;
138 void *objects[KVM_NR_MEM_OBJS];
139};
140
141#define NR_PTE_CHAIN_ENTRIES 5
142
143struct kvm_pte_chain {
144 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
145 struct hlist_node link;
146};
147
148/*
149 * kvm_mmu_page_role, below, is defined as:
150 *
151 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
152 * bits 4:7 - page table level for this shadow (1-4)
153 * bits 8:9 - page table quadrant for 2-level guests
154 * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
155 * bits 17:19 - common access permissions for all ptes in this shadow page
156 */
157union kvm_mmu_page_role {
158 unsigned word;
159 struct {
7d76b4d3
JP
160 unsigned glevels:4;
161 unsigned level:4;
162 unsigned quadrant:2;
163 unsigned pad_for_nice_hex_output:6;
164 unsigned metaphysical:1;
165 unsigned access:3;
2e53d63a 166 unsigned invalid:1;
d657a98e
ZX
167 };
168};
169
170struct kvm_mmu_page {
171 struct list_head link;
172 struct hlist_node hash_link;
173
174 /*
175 * The following two entries are used to key the shadow page in the
176 * hash table.
177 */
178 gfn_t gfn;
179 union kvm_mmu_page_role role;
180
181 u64 *spt;
182 /* hold the gfn of each spte inside spt */
183 gfn_t *gfns;
184 unsigned long slot_bitmap; /* One bit set per slot which has memory
185 * in this shadow page.
186 */
187 int multimapped; /* More than one parent_pte? */
188 int root_count; /* Currently serving as active root */
189 union {
190 u64 *parent_pte; /* !multimapped */
191 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
192 };
193};
194
195/*
196 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
197 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
198 * mode.
199 */
200struct kvm_mmu {
201 void (*new_cr3)(struct kvm_vcpu *vcpu);
202 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
203 void (*free)(struct kvm_vcpu *vcpu);
204 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
205 void (*prefetch_page)(struct kvm_vcpu *vcpu,
206 struct kvm_mmu_page *page);
207 hpa_t root_hpa;
208 int root_level;
209 int shadow_root_level;
210
211 u64 *pae_root;
212};
213
ad312c7c 214struct kvm_vcpu_arch {
34c16eec
ZX
215 u64 host_tsc;
216 int interrupt_window_open;
217 unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
218 DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS);
219 unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
220 unsigned long rip; /* needs vcpu_load_rsp_rip() */
221
222 unsigned long cr0;
223 unsigned long cr2;
224 unsigned long cr3;
225 unsigned long cr4;
226 unsigned long cr8;
227 u64 pdptrs[4]; /* pae */
228 u64 shadow_efer;
229 u64 apic_base;
230 struct kvm_lapic *apic; /* kernel irqchip context */
34c16eec
ZX
231 int mp_state;
232 int sipi_vector;
233 u64 ia32_misc_enable_msr;
b209749f 234 bool tpr_access_reporting;
34c16eec
ZX
235
236 struct kvm_mmu mmu;
237
238 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
239 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
240 struct kvm_mmu_memory_cache mmu_page_cache;
241 struct kvm_mmu_memory_cache mmu_page_header_cache;
242
243 gfn_t last_pt_write_gfn;
244 int last_pt_write_count;
245 u64 *last_pte_updated;
1b7fcd32 246 gfn_t last_pte_gfn;
34c16eec 247
d7824fff 248 struct {
35149e21
AL
249 gfn_t gfn; /* presumed gfn during guest pte update */
250 pfn_t pfn; /* pfn corresponding to that gfn */
05da4558 251 int largepage;
d7824fff
AK
252 } update_pte;
253
34c16eec
ZX
254 struct i387_fxsave_struct host_fx_image;
255 struct i387_fxsave_struct guest_fx_image;
256
257 gva_t mmio_fault_cr2;
258 struct kvm_pio_request pio;
259 void *pio_data;
260
298101da
AK
261 struct kvm_queued_exception {
262 bool pending;
263 bool has_error_code;
264 u8 nr;
265 u32 error_code;
266 } exception;
267
34c16eec
ZX
268 struct {
269 int active;
270 u8 save_iopl;
271 struct kvm_save_segment {
272 u16 selector;
273 unsigned long base;
274 u32 limit;
275 u32 ar;
276 } tr, es, ds, fs, gs;
277 } rmode;
278 int halt_request; /* real mode on Intel only */
279
280 int cpuid_nent;
07716717 281 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
34c16eec
ZX
282 /* emulate context */
283
284 struct x86_emulate_ctxt emulate_ctxt;
18068523
GOC
285
286 gpa_t time;
50d0a0f9
GH
287 struct pvclock_vcpu_time_info hv_clock;
288 unsigned int hv_clock_tsc_khz;
18068523
GOC
289 unsigned int time_offset;
290 struct page *time_page;
3419ffc8
SY
291
292 bool nmi_pending;
34c16eec
ZX
293};
294
d69fb81f
ZX
295struct kvm_mem_alias {
296 gfn_t base_gfn;
297 unsigned long npages;
298 gfn_t target_gfn;
299};
300
301struct kvm_arch{
302 int naliases;
303 struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
f05e70ac
ZX
304
305 unsigned int n_free_mmu_pages;
306 unsigned int n_requested_mmu_pages;
307 unsigned int n_alloc_mmu_pages;
308 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
309 /*
310 * Hash table of struct kvm_mmu_page.
311 */
312 struct list_head active_mmu_pages;
d7deeeb0
ZX
313 struct kvm_pic *vpic;
314 struct kvm_ioapic *vioapic;
7837699f 315 struct kvm_pit *vpit;
bfc6d222
ZX
316
317 int round_robin_prev_vcpu;
318 unsigned int tss_addr;
319 struct page *apic_access_page;
18068523
GOC
320
321 gpa_t wall_clock;
b7ebfb05
SY
322
323 struct page *ept_identity_pagetable;
324 bool ept_identity_pagetable_done;
d69fb81f
ZX
325};
326
0711456c
ZX
327struct kvm_vm_stat {
328 u32 mmu_shadow_zapped;
329 u32 mmu_pte_write;
330 u32 mmu_pte_updated;
331 u32 mmu_pde_zapped;
332 u32 mmu_flooded;
333 u32 mmu_recycled;
dfc5aa00 334 u32 mmu_cache_miss;
0711456c 335 u32 remote_tlb_flush;
05da4558 336 u32 lpages;
0711456c
ZX
337};
338
77b4c255
ZX
339struct kvm_vcpu_stat {
340 u32 pf_fixed;
341 u32 pf_guest;
342 u32 tlb_flush;
343 u32 invlpg;
344
345 u32 exits;
346 u32 io_exits;
347 u32 mmio_exits;
348 u32 signal_exits;
349 u32 irq_window_exits;
f08864b4 350 u32 nmi_window_exits;
77b4c255
ZX
351 u32 halt_exits;
352 u32 halt_wakeup;
353 u32 request_irq_exits;
354 u32 irq_exits;
355 u32 host_state_reload;
356 u32 efer_reload;
357 u32 fpu_reload;
358 u32 insn_emulation;
359 u32 insn_emulation_fail;
f11c3a8d 360 u32 hypercalls;
77b4c255 361};
ad312c7c 362
e01a1b57
HB
363struct descriptor_table {
364 u16 limit;
365 unsigned long base;
366} __attribute__((packed));
367
ea4a5ff8
ZX
368struct kvm_x86_ops {
369 int (*cpu_has_kvm_support)(void); /* __init */
370 int (*disabled_by_bios)(void); /* __init */
371 void (*hardware_enable)(void *dummy); /* __init */
372 void (*hardware_disable)(void *dummy);
373 void (*check_processor_compatibility)(void *rtn);
374 int (*hardware_setup)(void); /* __init */
375 void (*hardware_unsetup)(void); /* __exit */
774ead3a 376 bool (*cpu_has_accelerated_tpr)(void);
ea4a5ff8
ZX
377
378 /* Create, but do not attach this VCPU */
379 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
380 void (*vcpu_free)(struct kvm_vcpu *vcpu);
381 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
382
383 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
384 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
385 void (*vcpu_put)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX
386
387 int (*set_guest_debug)(struct kvm_vcpu *vcpu,
388 struct kvm_debug_guest *dbg);
389 void (*guest_debug_pre)(struct kvm_vcpu *vcpu);
390 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
391 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
392 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
393 void (*get_segment)(struct kvm_vcpu *vcpu,
394 struct kvm_segment *var, int seg);
2e4d2653 395 int (*get_cpl)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX
396 void (*set_segment)(struct kvm_vcpu *vcpu,
397 struct kvm_segment *var, int seg);
398 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
399 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
400 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
401 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
402 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
403 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
404 void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
405 void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
406 void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
407 void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
408 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
409 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
410 int *exception);
411 void (*cache_regs)(struct kvm_vcpu *vcpu);
412 void (*decache_regs)(struct kvm_vcpu *vcpu);
413 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
414 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
415
416 void (*tlb_flush)(struct kvm_vcpu *vcpu);
ea4a5ff8 417
ea4a5ff8
ZX
418 void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
419 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);
420 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
421 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
422 unsigned char *hypercall_addr);
423 int (*get_irq)(struct kvm_vcpu *vcpu);
424 void (*set_irq)(struct kvm_vcpu *vcpu, int vec);
298101da
AK
425 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
426 bool has_error_code, u32 error_code);
427 bool (*exception_injected)(struct kvm_vcpu *vcpu);
ea4a5ff8
ZX
428 void (*inject_pending_irq)(struct kvm_vcpu *vcpu);
429 void (*inject_pending_vectors)(struct kvm_vcpu *vcpu,
430 struct kvm_run *run);
431
432 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
67253af5 433 int (*get_tdp_level)(void);
ea4a5ff8
ZX
434};
435
97896d04
ZX
436extern struct kvm_x86_ops *kvm_x86_ops;
437
54f1585a
ZX
438int kvm_mmu_module_init(void);
439void kvm_mmu_module_exit(void);
440
441void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
442int kvm_mmu_create(struct kvm_vcpu *vcpu);
443int kvm_mmu_setup(struct kvm_vcpu *vcpu);
444void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
7b52345e
SY
445void kvm_mmu_set_base_ptes(u64 base_pte);
446void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
447 u64 dirty_mask, u64 nx_mask, u64 x_mask);
54f1585a
ZX
448
449int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
450void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
451void kvm_mmu_zap_all(struct kvm *kvm);
3ad82a7e 452unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
54f1585a
ZX
453void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
454
cc4b6871
JR
455int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
456
3200f405 457int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
9f811285 458 const void *val, int bytes);
2f333bcb
MT
459int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
460 gpa_t addr, unsigned long *ret);
461
462extern bool tdp_enabled;
9f811285 463
54f1585a
ZX
464enum emulation_result {
465 EMULATE_DONE, /* no further processing */
466 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
467 EMULATE_FAIL, /* can't emulate this instruction */
468};
469
571008da
SY
470#define EMULTYPE_NO_DECODE (1 << 0)
471#define EMULTYPE_TRAP_UD (1 << 1)
54f1585a 472int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
571008da 473 unsigned long cr2, u16 error_code, int emulation_type);
54f1585a
ZX
474void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context);
475void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
476void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
477void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
478 unsigned long *rflags);
479
480unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
481void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
482 unsigned long *rflags);
f2b4b7dd 483void kvm_enable_efer_bits(u64);
54f1585a
ZX
484int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
485int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
486
487struct x86_emulate_ctxt;
488
489int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
490 int size, unsigned port);
491int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
492 int size, unsigned long count, int down,
493 gva_t address, int rep, unsigned port);
494void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
495int kvm_emulate_halt(struct kvm_vcpu *vcpu);
496int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
497int emulate_clts(struct kvm_vcpu *vcpu);
498int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
499 unsigned long *dest);
500int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
501 unsigned long value);
502
37817f29
IE
503int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason);
504
2d3ad1f4 505void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
9c20456a
JR
506void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
507void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
508void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
2d3ad1f4
AK
509unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
510void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
54f1585a
ZX
511void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
512
513int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
514int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
515
298101da
AK
516void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
517void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
c3c91fee
AK
518void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
519 u32 error_code);
298101da 520
3419ffc8
SY
521void kvm_inject_nmi(struct kvm_vcpu *vcpu);
522
54f1585a
ZX
523void fx_init(struct kvm_vcpu *vcpu);
524
525int emulator_read_std(unsigned long addr,
526 void *val,
527 unsigned int bytes,
528 struct kvm_vcpu *vcpu);
529int emulator_write_emulated(unsigned long addr,
530 const void *val,
531 unsigned int bytes,
532 struct kvm_vcpu *vcpu);
533
534unsigned long segment_base(u16 selector);
535
d835dfec 536void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
54f1585a
ZX
537void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
538 const u8 *new, int bytes);
539int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
540void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
541int kvm_mmu_load(struct kvm_vcpu *vcpu);
542void kvm_mmu_unload(struct kvm_vcpu *vcpu);
543
544int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
545
546int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
547
3067714c 548int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
34c16eec 549
18552672
JR
550void kvm_enable_tdp(void);
551
a03490ed 552int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
de7d789a 553int complete_pio(struct kvm_vcpu *vcpu);
ec6d273d
ZX
554
555static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
556{
557 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
558
559 return (struct kvm_mmu_page *)page_private(page);
560}
561
562static inline u16 read_fs(void)
563{
564 u16 seg;
565 asm("mov %%fs, %0" : "=g"(seg));
566 return seg;
567}
568
569static inline u16 read_gs(void)
570{
571 u16 seg;
572 asm("mov %%gs, %0" : "=g"(seg));
573 return seg;
574}
575
576static inline u16 read_ldt(void)
577{
578 u16 ldt;
579 asm("sldt %0" : "=g"(ldt));
580 return ldt;
581}
582
583static inline void load_fs(u16 sel)
584{
585 asm("mov %0, %%fs" : : "rm"(sel));
586}
587
588static inline void load_gs(u16 sel)
589{
590 asm("mov %0, %%gs" : : "rm"(sel));
591}
592
593#ifndef load_ldt
594static inline void load_ldt(u16 sel)
595{
596 asm("lldt %0" : : "rm"(sel));
597}
598#endif
599
600static inline void get_idt(struct descriptor_table *table)
601{
602 asm("sidt %0" : "=m"(*table));
603}
604
605static inline void get_gdt(struct descriptor_table *table)
606{
607 asm("sgdt %0" : "=m"(*table));
608}
609
610static inline unsigned long read_tr_base(void)
611{
612 u16 tr;
613 asm("str %0" : "=g"(tr));
614 return segment_base(tr);
615}
616
617#ifdef CONFIG_X86_64
618static inline unsigned long read_msr(unsigned long msr)
619{
620 u64 value;
621
622 rdmsrl(msr, value);
623 return value;
624}
625#endif
626
627static inline void fx_save(struct i387_fxsave_struct *image)
628{
629 asm("fxsave (%0)":: "r" (image));
630}
631
632static inline void fx_restore(struct i387_fxsave_struct *image)
633{
634 asm("fxrstor (%0)":: "r" (image));
635}
636
bc1a34f1 637static inline void fx_finit(void)
ec6d273d
ZX
638{
639 asm("finit");
640}
641
642static inline u32 get_rdx_init_val(void)
643{
644 return 0x600; /* P6 family */
645}
646
c1a5d4f9
AK
647static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
648{
649 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
650}
651
ec6d273d
ZX
652#define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
653#define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
654#define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
655#define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
656#define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
657#define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
658#define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
659#define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
660#define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
1439442c 661#define ASM_VMX_INVEPT ".byte 0x66, 0x0f, 0x38, 0x80, 0x08"
2384d2b3 662#define ASM_VMX_INVVPID ".byte 0x66, 0x0f, 0x38, 0x81, 0x08"
ec6d273d
ZX
663
664#define MSR_IA32_TIME_STAMP_COUNTER 0x010
665
666#define TSS_IOPB_BASE_OFFSET 0x66
667#define TSS_BASE_SIZE 0x68
668#define TSS_IOPB_SIZE (65536 / 8)
669#define TSS_REDIRECTION_SIZE (256 / 8)
7d76b4d3
JP
670#define RMODE_TSS_SIZE \
671 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
53e0aa7b 672
37817f29
IE
673enum {
674 TASK_SWITCH_CALL = 0,
675 TASK_SWITCH_IRET = 1,
676 TASK_SWITCH_JMP = 2,
677 TASK_SWITCH_GATE = 3,
678};
679
2714d1d3
FEL
680#define KVMTRACE_5D(evt, vcpu, d1, d2, d3, d4, d5, name) \
681 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
682 vcpu, 5, d1, d2, d3, d4, d5)
683#define KVMTRACE_4D(evt, vcpu, d1, d2, d3, d4, name) \
684 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
685 vcpu, 4, d1, d2, d3, d4, 0)
686#define KVMTRACE_3D(evt, vcpu, d1, d2, d3, name) \
687 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
688 vcpu, 3, d1, d2, d3, 0, 0)
689#define KVMTRACE_2D(evt, vcpu, d1, d2, name) \
690 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
691 vcpu, 2, d1, d2, 0, 0, 0)
692#define KVMTRACE_1D(evt, vcpu, d1, name) \
693 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
694 vcpu, 1, d1, 0, 0, 0, 0)
695#define KVMTRACE_0D(evt, vcpu, name) \
696 trace_mark(kvm_trace_##name, "%u %p %u %u %u %u %u %u", KVM_TRC_##evt, \
697 vcpu, 0, 0, 0, 0, 0, 0)
698
4ecac3fd
AK
699#ifdef CONFIG_64BIT
700#define KVM_EX_ENTRY ".quad"
701#else
702#define KVM_EX_ENTRY ".long"
703#endif
704
705/*
706 * Hardware virtualization extension instructions may fault if a
707 * reboot turns off virtualization while processes are running.
708 * Trap the fault and ignore the instruction if that happens.
709 */
710asmlinkage void kvm_handle_fault_on_reboot(void);
711
712#define __kvm_handle_fault_on_reboot(insn) \
713 "666: " insn "\n\t" \
714 ".pushsection .text.fixup, \"ax\" \n" \
715 "667: \n\t" \
716 "push $666b \n\t" \
717 "jmp kvm_handle_fault_on_reboot \n\t" \
718 ".popsection \n\t" \
719 ".pushsection __ex_table, \"a\" \n\t" \
720 KVM_EX_ENTRY " 666b, 667b \n\t" \
721 ".popsection"
722
043405e1 723#endif