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1da177e4 LT |
1 | /* |
2 | * Machine dependent access functions for RTC registers. | |
3 | */ | |
4 | #ifndef _ASM_MC146818RTC_H | |
5 | #define _ASM_MC146818RTC_H | |
6 | ||
7 | #include <asm/io.h> | |
8 | #include <asm/system.h> | |
267eb01a | 9 | #include <asm/processor.h> |
1da177e4 LT |
10 | #include <linux/mc146818rtc.h> |
11 | ||
12 | #ifndef RTC_PORT | |
13 | #define RTC_PORT(x) (0x70 + (x)) | |
14 | #define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */ | |
15 | #endif | |
16 | ||
17 | #ifdef __HAVE_ARCH_CMPXCHG | |
18 | /* | |
19 | * This lock provides nmi access to the CMOS/RTC registers. It has some | |
20 | * special properties. It is owned by a CPU and stores the index register | |
21 | * currently being accessed (if owned). The idea here is that it works | |
22 | * like a normal lock (normally). However, in an NMI, the NMI code will | |
23 | * first check to see if its CPU owns the lock, meaning that the NMI | |
24 | * interrupted during the read/write of the device. If it does, it goes ahead | |
25 | * and performs the access and then restores the index register. If it does | |
26 | * not, it locks normally. | |
27 | * | |
28 | * Note that since we are working with NMIs, we need this lock even in | |
29 | * a non-SMP machine just to mark that the lock is owned. | |
30 | * | |
31 | * This only works with compare-and-swap. There is no other way to | |
32 | * atomically claim the lock and set the owner. | |
33 | */ | |
34 | #include <linux/smp.h> | |
35 | extern volatile unsigned long cmos_lock; | |
36 | ||
37 | /* | |
38 | * All of these below must be called with interrupts off, preempt | |
39 | * disabled, etc. | |
40 | */ | |
41 | ||
42 | static inline void lock_cmos(unsigned char reg) | |
43 | { | |
44 | unsigned long new; | |
45 | new = ((smp_processor_id()+1) << 8) | reg; | |
46 | for (;;) { | |
267eb01a AM |
47 | if (cmos_lock) { |
48 | cpu_relax(); | |
1da177e4 | 49 | continue; |
267eb01a | 50 | } |
1da177e4 LT |
51 | if (__cmpxchg(&cmos_lock, 0, new, sizeof(cmos_lock)) == 0) |
52 | return; | |
53 | } | |
54 | } | |
55 | ||
56 | static inline void unlock_cmos(void) | |
57 | { | |
58 | cmos_lock = 0; | |
59 | } | |
60 | static inline int do_i_have_lock_cmos(void) | |
61 | { | |
62 | return (cmos_lock >> 8) == (smp_processor_id()+1); | |
63 | } | |
64 | static inline unsigned char current_lock_cmos_reg(void) | |
65 | { | |
66 | return cmos_lock & 0xff; | |
67 | } | |
68 | #define lock_cmos_prefix(reg) \ | |
69 | do { \ | |
70 | unsigned long cmos_flags; \ | |
71 | local_irq_save(cmos_flags); \ | |
72 | lock_cmos(reg) | |
73 | #define lock_cmos_suffix(reg) \ | |
74 | unlock_cmos(); \ | |
75 | local_irq_restore(cmos_flags); \ | |
76 | } while (0) | |
77 | #else | |
78 | #define lock_cmos_prefix(reg) do {} while (0) | |
79 | #define lock_cmos_suffix(reg) do {} while (0) | |
80 | #define lock_cmos(reg) | |
81 | #define unlock_cmos() | |
82 | #define do_i_have_lock_cmos() 0 | |
83 | #define current_lock_cmos_reg() 0 | |
84 | #endif | |
85 | ||
86 | /* | |
87 | * The yet supported machines all access the RTC index register via | |
88 | * an ISA port access but the way to access the date register differs ... | |
89 | */ | |
90 | #define CMOS_READ(addr) rtc_cmos_read(addr) | |
91 | #define CMOS_WRITE(val, addr) rtc_cmos_write(val, addr) | |
92 | unsigned char rtc_cmos_read(unsigned char addr); | |
93 | void rtc_cmos_write(unsigned char val, unsigned char addr); | |
94 | ||
95 | #define RTC_IRQ 8 | |
96 | ||
97 | #endif /* _ASM_MC146818RTC_H */ |