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d3561b7f RR |
1 | #ifndef __ASM_PARAVIRT_H |
2 | #define __ASM_PARAVIRT_H | |
3 | /* Various instructions on x86 need to be replaced for | |
4 | * para-virtualization: those hooks are defined here. */ | |
b239fb25 JF |
5 | |
6 | #ifdef CONFIG_PARAVIRT | |
da181a8b | 7 | #include <asm/page.h> |
658be9d3 | 8 | #include <asm/asm.h> |
d3561b7f | 9 | |
139ec7c4 RR |
10 | /* Bitmask of what can be clobbered: usually at least eax. */ |
11 | #define CLBR_NONE 0x0 | |
12 | #define CLBR_EAX 0x1 | |
13 | #define CLBR_ECX 0x2 | |
14 | #define CLBR_EDX 0x4 | |
15 | #define CLBR_ANY 0x7 | |
16 | ||
d3561b7f | 17 | #ifndef __ASSEMBLY__ |
3dc494e8 | 18 | #include <linux/types.h> |
d4c10477 | 19 | #include <linux/cpumask.h> |
ce6234b5 | 20 | #include <asm/kmap_types.h> |
8d947344 | 21 | #include <asm/desc_defs.h> |
3dc494e8 | 22 | |
ce6234b5 | 23 | struct page; |
d3561b7f | 24 | struct thread_struct; |
6b68f01b | 25 | struct desc_ptr; |
d3561b7f | 26 | struct tss_struct; |
da181a8b | 27 | struct mm_struct; |
90a0a06a | 28 | struct desc_struct; |
294688c0 | 29 | |
93b1eab3 JF |
30 | /* general info */ |
31 | struct pv_info { | |
d3561b7f | 32 | unsigned int kernel_rpl; |
5311ab62 | 33 | int shared_kernel_pmd; |
93b1eab3 | 34 | int paravirt_enabled; |
d3561b7f | 35 | const char *name; |
93b1eab3 | 36 | }; |
d3561b7f | 37 | |
93b1eab3 | 38 | struct pv_init_ops { |
139ec7c4 | 39 | /* |
93b1eab3 JF |
40 | * Patch may replace one of the defined code sequences with |
41 | * arbitrary code, subject to the same register constraints. | |
42 | * This generally means the code is not free to clobber any | |
43 | * registers other than EAX. The patch function should return | |
44 | * the number of bytes of code generated, as we nop pad the | |
45 | * rest in generic code. | |
139ec7c4 | 46 | */ |
ab144f5e AK |
47 | unsigned (*patch)(u8 type, u16 clobber, void *insnbuf, |
48 | unsigned long addr, unsigned len); | |
139ec7c4 | 49 | |
294688c0 | 50 | /* Basic arch-specific setup */ |
d3561b7f RR |
51 | void (*arch_setup)(void); |
52 | char *(*memory_setup)(void); | |
6996d3b6 JF |
53 | void (*post_allocator_init)(void); |
54 | ||
294688c0 | 55 | /* Print a banner to identify the environment */ |
d3561b7f | 56 | void (*banner)(void); |
93b1eab3 JF |
57 | }; |
58 | ||
59 | ||
8965c1c0 | 60 | struct pv_lazy_ops { |
93b1eab3 | 61 | /* Set deferred update mode, used for batching operations. */ |
8965c1c0 JF |
62 | void (*enter)(void); |
63 | void (*leave)(void); | |
93b1eab3 JF |
64 | }; |
65 | ||
66 | struct pv_time_ops { | |
67 | void (*time_init)(void); | |
d3561b7f | 68 | |
294688c0 | 69 | /* Set and set time of day */ |
d3561b7f RR |
70 | unsigned long (*get_wallclock)(void); |
71 | int (*set_wallclock)(unsigned long); | |
d3561b7f | 72 | |
93b1eab3 JF |
73 | unsigned long long (*sched_clock)(void); |
74 | unsigned long (*get_cpu_khz)(void); | |
75 | }; | |
d3561b7f | 76 | |
93b1eab3 | 77 | struct pv_cpu_ops { |
294688c0 | 78 | /* hooks for various privileged instructions */ |
1a1eecd1 AK |
79 | unsigned long (*get_debugreg)(int regno); |
80 | void (*set_debugreg)(int regno, unsigned long value); | |
d3561b7f | 81 | |
1a1eecd1 | 82 | void (*clts)(void); |
d3561b7f | 83 | |
1a1eecd1 AK |
84 | unsigned long (*read_cr0)(void); |
85 | void (*write_cr0)(unsigned long); | |
d3561b7f | 86 | |
1a1eecd1 AK |
87 | unsigned long (*read_cr4_safe)(void); |
88 | unsigned long (*read_cr4)(void); | |
89 | void (*write_cr4)(unsigned long); | |
d3561b7f | 90 | |
294688c0 | 91 | /* Segment descriptor handling */ |
1a1eecd1 | 92 | void (*load_tr_desc)(void); |
6b68f01b GOC |
93 | void (*load_gdt)(const struct desc_ptr *); |
94 | void (*load_idt)(const struct desc_ptr *); | |
95 | void (*store_gdt)(struct desc_ptr *); | |
96 | void (*store_idt)(struct desc_ptr *); | |
1a1eecd1 AK |
97 | void (*set_ldt)(const void *desc, unsigned entries); |
98 | unsigned long (*store_tr)(void); | |
99 | void (*load_tls)(struct thread_struct *t, unsigned int cpu); | |
75b8bb3e GOC |
100 | void (*write_ldt_entry)(struct desc_struct *ldt, int entrynum, |
101 | const void *desc); | |
90a0a06a | 102 | void (*write_gdt_entry)(struct desc_struct *, |
014b15be | 103 | int entrynum, const void *desc, int size); |
8d947344 GOC |
104 | void (*write_idt_entry)(gate_desc *, |
105 | int entrynum, const gate_desc *gate); | |
faca6227 | 106 | void (*load_sp0)(struct tss_struct *tss, struct thread_struct *t); |
d3561b7f | 107 | |
1a1eecd1 | 108 | void (*set_iopl_mask)(unsigned mask); |
93b1eab3 JF |
109 | |
110 | void (*wbinvd)(void); | |
1a1eecd1 | 111 | void (*io_delay)(void); |
d3561b7f | 112 | |
93b1eab3 JF |
113 | /* cpuid emulation, mostly so that caps bits can be disabled */ |
114 | void (*cpuid)(unsigned int *eax, unsigned int *ebx, | |
115 | unsigned int *ecx, unsigned int *edx); | |
116 | ||
117 | /* MSR, PMC and TSR operations. | |
118 | err = 0/-EFAULT. wrmsr returns 0/-EFAULT. */ | |
119 | u64 (*read_msr)(unsigned int msr, int *err); | |
c9dcda5c | 120 | int (*write_msr)(unsigned int msr, unsigned low, unsigned high); |
93b1eab3 JF |
121 | |
122 | u64 (*read_tsc)(void); | |
b8d1fae7 | 123 | u64 (*read_pmc)(int counter); |
e5aaac44 | 124 | unsigned long long (*read_tscp)(unsigned int *aux); |
93b1eab3 JF |
125 | |
126 | /* These two are jmp to, not actually called. */ | |
6abcd98f | 127 | void (*irq_enable_syscall_ret)(void); |
93b1eab3 | 128 | void (*iret)(void); |
8965c1c0 JF |
129 | |
130 | struct pv_lazy_ops lazy_mode; | |
93b1eab3 JF |
131 | }; |
132 | ||
133 | struct pv_irq_ops { | |
134 | void (*init_IRQ)(void); | |
135 | ||
294688c0 | 136 | /* |
93b1eab3 JF |
137 | * Get/set interrupt state. save_fl and restore_fl are only |
138 | * expected to use X86_EFLAGS_IF; all other bits | |
139 | * returned from save_fl are undefined, and may be ignored by | |
140 | * restore_fl. | |
294688c0 | 141 | */ |
93b1eab3 JF |
142 | unsigned long (*save_fl)(void); |
143 | void (*restore_fl)(unsigned long); | |
144 | void (*irq_disable)(void); | |
145 | void (*irq_enable)(void); | |
146 | void (*safe_halt)(void); | |
147 | void (*halt)(void); | |
148 | }; | |
d6dd61c8 | 149 | |
93b1eab3 | 150 | struct pv_apic_ops { |
13623d79 | 151 | #ifdef CONFIG_X86_LOCAL_APIC |
294688c0 JF |
152 | /* |
153 | * Direct APIC operations, principally for VMI. Ideally | |
154 | * these shouldn't be in this interface. | |
155 | */ | |
42e0a9aa TG |
156 | void (*apic_write)(unsigned long reg, u32 v); |
157 | void (*apic_write_atomic)(unsigned long reg, u32 v); | |
158 | u32 (*apic_read)(unsigned long reg); | |
bbab4f3b ZA |
159 | void (*setup_boot_clock)(void); |
160 | void (*setup_secondary_clock)(void); | |
294688c0 JF |
161 | |
162 | void (*startup_ipi_hook)(int phys_apicid, | |
163 | unsigned long start_eip, | |
164 | unsigned long start_esp); | |
13623d79 | 165 | #endif |
93b1eab3 JF |
166 | }; |
167 | ||
168 | struct pv_mmu_ops { | |
169 | /* | |
170 | * Called before/after init_mm pagetable setup. setup_start | |
171 | * may reset %cr3, and may pre-install parts of the pagetable; | |
172 | * pagetable setup is expected to preserve any existing | |
173 | * mapping. | |
174 | */ | |
175 | void (*pagetable_setup_start)(pgd_t *pgd_base); | |
176 | void (*pagetable_setup_done)(pgd_t *pgd_base); | |
177 | ||
178 | unsigned long (*read_cr2)(void); | |
179 | void (*write_cr2)(unsigned long); | |
180 | ||
181 | unsigned long (*read_cr3)(void); | |
182 | void (*write_cr3)(unsigned long); | |
183 | ||
184 | /* | |
185 | * Hooks for intercepting the creation/use/destruction of an | |
186 | * mm_struct. | |
187 | */ | |
188 | void (*activate_mm)(struct mm_struct *prev, | |
189 | struct mm_struct *next); | |
190 | void (*dup_mmap)(struct mm_struct *oldmm, | |
191 | struct mm_struct *mm); | |
192 | void (*exit_mmap)(struct mm_struct *mm); | |
193 | ||
13623d79 | 194 | |
294688c0 | 195 | /* TLB operations */ |
1a1eecd1 AK |
196 | void (*flush_tlb_user)(void); |
197 | void (*flush_tlb_kernel)(void); | |
f8822f42 | 198 | void (*flush_tlb_single)(unsigned long addr); |
d4c10477 JF |
199 | void (*flush_tlb_others)(const cpumask_t *cpus, struct mm_struct *mm, |
200 | unsigned long va); | |
1a1eecd1 | 201 | |
294688c0 | 202 | /* Hooks for allocating/releasing pagetable pages */ |
fdb4c338 | 203 | void (*alloc_pt)(struct mm_struct *mm, u32 pfn); |
1a1eecd1 AK |
204 | void (*alloc_pd)(u32 pfn); |
205 | void (*alloc_pd_clone)(u32 pfn, u32 clonepfn, u32 start, u32 count); | |
206 | void (*release_pt)(u32 pfn); | |
207 | void (*release_pd)(u32 pfn); | |
208 | ||
294688c0 | 209 | /* Pagetable manipulation functions */ |
1a1eecd1 | 210 | void (*set_pte)(pte_t *ptep, pte_t pteval); |
294688c0 JF |
211 | void (*set_pte_at)(struct mm_struct *mm, unsigned long addr, |
212 | pte_t *ptep, pte_t pteval); | |
1a1eecd1 | 213 | void (*set_pmd)(pmd_t *pmdp, pmd_t pmdval); |
3dc494e8 | 214 | void (*pte_update)(struct mm_struct *mm, unsigned long addr, pte_t *ptep); |
294688c0 JF |
215 | void (*pte_update_defer)(struct mm_struct *mm, |
216 | unsigned long addr, pte_t *ptep); | |
3dc494e8 | 217 | |
da181a8b | 218 | #ifdef CONFIG_X86_PAE |
1a1eecd1 | 219 | void (*set_pte_atomic)(pte_t *ptep, pte_t pteval); |
93b1eab3 JF |
220 | void (*set_pte_present)(struct mm_struct *mm, unsigned long addr, |
221 | pte_t *ptep, pte_t pte); | |
1a1eecd1 | 222 | void (*set_pud)(pud_t *pudp, pud_t pudval); |
93b1eab3 | 223 | void (*pte_clear)(struct mm_struct *mm, unsigned long addr, pte_t *ptep); |
1a1eecd1 | 224 | void (*pmd_clear)(pmd_t *pmdp); |
3dc494e8 JF |
225 | |
226 | unsigned long long (*pte_val)(pte_t); | |
227 | unsigned long long (*pmd_val)(pmd_t); | |
228 | unsigned long long (*pgd_val)(pgd_t); | |
229 | ||
230 | pte_t (*make_pte)(unsigned long long pte); | |
231 | pmd_t (*make_pmd)(unsigned long long pmd); | |
232 | pgd_t (*make_pgd)(unsigned long long pgd); | |
233 | #else | |
234 | unsigned long (*pte_val)(pte_t); | |
235 | unsigned long (*pgd_val)(pgd_t); | |
236 | ||
237 | pte_t (*make_pte)(unsigned long pte); | |
238 | pgd_t (*make_pgd)(unsigned long pgd); | |
da181a8b RR |
239 | #endif |
240 | ||
93b1eab3 JF |
241 | #ifdef CONFIG_HIGHPTE |
242 | void *(*kmap_atomic_pte)(struct page *page, enum km_type type); | |
243 | #endif | |
8965c1c0 JF |
244 | |
245 | struct pv_lazy_ops lazy_mode; | |
93b1eab3 | 246 | }; |
9226d125 | 247 | |
93b1eab3 JF |
248 | /* This contains all the paravirt structures: we get a convenient |
249 | * number for each function using the offset which we use to indicate | |
250 | * what to patch. */ | |
251 | struct paravirt_patch_template | |
252 | { | |
253 | struct pv_init_ops pv_init_ops; | |
93b1eab3 JF |
254 | struct pv_time_ops pv_time_ops; |
255 | struct pv_cpu_ops pv_cpu_ops; | |
256 | struct pv_irq_ops pv_irq_ops; | |
257 | struct pv_apic_ops pv_apic_ops; | |
258 | struct pv_mmu_ops pv_mmu_ops; | |
d3561b7f RR |
259 | }; |
260 | ||
93b1eab3 JF |
261 | extern struct pv_info pv_info; |
262 | extern struct pv_init_ops pv_init_ops; | |
93b1eab3 JF |
263 | extern struct pv_time_ops pv_time_ops; |
264 | extern struct pv_cpu_ops pv_cpu_ops; | |
265 | extern struct pv_irq_ops pv_irq_ops; | |
266 | extern struct pv_apic_ops pv_apic_ops; | |
267 | extern struct pv_mmu_ops pv_mmu_ops; | |
d3561b7f | 268 | |
d5822035 | 269 | #define PARAVIRT_PATCH(x) \ |
93b1eab3 | 270 | (offsetof(struct paravirt_patch_template, x) / sizeof(void *)) |
d5822035 | 271 | |
93b1eab3 JF |
272 | #define paravirt_type(op) \ |
273 | [paravirt_typenum] "i" (PARAVIRT_PATCH(op)), \ | |
274 | [paravirt_opptr] "m" (op) | |
d5822035 JF |
275 | #define paravirt_clobber(clobber) \ |
276 | [paravirt_clobber] "i" (clobber) | |
277 | ||
294688c0 JF |
278 | /* |
279 | * Generate some code, and mark it as patchable by the | |
280 | * apply_paravirt() alternate instruction patcher. | |
281 | */ | |
d5822035 JF |
282 | #define _paravirt_alt(insn_string, type, clobber) \ |
283 | "771:\n\t" insn_string "\n" "772:\n" \ | |
284 | ".pushsection .parainstructions,\"a\"\n" \ | |
658be9d3 GOC |
285 | _ASM_ALIGN "\n" \ |
286 | _ASM_PTR " 771b\n" \ | |
d5822035 JF |
287 | " .byte " type "\n" \ |
288 | " .byte 772b-771b\n" \ | |
289 | " .short " clobber "\n" \ | |
290 | ".popsection\n" | |
291 | ||
294688c0 | 292 | /* Generate patchable code, with the default asm parameters. */ |
f8822f42 | 293 | #define paravirt_alt(insn_string) \ |
d5822035 JF |
294 | _paravirt_alt(insn_string, "%c[paravirt_typenum]", "%c[paravirt_clobber]") |
295 | ||
63f70270 JF |
296 | unsigned paravirt_patch_nop(void); |
297 | unsigned paravirt_patch_ignore(unsigned len); | |
ab144f5e AK |
298 | unsigned paravirt_patch_call(void *insnbuf, |
299 | const void *target, u16 tgt_clobbers, | |
300 | unsigned long addr, u16 site_clobbers, | |
63f70270 | 301 | unsigned len); |
93b1eab3 | 302 | unsigned paravirt_patch_jmp(void *insnbuf, const void *target, |
ab144f5e AK |
303 | unsigned long addr, unsigned len); |
304 | unsigned paravirt_patch_default(u8 type, u16 clobbers, void *insnbuf, | |
305 | unsigned long addr, unsigned len); | |
63f70270 | 306 | |
ab144f5e | 307 | unsigned paravirt_patch_insns(void *insnbuf, unsigned len, |
63f70270 JF |
308 | const char *start, const char *end); |
309 | ||
d572929c | 310 | int paravirt_disable_iospace(void); |
63f70270 | 311 | |
294688c0 JF |
312 | /* |
313 | * This generates an indirect call based on the operation type number. | |
314 | * The type number, computed in PARAVIRT_PATCH, is derived from the | |
93b1eab3 JF |
315 | * offset into the paravirt_patch_template structure, and can therefore be |
316 | * freely converted back into a structure offset. | |
294688c0 | 317 | */ |
93b1eab3 | 318 | #define PARAVIRT_CALL "call *%[paravirt_opptr];" |
294688c0 JF |
319 | |
320 | /* | |
93b1eab3 JF |
321 | * These macros are intended to wrap calls through one of the paravirt |
322 | * ops structs, so that they can be later identified and patched at | |
294688c0 JF |
323 | * runtime. |
324 | * | |
325 | * Normally, a call to a pv_op function is a simple indirect call: | |
a4746364 | 326 | * (pv_op_struct.operations)(args...). |
294688c0 JF |
327 | * |
328 | * Unfortunately, this is a relatively slow operation for modern CPUs, | |
329 | * because it cannot necessarily determine what the destination | |
330 | * address is. In this case, the address is a runtime constant, so at | |
331 | * the very least we can patch the call to e a simple direct call, or | |
332 | * ideally, patch an inline implementation into the callsite. (Direct | |
333 | * calls are essentially free, because the call and return addresses | |
334 | * are completely predictable.) | |
335 | * | |
a4746364 | 336 | * For i386, these macros rely on the standard gcc "regparm(3)" calling |
294688c0 JF |
337 | * convention, in which the first three arguments are placed in %eax, |
338 | * %edx, %ecx (in that order), and the remaining arguments are placed | |
339 | * on the stack. All caller-save registers (eax,edx,ecx) are expected | |
340 | * to be modified (either clobbered or used for return values). | |
a4746364 GOC |
341 | * X86_64, on the other hand, already specifies a register-based calling |
342 | * conventions, returning at %rax, with parameteres going on %rdi, %rsi, | |
343 | * %rdx, and %rcx. Note that for this reason, x86_64 does not need any | |
344 | * special handling for dealing with 4 arguments, unlike i386. | |
345 | * However, x86_64 also have to clobber all caller saved registers, which | |
346 | * unfortunately, are quite a bit (r8 - r11) | |
294688c0 JF |
347 | * |
348 | * The call instruction itself is marked by placing its start address | |
349 | * and size into the .parainstructions section, so that | |
350 | * apply_paravirt() in arch/i386/kernel/alternative.c can do the | |
93b1eab3 | 351 | * appropriate patching under the control of the backend pv_init_ops |
294688c0 JF |
352 | * implementation. |
353 | * | |
354 | * Unfortunately there's no way to get gcc to generate the args setup | |
355 | * for the call, and then allow the call itself to be generated by an | |
356 | * inline asm. Because of this, we must do the complete arg setup and | |
357 | * return value handling from within these macros. This is fairly | |
358 | * cumbersome. | |
359 | * | |
360 | * There are 5 sets of PVOP_* macros for dealing with 0-4 arguments. | |
361 | * It could be extended to more arguments, but there would be little | |
362 | * to be gained from that. For each number of arguments, there are | |
363 | * the two VCALL and CALL variants for void and non-void functions. | |
364 | * | |
365 | * When there is a return value, the invoker of the macro must specify | |
366 | * the return type. The macro then uses sizeof() on that type to | |
367 | * determine whether its a 32 or 64 bit value, and places the return | |
368 | * in the right register(s) (just %eax for 32-bit, and %edx:%eax for | |
a4746364 GOC |
369 | * 64-bit). For x86_64 machines, it just returns at %rax regardless of |
370 | * the return value size. | |
294688c0 JF |
371 | * |
372 | * 64-bit arguments are passed as a pair of adjacent 32-bit arguments | |
a4746364 GOC |
373 | * i386 also passes 64-bit arguments as a pair of adjacent 32-bit arguments |
374 | * in low,high order | |
294688c0 JF |
375 | * |
376 | * Small structures are passed and returned in registers. The macro | |
377 | * calling convention can't directly deal with this, so the wrapper | |
378 | * functions must do this. | |
379 | * | |
380 | * These PVOP_* macros are only defined within this header. This | |
381 | * means that all uses must be wrapped in inline functions. This also | |
382 | * makes sure the incoming and outgoing types are always correct. | |
383 | */ | |
a4746364 GOC |
384 | #ifdef CONFIG_X86_32 |
385 | #define PVOP_VCALL_ARGS unsigned long __eax, __edx, __ecx | |
386 | #define PVOP_CALL_ARGS PVOP_VCALL_ARGS | |
387 | #define PVOP_VCALL_CLOBBERS "=a" (__eax), "=d" (__edx), \ | |
388 | "=c" (__ecx) | |
389 | #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS | |
390 | #define EXTRA_CLOBBERS | |
391 | #define VEXTRA_CLOBBERS | |
392 | #else | |
393 | #define PVOP_VCALL_ARGS unsigned long __edi, __esi, __edx, __ecx | |
394 | #define PVOP_CALL_ARGS PVOP_VCALL_ARGS, __eax | |
395 | #define PVOP_VCALL_CLOBBERS "=D" (__edi), \ | |
396 | "=S" (__esi), "=d" (__edx), \ | |
397 | "=c" (__ecx) | |
398 | ||
399 | #define PVOP_CALL_CLOBBERS PVOP_VCALL_CLOBBERS, "=a" (__eax) | |
400 | ||
401 | #define EXTRA_CLOBBERS , "r8", "r9", "r10", "r11" | |
402 | #define VEXTRA_CLOBBERS , "rax", "r8", "r9", "r10", "r11" | |
403 | #endif | |
404 | ||
1a45b7aa | 405 | #define __PVOP_CALL(rettype, op, pre, post, ...) \ |
f8822f42 | 406 | ({ \ |
1a45b7aa | 407 | rettype __ret; \ |
a4746364 GOC |
408 | PVOP_CALL_ARGS; \ |
409 | /* This is 32-bit specific, but is okay in 64-bit */ \ | |
410 | /* since this condition will never hold */ \ | |
1a45b7aa JF |
411 | if (sizeof(rettype) > sizeof(unsigned long)) { \ |
412 | asm volatile(pre \ | |
413 | paravirt_alt(PARAVIRT_CALL) \ | |
414 | post \ | |
a4746364 | 415 | : PVOP_CALL_CLOBBERS \ |
1a45b7aa JF |
416 | : paravirt_type(op), \ |
417 | paravirt_clobber(CLBR_ANY), \ | |
418 | ##__VA_ARGS__ \ | |
a4746364 | 419 | : "memory", "cc" EXTRA_CLOBBERS); \ |
1a45b7aa | 420 | __ret = (rettype)((((u64)__edx) << 32) | __eax); \ |
f8822f42 | 421 | } else { \ |
1a45b7aa | 422 | asm volatile(pre \ |
f8822f42 | 423 | paravirt_alt(PARAVIRT_CALL) \ |
1a45b7aa | 424 | post \ |
a4746364 | 425 | : PVOP_CALL_CLOBBERS \ |
1a45b7aa JF |
426 | : paravirt_type(op), \ |
427 | paravirt_clobber(CLBR_ANY), \ | |
428 | ##__VA_ARGS__ \ | |
a4746364 | 429 | : "memory", "cc" EXTRA_CLOBBERS); \ |
1a45b7aa | 430 | __ret = (rettype)__eax; \ |
f8822f42 JF |
431 | } \ |
432 | __ret; \ | |
433 | }) | |
1a45b7aa | 434 | #define __PVOP_VCALL(op, pre, post, ...) \ |
f8822f42 | 435 | ({ \ |
a4746364 | 436 | PVOP_VCALL_ARGS; \ |
1a45b7aa | 437 | asm volatile(pre \ |
f8822f42 | 438 | paravirt_alt(PARAVIRT_CALL) \ |
1a45b7aa | 439 | post \ |
a4746364 | 440 | : PVOP_VCALL_CLOBBERS \ |
1a45b7aa JF |
441 | : paravirt_type(op), \ |
442 | paravirt_clobber(CLBR_ANY), \ | |
443 | ##__VA_ARGS__ \ | |
a4746364 | 444 | : "memory", "cc" VEXTRA_CLOBBERS); \ |
f8822f42 JF |
445 | }) |
446 | ||
1a45b7aa JF |
447 | #define PVOP_CALL0(rettype, op) \ |
448 | __PVOP_CALL(rettype, op, "", "") | |
449 | #define PVOP_VCALL0(op) \ | |
450 | __PVOP_VCALL(op, "", "") | |
451 | ||
452 | #define PVOP_CALL1(rettype, op, arg1) \ | |
a4746364 | 453 | __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1))) |
1a45b7aa | 454 | #define PVOP_VCALL1(op, arg1) \ |
a4746364 | 455 | __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1))) |
1a45b7aa JF |
456 | |
457 | #define PVOP_CALL2(rettype, op, arg1, arg2) \ | |
a4746364 GOC |
458 | __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \ |
459 | "1" ((unsigned long)(arg2))) | |
1a45b7aa | 460 | #define PVOP_VCALL2(op, arg1, arg2) \ |
a4746364 GOC |
461 | __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \ |
462 | "1" ((unsigned long)(arg2))) | |
1a45b7aa JF |
463 | |
464 | #define PVOP_CALL3(rettype, op, arg1, arg2, arg3) \ | |
a4746364 GOC |
465 | __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \ |
466 | "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3))) | |
1a45b7aa | 467 | #define PVOP_VCALL3(op, arg1, arg2, arg3) \ |
a4746364 GOC |
468 | __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \ |
469 | "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3))) | |
1a45b7aa | 470 | |
a4746364 GOC |
471 | /* This is the only difference in x86_64. We can make it much simpler */ |
472 | #ifdef CONFIG_X86_32 | |
1a45b7aa JF |
473 | #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ |
474 | __PVOP_CALL(rettype, op, \ | |
475 | "push %[_arg4];", "lea 4(%%esp),%%esp;", \ | |
476 | "0" ((u32)(arg1)), "1" ((u32)(arg2)), \ | |
477 | "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4))) | |
478 | #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ | |
479 | __PVOP_VCALL(op, \ | |
480 | "push %[_arg4];", "lea 4(%%esp),%%esp;", \ | |
481 | "0" ((u32)(arg1)), "1" ((u32)(arg2)), \ | |
482 | "2" ((u32)(arg3)), [_arg4] "mr" ((u32)(arg4))) | |
a4746364 GOC |
483 | #else |
484 | #define PVOP_CALL4(rettype, op, arg1, arg2, arg3, arg4) \ | |
485 | __PVOP_CALL(rettype, op, "", "", "0" ((unsigned long)(arg1)), \ | |
486 | "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \ | |
487 | "3"((unsigned long)(arg4))) | |
488 | #define PVOP_VCALL4(op, arg1, arg2, arg3, arg4) \ | |
489 | __PVOP_VCALL(op, "", "", "0" ((unsigned long)(arg1)), \ | |
490 | "1"((unsigned long)(arg2)), "2"((unsigned long)(arg3)), \ | |
491 | "3"((unsigned long)(arg4))) | |
492 | #endif | |
1a45b7aa | 493 | |
f8822f42 JF |
494 | static inline int paravirt_enabled(void) |
495 | { | |
93b1eab3 | 496 | return pv_info.paravirt_enabled; |
f8822f42 | 497 | } |
d3561b7f | 498 | |
faca6227 | 499 | static inline void load_sp0(struct tss_struct *tss, |
d3561b7f RR |
500 | struct thread_struct *thread) |
501 | { | |
faca6227 | 502 | PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread); |
d3561b7f RR |
503 | } |
504 | ||
93b1eab3 | 505 | #define ARCH_SETUP pv_init_ops.arch_setup(); |
d3561b7f RR |
506 | static inline unsigned long get_wallclock(void) |
507 | { | |
93b1eab3 | 508 | return PVOP_CALL0(unsigned long, pv_time_ops.get_wallclock); |
d3561b7f RR |
509 | } |
510 | ||
511 | static inline int set_wallclock(unsigned long nowtime) | |
512 | { | |
93b1eab3 | 513 | return PVOP_CALL1(int, pv_time_ops.set_wallclock, nowtime); |
d3561b7f RR |
514 | } |
515 | ||
e30fab3a | 516 | static inline void (*choose_time_init(void))(void) |
d3561b7f | 517 | { |
93b1eab3 | 518 | return pv_time_ops.time_init; |
d3561b7f RR |
519 | } |
520 | ||
521 | /* The paravirtualized CPUID instruction. */ | |
522 | static inline void __cpuid(unsigned int *eax, unsigned int *ebx, | |
523 | unsigned int *ecx, unsigned int *edx) | |
524 | { | |
93b1eab3 | 525 | PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx); |
d3561b7f RR |
526 | } |
527 | ||
528 | /* | |
529 | * These special macros can be used to get or set a debugging register | |
530 | */ | |
f8822f42 JF |
531 | static inline unsigned long paravirt_get_debugreg(int reg) |
532 | { | |
93b1eab3 | 533 | return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg); |
f8822f42 JF |
534 | } |
535 | #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg) | |
536 | static inline void set_debugreg(unsigned long val, int reg) | |
537 | { | |
93b1eab3 | 538 | PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val); |
f8822f42 | 539 | } |
d3561b7f | 540 | |
f8822f42 JF |
541 | static inline void clts(void) |
542 | { | |
93b1eab3 | 543 | PVOP_VCALL0(pv_cpu_ops.clts); |
f8822f42 | 544 | } |
d3561b7f | 545 | |
f8822f42 JF |
546 | static inline unsigned long read_cr0(void) |
547 | { | |
93b1eab3 | 548 | return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0); |
f8822f42 | 549 | } |
d3561b7f | 550 | |
f8822f42 JF |
551 | static inline void write_cr0(unsigned long x) |
552 | { | |
93b1eab3 | 553 | PVOP_VCALL1(pv_cpu_ops.write_cr0, x); |
f8822f42 JF |
554 | } |
555 | ||
556 | static inline unsigned long read_cr2(void) | |
557 | { | |
93b1eab3 | 558 | return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2); |
f8822f42 JF |
559 | } |
560 | ||
561 | static inline void write_cr2(unsigned long x) | |
562 | { | |
93b1eab3 | 563 | PVOP_VCALL1(pv_mmu_ops.write_cr2, x); |
f8822f42 JF |
564 | } |
565 | ||
566 | static inline unsigned long read_cr3(void) | |
567 | { | |
93b1eab3 | 568 | return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3); |
f8822f42 | 569 | } |
d3561b7f | 570 | |
f8822f42 JF |
571 | static inline void write_cr3(unsigned long x) |
572 | { | |
93b1eab3 | 573 | PVOP_VCALL1(pv_mmu_ops.write_cr3, x); |
f8822f42 | 574 | } |
d3561b7f | 575 | |
f8822f42 JF |
576 | static inline unsigned long read_cr4(void) |
577 | { | |
93b1eab3 | 578 | return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4); |
f8822f42 JF |
579 | } |
580 | static inline unsigned long read_cr4_safe(void) | |
581 | { | |
93b1eab3 | 582 | return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4_safe); |
f8822f42 | 583 | } |
d3561b7f | 584 | |
f8822f42 JF |
585 | static inline void write_cr4(unsigned long x) |
586 | { | |
93b1eab3 | 587 | PVOP_VCALL1(pv_cpu_ops.write_cr4, x); |
f8822f42 | 588 | } |
3dc494e8 | 589 | |
d3561b7f RR |
590 | static inline void raw_safe_halt(void) |
591 | { | |
93b1eab3 | 592 | PVOP_VCALL0(pv_irq_ops.safe_halt); |
d3561b7f RR |
593 | } |
594 | ||
595 | static inline void halt(void) | |
596 | { | |
93b1eab3 | 597 | PVOP_VCALL0(pv_irq_ops.safe_halt); |
f8822f42 JF |
598 | } |
599 | ||
600 | static inline void wbinvd(void) | |
601 | { | |
93b1eab3 | 602 | PVOP_VCALL0(pv_cpu_ops.wbinvd); |
d3561b7f | 603 | } |
d3561b7f | 604 | |
93b1eab3 | 605 | #define get_kernel_rpl() (pv_info.kernel_rpl) |
d3561b7f | 606 | |
f8822f42 JF |
607 | static inline u64 paravirt_read_msr(unsigned msr, int *err) |
608 | { | |
93b1eab3 | 609 | return PVOP_CALL2(u64, pv_cpu_ops.read_msr, msr, err); |
f8822f42 JF |
610 | } |
611 | static inline int paravirt_write_msr(unsigned msr, unsigned low, unsigned high) | |
612 | { | |
93b1eab3 | 613 | return PVOP_CALL3(int, pv_cpu_ops.write_msr, msr, low, high); |
f8822f42 JF |
614 | } |
615 | ||
90a0a06a | 616 | /* These should all do BUG_ON(_err), but our headers are too tangled. */ |
f8822f42 JF |
617 | #define rdmsr(msr,val1,val2) do { \ |
618 | int _err; \ | |
619 | u64 _l = paravirt_read_msr(msr, &_err); \ | |
620 | val1 = (u32)_l; \ | |
621 | val2 = _l >> 32; \ | |
d3561b7f RR |
622 | } while(0) |
623 | ||
f8822f42 JF |
624 | #define wrmsr(msr,val1,val2) do { \ |
625 | paravirt_write_msr(msr, val1, val2); \ | |
d3561b7f RR |
626 | } while(0) |
627 | ||
f8822f42 JF |
628 | #define rdmsrl(msr,val) do { \ |
629 | int _err; \ | |
630 | val = paravirt_read_msr(msr, &_err); \ | |
d3561b7f RR |
631 | } while(0) |
632 | ||
b9e3614f | 633 | #define wrmsrl(msr,val) wrmsr(msr, (u32)((u64)(val)), ((u64)(val))>>32) |
f8822f42 | 634 | #define wrmsr_safe(msr,a,b) paravirt_write_msr(msr, a, b) |
d3561b7f RR |
635 | |
636 | /* rdmsr with exception handling */ | |
f8822f42 JF |
637 | #define rdmsr_safe(msr,a,b) ({ \ |
638 | int _err; \ | |
639 | u64 _l = paravirt_read_msr(msr, &_err); \ | |
640 | (*a) = (u32)_l; \ | |
641 | (*b) = _l >> 32; \ | |
d3561b7f RR |
642 | _err; }) |
643 | ||
f8822f42 JF |
644 | |
645 | static inline u64 paravirt_read_tsc(void) | |
646 | { | |
93b1eab3 | 647 | return PVOP_CALL0(u64, pv_cpu_ops.read_tsc); |
f8822f42 | 648 | } |
d3561b7f | 649 | |
f8822f42 JF |
650 | #define rdtscl(low) do { \ |
651 | u64 _l = paravirt_read_tsc(); \ | |
652 | low = (int)_l; \ | |
d3561b7f RR |
653 | } while(0) |
654 | ||
f8822f42 | 655 | #define rdtscll(val) (val = paravirt_read_tsc()) |
d3561b7f | 656 | |
688340ea JF |
657 | static inline unsigned long long paravirt_sched_clock(void) |
658 | { | |
93b1eab3 | 659 | return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock); |
688340ea | 660 | } |
93b1eab3 | 661 | #define calculate_cpu_khz() (pv_time_ops.get_cpu_khz()) |
6cb9a835 | 662 | |
f8822f42 JF |
663 | static inline unsigned long long paravirt_read_pmc(int counter) |
664 | { | |
93b1eab3 | 665 | return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter); |
f8822f42 | 666 | } |
d3561b7f | 667 | |
f8822f42 JF |
668 | #define rdpmc(counter,low,high) do { \ |
669 | u64 _l = paravirt_read_pmc(counter); \ | |
670 | low = (u32)_l; \ | |
671 | high = _l >> 32; \ | |
672 | } while(0) | |
3dc494e8 | 673 | |
e5aaac44 GOC |
674 | static inline unsigned long long paravirt_rdtscp(unsigned int *aux) |
675 | { | |
676 | return PVOP_CALL1(u64, pv_cpu_ops.read_tscp, aux); | |
677 | } | |
678 | ||
679 | #define rdtscp(low, high, aux) \ | |
680 | do { \ | |
681 | int __aux; \ | |
682 | unsigned long __val = paravirt_rdtscp(&__aux); \ | |
683 | (low) = (u32)__val; \ | |
684 | (high) = (u32)(__val >> 32); \ | |
685 | (aux) = __aux; \ | |
686 | } while (0) | |
687 | ||
688 | #define rdtscpll(val, aux) \ | |
689 | do { \ | |
690 | unsigned long __aux; \ | |
691 | val = paravirt_rdtscp(&__aux); \ | |
692 | (aux) = __aux; \ | |
693 | } while (0) | |
694 | ||
f8822f42 JF |
695 | static inline void load_TR_desc(void) |
696 | { | |
93b1eab3 | 697 | PVOP_VCALL0(pv_cpu_ops.load_tr_desc); |
f8822f42 | 698 | } |
6b68f01b | 699 | static inline void load_gdt(const struct desc_ptr *dtr) |
f8822f42 | 700 | { |
93b1eab3 | 701 | PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr); |
f8822f42 | 702 | } |
6b68f01b | 703 | static inline void load_idt(const struct desc_ptr *dtr) |
f8822f42 | 704 | { |
93b1eab3 | 705 | PVOP_VCALL1(pv_cpu_ops.load_idt, dtr); |
f8822f42 JF |
706 | } |
707 | static inline void set_ldt(const void *addr, unsigned entries) | |
708 | { | |
93b1eab3 | 709 | PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries); |
f8822f42 | 710 | } |
6b68f01b | 711 | static inline void store_gdt(struct desc_ptr *dtr) |
f8822f42 | 712 | { |
93b1eab3 | 713 | PVOP_VCALL1(pv_cpu_ops.store_gdt, dtr); |
f8822f42 | 714 | } |
6b68f01b | 715 | static inline void store_idt(struct desc_ptr *dtr) |
f8822f42 | 716 | { |
93b1eab3 | 717 | PVOP_VCALL1(pv_cpu_ops.store_idt, dtr); |
f8822f42 JF |
718 | } |
719 | static inline unsigned long paravirt_store_tr(void) | |
720 | { | |
93b1eab3 | 721 | return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr); |
f8822f42 JF |
722 | } |
723 | #define store_tr(tr) ((tr) = paravirt_store_tr()) | |
724 | static inline void load_TLS(struct thread_struct *t, unsigned cpu) | |
725 | { | |
93b1eab3 | 726 | PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu); |
f8822f42 | 727 | } |
75b8bb3e GOC |
728 | |
729 | static inline void write_ldt_entry(struct desc_struct *dt, int entry, | |
730 | const void *desc) | |
f8822f42 | 731 | { |
75b8bb3e | 732 | PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc); |
f8822f42 | 733 | } |
014b15be GOC |
734 | |
735 | static inline void write_gdt_entry(struct desc_struct *dt, int entry, | |
736 | void *desc, int type) | |
f8822f42 | 737 | { |
014b15be | 738 | PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type); |
f8822f42 | 739 | } |
014b15be | 740 | |
8d947344 | 741 | static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g) |
f8822f42 | 742 | { |
8d947344 | 743 | PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g); |
f8822f42 JF |
744 | } |
745 | static inline void set_iopl_mask(unsigned mask) | |
746 | { | |
93b1eab3 | 747 | PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask); |
f8822f42 | 748 | } |
3dc494e8 | 749 | |
d3561b7f RR |
750 | /* The paravirtualized I/O functions */ |
751 | static inline void slow_down_io(void) { | |
93b1eab3 | 752 | pv_cpu_ops.io_delay(); |
d3561b7f | 753 | #ifdef REALLY_SLOW_IO |
93b1eab3 JF |
754 | pv_cpu_ops.io_delay(); |
755 | pv_cpu_ops.io_delay(); | |
756 | pv_cpu_ops.io_delay(); | |
d3561b7f RR |
757 | #endif |
758 | } | |
759 | ||
13623d79 RR |
760 | #ifdef CONFIG_X86_LOCAL_APIC |
761 | /* | |
762 | * Basic functions accessing APICs. | |
763 | */ | |
42e0a9aa | 764 | static inline void apic_write(unsigned long reg, u32 v) |
13623d79 | 765 | { |
93b1eab3 | 766 | PVOP_VCALL2(pv_apic_ops.apic_write, reg, v); |
13623d79 RR |
767 | } |
768 | ||
42e0a9aa | 769 | static inline void apic_write_atomic(unsigned long reg, u32 v) |
13623d79 | 770 | { |
93b1eab3 | 771 | PVOP_VCALL2(pv_apic_ops.apic_write_atomic, reg, v); |
13623d79 RR |
772 | } |
773 | ||
42e0a9aa | 774 | static inline u32 apic_read(unsigned long reg) |
13623d79 | 775 | { |
93b1eab3 | 776 | return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg); |
13623d79 | 777 | } |
bbab4f3b ZA |
778 | |
779 | static inline void setup_boot_clock(void) | |
780 | { | |
93b1eab3 | 781 | PVOP_VCALL0(pv_apic_ops.setup_boot_clock); |
bbab4f3b ZA |
782 | } |
783 | ||
784 | static inline void setup_secondary_clock(void) | |
785 | { | |
93b1eab3 | 786 | PVOP_VCALL0(pv_apic_ops.setup_secondary_clock); |
bbab4f3b | 787 | } |
13623d79 RR |
788 | #endif |
789 | ||
6996d3b6 JF |
790 | static inline void paravirt_post_allocator_init(void) |
791 | { | |
93b1eab3 JF |
792 | if (pv_init_ops.post_allocator_init) |
793 | (*pv_init_ops.post_allocator_init)(); | |
6996d3b6 JF |
794 | } |
795 | ||
b239fb25 JF |
796 | static inline void paravirt_pagetable_setup_start(pgd_t *base) |
797 | { | |
93b1eab3 | 798 | (*pv_mmu_ops.pagetable_setup_start)(base); |
b239fb25 JF |
799 | } |
800 | ||
801 | static inline void paravirt_pagetable_setup_done(pgd_t *base) | |
802 | { | |
93b1eab3 | 803 | (*pv_mmu_ops.pagetable_setup_done)(base); |
b239fb25 | 804 | } |
3dc494e8 | 805 | |
ae5da273 ZA |
806 | #ifdef CONFIG_SMP |
807 | static inline void startup_ipi_hook(int phys_apicid, unsigned long start_eip, | |
808 | unsigned long start_esp) | |
809 | { | |
93b1eab3 JF |
810 | PVOP_VCALL3(pv_apic_ops.startup_ipi_hook, |
811 | phys_apicid, start_eip, start_esp); | |
ae5da273 ZA |
812 | } |
813 | #endif | |
13623d79 | 814 | |
d6dd61c8 JF |
815 | static inline void paravirt_activate_mm(struct mm_struct *prev, |
816 | struct mm_struct *next) | |
817 | { | |
93b1eab3 | 818 | PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next); |
d6dd61c8 JF |
819 | } |
820 | ||
821 | static inline void arch_dup_mmap(struct mm_struct *oldmm, | |
822 | struct mm_struct *mm) | |
823 | { | |
93b1eab3 | 824 | PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm); |
d6dd61c8 JF |
825 | } |
826 | ||
827 | static inline void arch_exit_mmap(struct mm_struct *mm) | |
828 | { | |
93b1eab3 | 829 | PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm); |
d6dd61c8 JF |
830 | } |
831 | ||
f8822f42 JF |
832 | static inline void __flush_tlb(void) |
833 | { | |
93b1eab3 | 834 | PVOP_VCALL0(pv_mmu_ops.flush_tlb_user); |
f8822f42 JF |
835 | } |
836 | static inline void __flush_tlb_global(void) | |
837 | { | |
93b1eab3 | 838 | PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel); |
f8822f42 JF |
839 | } |
840 | static inline void __flush_tlb_single(unsigned long addr) | |
841 | { | |
93b1eab3 | 842 | PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr); |
f8822f42 | 843 | } |
da181a8b | 844 | |
d4c10477 JF |
845 | static inline void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm, |
846 | unsigned long va) | |
847 | { | |
93b1eab3 | 848 | PVOP_VCALL3(pv_mmu_ops.flush_tlb_others, &cpumask, mm, va); |
d4c10477 JF |
849 | } |
850 | ||
fdb4c338 | 851 | static inline void paravirt_alloc_pt(struct mm_struct *mm, unsigned pfn) |
f8822f42 | 852 | { |
93b1eab3 | 853 | PVOP_VCALL2(pv_mmu_ops.alloc_pt, mm, pfn); |
f8822f42 JF |
854 | } |
855 | static inline void paravirt_release_pt(unsigned pfn) | |
856 | { | |
93b1eab3 | 857 | PVOP_VCALL1(pv_mmu_ops.release_pt, pfn); |
f8822f42 | 858 | } |
c119ecce | 859 | |
f8822f42 JF |
860 | static inline void paravirt_alloc_pd(unsigned pfn) |
861 | { | |
93b1eab3 | 862 | PVOP_VCALL1(pv_mmu_ops.alloc_pd, pfn); |
f8822f42 | 863 | } |
c119ecce | 864 | |
f8822f42 JF |
865 | static inline void paravirt_alloc_pd_clone(unsigned pfn, unsigned clonepfn, |
866 | unsigned start, unsigned count) | |
867 | { | |
93b1eab3 | 868 | PVOP_VCALL4(pv_mmu_ops.alloc_pd_clone, pfn, clonepfn, start, count); |
f8822f42 JF |
869 | } |
870 | static inline void paravirt_release_pd(unsigned pfn) | |
da181a8b | 871 | { |
93b1eab3 | 872 | PVOP_VCALL1(pv_mmu_ops.release_pd, pfn); |
da181a8b RR |
873 | } |
874 | ||
ce6234b5 JF |
875 | #ifdef CONFIG_HIGHPTE |
876 | static inline void *kmap_atomic_pte(struct page *page, enum km_type type) | |
877 | { | |
878 | unsigned long ret; | |
93b1eab3 | 879 | ret = PVOP_CALL2(unsigned long, pv_mmu_ops.kmap_atomic_pte, page, type); |
ce6234b5 JF |
880 | return (void *)ret; |
881 | } | |
882 | #endif | |
883 | ||
f8822f42 JF |
884 | static inline void pte_update(struct mm_struct *mm, unsigned long addr, |
885 | pte_t *ptep) | |
da181a8b | 886 | { |
93b1eab3 | 887 | PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep); |
da181a8b RR |
888 | } |
889 | ||
f8822f42 JF |
890 | static inline void pte_update_defer(struct mm_struct *mm, unsigned long addr, |
891 | pte_t *ptep) | |
da181a8b | 892 | { |
93b1eab3 | 893 | PVOP_VCALL3(pv_mmu_ops.pte_update_defer, mm, addr, ptep); |
da181a8b RR |
894 | } |
895 | ||
f8822f42 JF |
896 | #ifdef CONFIG_X86_PAE |
897 | static inline pte_t __pte(unsigned long long val) | |
da181a8b | 898 | { |
93b1eab3 JF |
899 | unsigned long long ret = PVOP_CALL2(unsigned long long, |
900 | pv_mmu_ops.make_pte, | |
f8822f42 JF |
901 | val, val >> 32); |
902 | return (pte_t) { ret, ret >> 32 }; | |
da181a8b RR |
903 | } |
904 | ||
f8822f42 | 905 | static inline pmd_t __pmd(unsigned long long val) |
da181a8b | 906 | { |
93b1eab3 JF |
907 | return (pmd_t) { PVOP_CALL2(unsigned long long, pv_mmu_ops.make_pmd, |
908 | val, val >> 32) }; | |
f8822f42 JF |
909 | } |
910 | ||
911 | static inline pgd_t __pgd(unsigned long long val) | |
912 | { | |
93b1eab3 JF |
913 | return (pgd_t) { PVOP_CALL2(unsigned long long, pv_mmu_ops.make_pgd, |
914 | val, val >> 32) }; | |
f8822f42 JF |
915 | } |
916 | ||
917 | static inline unsigned long long pte_val(pte_t x) | |
918 | { | |
93b1eab3 JF |
919 | return PVOP_CALL2(unsigned long long, pv_mmu_ops.pte_val, |
920 | x.pte_low, x.pte_high); | |
f8822f42 JF |
921 | } |
922 | ||
923 | static inline unsigned long long pmd_val(pmd_t x) | |
924 | { | |
93b1eab3 JF |
925 | return PVOP_CALL2(unsigned long long, pv_mmu_ops.pmd_val, |
926 | x.pmd, x.pmd >> 32); | |
f8822f42 JF |
927 | } |
928 | ||
929 | static inline unsigned long long pgd_val(pgd_t x) | |
930 | { | |
93b1eab3 JF |
931 | return PVOP_CALL2(unsigned long long, pv_mmu_ops.pgd_val, |
932 | x.pgd, x.pgd >> 32); | |
f8822f42 JF |
933 | } |
934 | ||
935 | static inline void set_pte(pte_t *ptep, pte_t pteval) | |
936 | { | |
93b1eab3 | 937 | PVOP_VCALL3(pv_mmu_ops.set_pte, ptep, pteval.pte_low, pteval.pte_high); |
f8822f42 JF |
938 | } |
939 | ||
940 | static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, | |
941 | pte_t *ptep, pte_t pteval) | |
942 | { | |
943 | /* 5 arg words */ | |
93b1eab3 | 944 | pv_mmu_ops.set_pte_at(mm, addr, ptep, pteval); |
da181a8b RR |
945 | } |
946 | ||
da181a8b RR |
947 | static inline void set_pte_atomic(pte_t *ptep, pte_t pteval) |
948 | { | |
93b1eab3 JF |
949 | PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep, |
950 | pteval.pte_low, pteval.pte_high); | |
da181a8b RR |
951 | } |
952 | ||
f8822f42 JF |
953 | static inline void set_pte_present(struct mm_struct *mm, unsigned long addr, |
954 | pte_t *ptep, pte_t pte) | |
da181a8b | 955 | { |
f8822f42 | 956 | /* 5 arg words */ |
93b1eab3 | 957 | pv_mmu_ops.set_pte_present(mm, addr, ptep, pte); |
da181a8b RR |
958 | } |
959 | ||
f8822f42 JF |
960 | static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval) |
961 | { | |
93b1eab3 JF |
962 | PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, |
963 | pmdval.pmd, pmdval.pmd >> 32); | |
f8822f42 JF |
964 | } |
965 | ||
da181a8b RR |
966 | static inline void set_pud(pud_t *pudp, pud_t pudval) |
967 | { | |
93b1eab3 JF |
968 | PVOP_VCALL3(pv_mmu_ops.set_pud, pudp, |
969 | pudval.pgd.pgd, pudval.pgd.pgd >> 32); | |
da181a8b RR |
970 | } |
971 | ||
972 | static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) | |
973 | { | |
93b1eab3 | 974 | PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep); |
da181a8b RR |
975 | } |
976 | ||
977 | static inline void pmd_clear(pmd_t *pmdp) | |
978 | { | |
93b1eab3 | 979 | PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp); |
f8822f42 JF |
980 | } |
981 | ||
f8822f42 | 982 | #else /* !CONFIG_X86_PAE */ |
4cdd9c89 | 983 | |
f8822f42 JF |
984 | static inline pte_t __pte(unsigned long val) |
985 | { | |
93b1eab3 | 986 | return (pte_t) { PVOP_CALL1(unsigned long, pv_mmu_ops.make_pte, val) }; |
da181a8b | 987 | } |
f8822f42 JF |
988 | |
989 | static inline pgd_t __pgd(unsigned long val) | |
990 | { | |
93b1eab3 | 991 | return (pgd_t) { PVOP_CALL1(unsigned long, pv_mmu_ops.make_pgd, val) }; |
f8822f42 JF |
992 | } |
993 | ||
994 | static inline unsigned long pte_val(pte_t x) | |
995 | { | |
93b1eab3 | 996 | return PVOP_CALL1(unsigned long, pv_mmu_ops.pte_val, x.pte_low); |
f8822f42 JF |
997 | } |
998 | ||
999 | static inline unsigned long pgd_val(pgd_t x) | |
1000 | { | |
93b1eab3 | 1001 | return PVOP_CALL1(unsigned long, pv_mmu_ops.pgd_val, x.pgd); |
f8822f42 JF |
1002 | } |
1003 | ||
1004 | static inline void set_pte(pte_t *ptep, pte_t pteval) | |
1005 | { | |
93b1eab3 | 1006 | PVOP_VCALL2(pv_mmu_ops.set_pte, ptep, pteval.pte_low); |
f8822f42 JF |
1007 | } |
1008 | ||
1009 | static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, | |
1010 | pte_t *ptep, pte_t pteval) | |
1011 | { | |
93b1eab3 | 1012 | PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pteval.pte_low); |
f8822f42 JF |
1013 | } |
1014 | ||
1015 | static inline void set_pmd(pmd_t *pmdp, pmd_t pmdval) | |
1016 | { | |
93b1eab3 | 1017 | PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, pmdval.pud.pgd.pgd); |
f8822f42 | 1018 | } |
f8822f42 | 1019 | #endif /* CONFIG_X86_PAE */ |
da181a8b | 1020 | |
8965c1c0 JF |
1021 | /* Lazy mode for batching updates / context switch */ |
1022 | enum paravirt_lazy_mode { | |
1023 | PARAVIRT_LAZY_NONE, | |
1024 | PARAVIRT_LAZY_MMU, | |
1025 | PARAVIRT_LAZY_CPU, | |
1026 | }; | |
1027 | ||
1028 | enum paravirt_lazy_mode paravirt_get_lazy_mode(void); | |
1029 | void paravirt_enter_lazy_cpu(void); | |
1030 | void paravirt_leave_lazy_cpu(void); | |
1031 | void paravirt_enter_lazy_mmu(void); | |
1032 | void paravirt_leave_lazy_mmu(void); | |
1033 | void paravirt_leave_lazy(enum paravirt_lazy_mode mode); | |
1034 | ||
9226d125 | 1035 | #define __HAVE_ARCH_ENTER_LAZY_CPU_MODE |
f8822f42 JF |
1036 | static inline void arch_enter_lazy_cpu_mode(void) |
1037 | { | |
8965c1c0 | 1038 | PVOP_VCALL0(pv_cpu_ops.lazy_mode.enter); |
f8822f42 JF |
1039 | } |
1040 | ||
1041 | static inline void arch_leave_lazy_cpu_mode(void) | |
1042 | { | |
8965c1c0 | 1043 | PVOP_VCALL0(pv_cpu_ops.lazy_mode.leave); |
f8822f42 JF |
1044 | } |
1045 | ||
1046 | static inline void arch_flush_lazy_cpu_mode(void) | |
1047 | { | |
8965c1c0 JF |
1048 | if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)) { |
1049 | arch_leave_lazy_cpu_mode(); | |
1050 | arch_enter_lazy_cpu_mode(); | |
1051 | } | |
f8822f42 JF |
1052 | } |
1053 | ||
9226d125 ZA |
1054 | |
1055 | #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE | |
f8822f42 JF |
1056 | static inline void arch_enter_lazy_mmu_mode(void) |
1057 | { | |
8965c1c0 | 1058 | PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter); |
f8822f42 JF |
1059 | } |
1060 | ||
1061 | static inline void arch_leave_lazy_mmu_mode(void) | |
1062 | { | |
8965c1c0 | 1063 | PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave); |
f8822f42 JF |
1064 | } |
1065 | ||
1066 | static inline void arch_flush_lazy_mmu_mode(void) | |
1067 | { | |
8965c1c0 JF |
1068 | if (unlikely(paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU)) { |
1069 | arch_leave_lazy_mmu_mode(); | |
1070 | arch_enter_lazy_mmu_mode(); | |
1071 | } | |
f8822f42 | 1072 | } |
9226d125 | 1073 | |
45876233 JF |
1074 | void _paravirt_nop(void); |
1075 | #define paravirt_nop ((void *)_paravirt_nop) | |
1076 | ||
139ec7c4 | 1077 | /* These all sit in the .parainstructions section to tell us what to patch. */ |
98de032b | 1078 | struct paravirt_patch_site { |
139ec7c4 RR |
1079 | u8 *instr; /* original instructions */ |
1080 | u8 instrtype; /* type of this instruction */ | |
1081 | u8 len; /* length of original instruction */ | |
1082 | u16 clobbers; /* what registers you may clobber */ | |
1083 | }; | |
1084 | ||
98de032b JF |
1085 | extern struct paravirt_patch_site __parainstructions[], |
1086 | __parainstructions_end[]; | |
1087 | ||
139ec7c4 RR |
1088 | static inline unsigned long __raw_local_save_flags(void) |
1089 | { | |
1090 | unsigned long f; | |
1091 | ||
d5822035 JF |
1092 | asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;" |
1093 | PARAVIRT_CALL | |
1094 | "popl %%edx; popl %%ecx") | |
1095 | : "=a"(f) | |
93b1eab3 | 1096 | : paravirt_type(pv_irq_ops.save_fl), |
42c24fa2 | 1097 | paravirt_clobber(CLBR_EAX) |
d5822035 | 1098 | : "memory", "cc"); |
139ec7c4 RR |
1099 | return f; |
1100 | } | |
1101 | ||
1102 | static inline void raw_local_irq_restore(unsigned long f) | |
1103 | { | |
d5822035 JF |
1104 | asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;" |
1105 | PARAVIRT_CALL | |
1106 | "popl %%edx; popl %%ecx") | |
1107 | : "=a"(f) | |
1108 | : "0"(f), | |
93b1eab3 | 1109 | paravirt_type(pv_irq_ops.restore_fl), |
d5822035 JF |
1110 | paravirt_clobber(CLBR_EAX) |
1111 | : "memory", "cc"); | |
139ec7c4 RR |
1112 | } |
1113 | ||
1114 | static inline void raw_local_irq_disable(void) | |
1115 | { | |
d5822035 JF |
1116 | asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;" |
1117 | PARAVIRT_CALL | |
1118 | "popl %%edx; popl %%ecx") | |
1119 | : | |
93b1eab3 | 1120 | : paravirt_type(pv_irq_ops.irq_disable), |
d5822035 JF |
1121 | paravirt_clobber(CLBR_EAX) |
1122 | : "memory", "eax", "cc"); | |
139ec7c4 RR |
1123 | } |
1124 | ||
1125 | static inline void raw_local_irq_enable(void) | |
1126 | { | |
d5822035 JF |
1127 | asm volatile(paravirt_alt("pushl %%ecx; pushl %%edx;" |
1128 | PARAVIRT_CALL | |
1129 | "popl %%edx; popl %%ecx") | |
1130 | : | |
93b1eab3 | 1131 | : paravirt_type(pv_irq_ops.irq_enable), |
d5822035 JF |
1132 | paravirt_clobber(CLBR_EAX) |
1133 | : "memory", "eax", "cc"); | |
139ec7c4 RR |
1134 | } |
1135 | ||
1136 | static inline unsigned long __raw_local_irq_save(void) | |
1137 | { | |
1138 | unsigned long f; | |
1139 | ||
d5822035 JF |
1140 | f = __raw_local_save_flags(); |
1141 | raw_local_irq_disable(); | |
139ec7c4 RR |
1142 | return f; |
1143 | } | |
1144 | ||
294688c0 | 1145 | /* Make sure as little as possible of this mess escapes. */ |
d5822035 | 1146 | #undef PARAVIRT_CALL |
1a45b7aa JF |
1147 | #undef __PVOP_CALL |
1148 | #undef __PVOP_VCALL | |
f8822f42 JF |
1149 | #undef PVOP_VCALL0 |
1150 | #undef PVOP_CALL0 | |
1151 | #undef PVOP_VCALL1 | |
1152 | #undef PVOP_CALL1 | |
1153 | #undef PVOP_VCALL2 | |
1154 | #undef PVOP_CALL2 | |
1155 | #undef PVOP_VCALL3 | |
1156 | #undef PVOP_CALL3 | |
1157 | #undef PVOP_VCALL4 | |
1158 | #undef PVOP_CALL4 | |
139ec7c4 | 1159 | |
d3561b7f RR |
1160 | #else /* __ASSEMBLY__ */ |
1161 | ||
658be9d3 | 1162 | #define _PVSITE(ptype, clobbers, ops, word, algn) \ |
139ec7c4 RR |
1163 | 771:; \ |
1164 | ops; \ | |
1165 | 772:; \ | |
1166 | .pushsection .parainstructions,"a"; \ | |
658be9d3 GOC |
1167 | .align algn; \ |
1168 | word 771b; \ | |
139ec7c4 RR |
1169 | .byte ptype; \ |
1170 | .byte 772b-771b; \ | |
1171 | .short clobbers; \ | |
1172 | .popsection | |
1173 | ||
658be9d3 GOC |
1174 | |
1175 | #ifdef CONFIG_X86_64 | |
6057fc82 GOC |
1176 | #define PV_SAVE_REGS pushq %rax; pushq %rdi; pushq %rcx; pushq %rdx |
1177 | #define PV_RESTORE_REGS popq %rdx; popq %rcx; popq %rdi; popq %rax | |
1178 | #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 8) | |
658be9d3 GOC |
1179 | #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8) |
1180 | #else | |
6057fc82 GOC |
1181 | #define PV_SAVE_REGS pushl %eax; pushl %edi; pushl %ecx; pushl %edx |
1182 | #define PV_RESTORE_REGS popl %edx; popl %ecx; popl %edi; popl %eax | |
1183 | #define PARA_PATCH(struct, off) ((PARAVIRT_PATCH_##struct + (off)) / 4) | |
658be9d3 GOC |
1184 | #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4) |
1185 | #endif | |
1186 | ||
93b1eab3 JF |
1187 | #define INTERRUPT_RETURN \ |
1188 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE, \ | |
1189 | jmp *%cs:pv_cpu_ops+PV_CPU_iret) | |
d5822035 JF |
1190 | |
1191 | #define DISABLE_INTERRUPTS(clobbers) \ | |
93b1eab3 | 1192 | PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \ |
6057fc82 | 1193 | PV_SAVE_REGS; \ |
93b1eab3 | 1194 | call *%cs:pv_irq_ops+PV_IRQ_irq_disable; \ |
6057fc82 | 1195 | PV_RESTORE_REGS;) \ |
d5822035 JF |
1196 | |
1197 | #define ENABLE_INTERRUPTS(clobbers) \ | |
93b1eab3 | 1198 | PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers, \ |
6057fc82 | 1199 | PV_SAVE_REGS; \ |
93b1eab3 | 1200 | call *%cs:pv_irq_ops+PV_IRQ_irq_enable; \ |
6057fc82 | 1201 | PV_RESTORE_REGS;) |
d5822035 | 1202 | |
6abcd98f GOC |
1203 | #define ENABLE_INTERRUPTS_SYSCALL_RET \ |
1204 | PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_irq_enable_syscall_ret),\ | |
1205 | CLBR_NONE, \ | |
1206 | jmp *%cs:pv_cpu_ops+PV_CPU_irq_enable_syscall_ret) | |
139ec7c4 | 1207 | |
6057fc82 | 1208 | #ifdef CONFIG_X86_32 |
139ec7c4 | 1209 | #define GET_CR0_INTO_EAX \ |
42c24fa2 | 1210 | push %ecx; push %edx; \ |
93b1eab3 | 1211 | call *pv_cpu_ops+PV_CPU_read_cr0; \ |
42c24fa2 | 1212 | pop %edx; pop %ecx |
6057fc82 | 1213 | #endif |
139ec7c4 | 1214 | |
d3561b7f RR |
1215 | #endif /* __ASSEMBLY__ */ |
1216 | #endif /* CONFIG_PARAVIRT */ | |
1217 | #endif /* __ASM_PARAVIRT_H */ |