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1da177e4 LT |
1 | #ifndef __ASM_SMP_H |
2 | #define __ASM_SMP_H | |
3 | ||
4 | /* | |
5 | * We need the APIC definitions automatically as part of 'smp.h' | |
6 | */ | |
1da177e4 LT |
7 | #include <linux/threads.h> |
8 | #include <linux/cpumask.h> | |
9 | #include <linux/bitops.h> | |
43999d9e | 10 | #include <linux/init.h> |
1da177e4 | 11 | extern int disable_apic; |
1da177e4 | 12 | |
1da177e4 | 13 | #include <asm/mpspec.h> |
1da177e4 | 14 | #include <asm/apic.h> |
00f1ea69 | 15 | #include <asm/io_apic.h> |
1da177e4 | 16 | #include <asm/thread_info.h> |
1da177e4 LT |
17 | |
18 | #ifdef CONFIG_SMP | |
1da177e4 LT |
19 | |
20 | #include <asm/pda.h> | |
21 | ||
22 | struct pt_regs; | |
23 | ||
a8ab26fe AK |
24 | extern cpumask_t cpu_present_mask; |
25 | extern cpumask_t cpu_possible_map; | |
26 | extern cpumask_t cpu_online_map; | |
27 | extern cpumask_t cpu_callout_map; | |
3c021751 | 28 | extern cpumask_t cpu_initialized; |
a8ab26fe | 29 | |
1da177e4 LT |
30 | /* |
31 | * Private routines/data | |
32 | */ | |
33 | ||
34 | extern void smp_alloc_memory(void); | |
1da177e4 | 35 | extern volatile unsigned long smp_invalidate_needed; |
884d9e40 AR |
36 | extern void lock_ipi_call_lock(void); |
37 | extern void unlock_ipi_call_lock(void); | |
1da177e4 | 38 | extern int smp_num_siblings; |
1da177e4 | 39 | extern void smp_send_reschedule(int cpu); |
3d483f47 | 40 | |
08357611 | 41 | /* |
d5a7430d MT |
42 | * cpu_sibling_map and cpu_core_map now live |
43 | * in the per cpu area | |
08357611 | 44 | * |
d5a7430d | 45 | * extern cpumask_t cpu_sibling_map[NR_CPUS]; |
08357611 MT |
46 | * extern cpumask_t cpu_core_map[NR_CPUS]; |
47 | */ | |
d5a7430d | 48 | DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); |
08357611 | 49 | DECLARE_PER_CPU(cpumask_t, cpu_core_map); |
1e9f28fa | 50 | extern u8 cpu_llc_id[NR_CPUS]; |
1da177e4 LT |
51 | |
52 | #define SMP_TRAMPOLINE_BASE 0x6000 | |
53 | ||
54 | /* | |
55 | * On x86 all CPUs are mapped 1:1 to the APIC space. | |
56 | * This simplifies scheduling and IPI sending and | |
57 | * compresses data structures. | |
58 | */ | |
59 | ||
1da177e4 LT |
60 | static inline int num_booting_cpus(void) |
61 | { | |
62 | return cpus_weight(cpu_callout_map); | |
63 | } | |
64 | ||
39c715b7 | 65 | #define raw_smp_processor_id() read_pda(cpunumber) |
1da177e4 | 66 | |
76e4f660 AR |
67 | extern int __cpu_disable(void); |
68 | extern void __cpu_die(unsigned int cpu); | |
421c7ce6 | 69 | extern void prefill_possible_map(void); |
420f8f68 | 70 | extern unsigned num_processors; |
43999d9e | 71 | extern unsigned __cpuinitdata disabled_cpus; |
1da177e4 | 72 | |
1da177e4 LT |
73 | #define NO_PROC_ID 0xFF /* No processor magic marker */ |
74 | ||
2f4dfe20 | 75 | #endif /* CONFIG_SMP */ |
1da177e4 | 76 | |
dd988528 FLVC |
77 | static inline int hard_smp_processor_id(void) |
78 | { | |
79 | /* we don't want to mark this access volatile - bad code generation */ | |
80 | return GET_APIC_ID(*(unsigned int *)(APIC_BASE+APIC_ID)); | |
81 | } | |
82 | ||
1da177e4 LT |
83 | /* |
84 | * Some lowlevel functions might want to know about | |
85 | * the real APIC ID <-> CPU # mapping. | |
86 | */ | |
87 | extern u8 x86_cpu_to_apicid[NR_CPUS]; /* physical ID */ | |
88 | extern u8 x86_cpu_to_log_apicid[NR_CPUS]; | |
89 | extern u8 bios_cpu_apicid[]; | |
90 | ||
1da177e4 LT |
91 | static inline int cpu_present_to_apicid(int mps_cpu) |
92 | { | |
93 | if (mps_cpu < NR_CPUS) | |
94 | return (int)bios_cpu_apicid[mps_cpu]; | |
95 | else | |
96 | return BAD_APICID; | |
97 | } | |
98 | ||
1da177e4 LT |
99 | #ifndef CONFIG_SMP |
100 | #define stack_smp_processor_id() 0 | |
1da177e4 LT |
101 | #define cpu_logical_map(x) (x) |
102 | #else | |
103 | #include <asm/thread_info.h> | |
104 | #define stack_smp_processor_id() \ | |
105 | ({ \ | |
106 | struct thread_info *ti; \ | |
107 | __asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \ | |
108 | ti->cpu; \ | |
109 | }) | |
110 | #endif | |
111 | ||
1da177e4 LT |
112 | static __inline int logical_smp_processor_id(void) |
113 | { | |
114 | /* we don't want to mark this access volatile - bad code generation */ | |
115 | return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR)); | |
116 | } | |
1da177e4 | 117 | |
b4033c17 AR |
118 | #ifdef CONFIG_SMP |
119 | #define cpu_physical_id(cpu) x86_cpu_to_apicid[cpu] | |
120 | #else | |
121 | #define cpu_physical_id(cpu) boot_cpu_id | |
c08c8205 | 122 | #endif /* !CONFIG_SMP */ |
1da177e4 LT |
123 | #endif |
124 |