[mirror_ubuntu-bionic-kernel.git] / include / asm-x86 / tlbflush_64.h

#ifndef _X8664_TLBFLUSH_H
#define _X8664_TLBFLUSH_H

#include <linux/mm.h>
#include <linux/sched.h>
#include <asm/processor.h>
#include <asm/system.h>

static inline void __flush_tlb(void)
{
	write_cr3(read_cr3());
}

static inline void __flush_tlb_all(void)
{
	unsigned long cr4 = read_cr4();
	write_cr4(cr4 & ~X86_CR4_PGE);	/* clear PGE */
	write_cr4(cr4);			/* write old PGE again and flush TLBs */
}

#define __flush_tlb_one(addr) \
	__asm__ __volatile__("invlpg (%0)" :: "r" (addr) : "memory")


/*
 * TLB flushing:
 *
 *  - flush_tlb() flushes the current mm struct TLBs
 *  - flush_tlb_all() flushes all processes TLBs
 *  - flush_tlb_mm(mm) flushes the specified mm context TLB's
 *  - flush_tlb_page(vma, vmaddr) flushes one page
 *  - flush_tlb_range(vma, start, end) flushes a range of pages
 *  - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
 *
 * x86-64 can only flush individual pages or full VMs. For a range flush
 * we always do the full VM. Might be worth trying if for a small
 * range a few INVLPGs in a row are a win.
 */

#ifndef CONFIG_SMP

#define flush_tlb() __flush_tlb()
#define flush_tlb_all() __flush_tlb_all()
#define local_flush_tlb() __flush_tlb()

static inline void flush_tlb_mm(struct mm_struct *mm)
{
	if (mm == current->active_mm)
		__flush_tlb();
}

static inline void flush_tlb_page(struct vm_area_struct *vma,
	unsigned long addr)
{
	if (vma->vm_mm == current->active_mm)
		__flush_tlb_one(addr);
}

static inline void flush_tlb_range(struct vm_area_struct *vma,
	unsigned long start, unsigned long end)
{
	if (vma->vm_mm == current->active_mm)
		__flush_tlb();
}

#else

#include <asm/smp.h>

#define local_flush_tlb() \
	__flush_tlb()

extern void flush_tlb_all(void);
extern void flush_tlb_current_task(void);
extern void flush_tlb_mm(struct mm_struct *);
extern void flush_tlb_page(struct vm_area_struct *, unsigned long);

#define flush_tlb()	flush_tlb_current_task()

static inline void flush_tlb_range(struct vm_area_struct * vma, unsigned long start, unsigned long end)
{
	flush_tlb_mm(vma->vm_mm);
}

#define TLBSTATE_OK	1
#define TLBSTATE_LAZY	2

/* Roughly an IPI every 20MB with 4k pages for freeing page table
   ranges. Cost is about 42k of memory for each CPU. */
#define ARCH_FREE_PTE_NR 5350	

#endif

static inline void flush_tlb_kernel_range(unsigned long start,
					unsigned long end)
{
	flush_tlb_all();
}

#endif /* _X8664_TLBFLUSH_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef _X8664_TLBFLUSH_H
	2	#define _X8664_TLBFLUSH_H
	3
1da177e4	4	#include <linux/mm.h>
e8edc6e0	5	#include <linux/sched.h>
1da177e4	6	#include <asm/processor.h>
fbc16f2c	7	#include <asm/system.h>
b1c78c0f AK	8
	9	static inline void __flush_tlb(void)
	10	{
fbc16f2c	11	write_cr3(read_cr3());
b1c78c0f AK	12	}
	13
	14	static inline void __flush_tlb_all(void)
	15	{
fbc16f2c GOC	16	unsigned long cr4 = read_cr4();
	17	write_cr4(cr4 & ~X86_CR4_PGE); /* clear PGE */
	18	write_cr4(cr4); /* write old PGE again and flush TLBs */
b1c78c0f	19	}
1da177e4 LT	20
1da177e4 LT	21	#define __flush_tlb_one(addr) \
b1c78c0f	22	__asm__ __volatile__("invlpg (%0)" :: "r" (addr) : "memory")
1da177e4 LT	23
	24
	25	/*
	26	* TLB flushing:
	27	*
	28	* - flush_tlb() flushes the current mm struct TLBs
	29	* - flush_tlb_all() flushes all processes TLBs
	30	* - flush_tlb_mm(mm) flushes the specified mm context TLB's
	31	* - flush_tlb_page(vma, vmaddr) flushes one page
	32	* - flush_tlb_range(vma, start, end) flushes a range of pages
	33	* - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
1da177e4	34	*
d970a521 AK	35	* x86-64 can only flush individual pages or full VMs. For a range flush
	36	* we always do the full VM. Might be worth trying if for a small
	37	* range a few INVLPGs in a row are a win.
1da177e4 LT	38	*/
	39
	40	#ifndef CONFIG_SMP
	41
	42	#define flush_tlb() __flush_tlb()
	43	#define flush_tlb_all() __flush_tlb_all()
	44	#define local_flush_tlb() __flush_tlb()
	45
	46	static inline void flush_tlb_mm(struct mm_struct *mm)
	47	{
	48	if (mm == current->active_mm)
	49	__flush_tlb();
	50	}
	51
	52	static inline void flush_tlb_page(struct vm_area_struct *vma,
	53	unsigned long addr)
	54	{
	55	if (vma->vm_mm == current->active_mm)
	56	__flush_tlb_one(addr);
	57	}
	58
	59	static inline void flush_tlb_range(struct vm_area_struct *vma,
	60	unsigned long start, unsigned long end)
	61	{
	62	if (vma->vm_mm == current->active_mm)
	63	__flush_tlb();
	64	}
	65
	66	#else
	67
	68	#include <asm/smp.h>
	69
	70	#define local_flush_tlb() \
	71	__flush_tlb()
	72
	73	extern void flush_tlb_all(void);
	74	extern void flush_tlb_current_task(void);
	75	extern void flush_tlb_mm(struct mm_struct *);
	76	extern void flush_tlb_page(struct vm_area_struct *, unsigned long);
	77
	78	#define flush_tlb() flush_tlb_current_task()
	79
	80	static inline void flush_tlb_range(struct vm_area_struct * vma, unsigned long start, unsigned long end)
	81	{
	82	flush_tlb_mm(vma->vm_mm);
	83	}
	84
	85	#define TLBSTATE_OK 1
	86	#define TLBSTATE_LAZY 2
	87
2b4a0815 AK	88	/* Roughly an IPI every 20MB with 4k pages for freeing page table
	89	ranges. Cost is about 42k of memory for each CPU. */
	90	#define ARCH_FREE_PTE_NR 5350
	91
1da177e4 LT	92	#endif
1da177e4 LT	93
8f03d6ce AM	94	static inline void flush_tlb_kernel_range(unsigned long start,
	95	unsigned long end)
	96	{
	97	flush_tlb_all();
	98	}
1da177e4	99
1da177e4	100	#endif /* _X8664_TLBFLUSH_H */