[mirror_ubuntu-artful-kernel.git] / include / asm-x86_64 / dma-mapping.h

#ifndef _X8664_DMA_MAPPING_H
#define _X8664_DMA_MAPPING_H 1

/*
 * IOMMU interface. See Documentation/DMA-mapping.txt and DMA-API.txt for
 * documentation.
 */


#include <asm/scatterlist.h>
#include <asm/io.h>
#include <asm/swiotlb.h>

struct dma_mapping_ops {
	int             (*mapping_error)(dma_addr_t dma_addr);
	void*           (*alloc_coherent)(struct device *dev, size_t size,
                                dma_addr_t *dma_handle, gfp_t gfp);
	void            (*free_coherent)(struct device *dev, size_t size,
                                void *vaddr, dma_addr_t dma_handle);
	dma_addr_t      (*map_single)(struct device *hwdev, void *ptr,
                                size_t size, int direction);
	/* like map_single, but doesn't check the device mask */
	dma_addr_t      (*map_simple)(struct device *hwdev, char *ptr,
                                size_t size, int direction);
	void            (*unmap_single)(struct device *dev, dma_addr_t addr,
		                size_t size, int direction);
	void            (*sync_single_for_cpu)(struct device *hwdev,
		                dma_addr_t dma_handle, size_t size,
				int direction);
	void            (*sync_single_for_device)(struct device *hwdev,
                                dma_addr_t dma_handle, size_t size,
				int direction);
	void            (*sync_single_range_for_cpu)(struct device *hwdev,
                                dma_addr_t dma_handle, unsigned long offset,
		                size_t size, int direction);
	void            (*sync_single_range_for_device)(struct device *hwdev,
				dma_addr_t dma_handle, unsigned long offset,
		                size_t size, int direction);
	void            (*sync_sg_for_cpu)(struct device *hwdev,
                                struct scatterlist *sg, int nelems,
				int direction);
	void            (*sync_sg_for_device)(struct device *hwdev,
				struct scatterlist *sg, int nelems,
				int direction);
	int             (*map_sg)(struct device *hwdev, struct scatterlist *sg,
		                int nents, int direction);
	void            (*unmap_sg)(struct device *hwdev,
				struct scatterlist *sg, int nents,
				int direction);
	int             (*dma_supported)(struct device *hwdev, u64 mask);
	int		is_phys;
};

extern dma_addr_t bad_dma_address;
extern const struct dma_mapping_ops* dma_ops;
extern int iommu_merge;

static inline int dma_mapping_error(dma_addr_t dma_addr)
{
	if (dma_ops->mapping_error)
		return dma_ops->mapping_error(dma_addr);

	return (dma_addr == bad_dma_address);
}

#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)

#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)

extern void *dma_alloc_coherent(struct device *dev, size_t size,
				dma_addr_t *dma_handle, gfp_t gfp);
extern void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
			      dma_addr_t dma_handle);

static inline dma_addr_t
dma_map_single(struct device *hwdev, void *ptr, size_t size,
	       int direction)
{
	BUG_ON(!valid_dma_direction(direction));
	return dma_ops->map_single(hwdev, ptr, size, direction);
}

static inline void
dma_unmap_single(struct device *dev, dma_addr_t addr,size_t size,
		 int direction)
{
	BUG_ON(!valid_dma_direction(direction));
	dma_ops->unmap_single(dev, addr, size, direction);
}

#define dma_map_page(dev,page,offset,size,dir) \
	dma_map_single((dev), page_address(page)+(offset), (size), (dir))

#define dma_unmap_page dma_unmap_single

static inline void
dma_sync_single_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
			size_t size, int direction)
{
	BUG_ON(!valid_dma_direction(direction));
	if (dma_ops->sync_single_for_cpu)
		dma_ops->sync_single_for_cpu(hwdev, dma_handle, size,
					     direction);
	flush_write_buffers();
}

static inline void
dma_sync_single_for_device(struct device *hwdev, dma_addr_t dma_handle,
			   size_t size, int direction)
{
	BUG_ON(!valid_dma_direction(direction));
	if (dma_ops->sync_single_for_device)
		dma_ops->sync_single_for_device(hwdev, dma_handle, size,
						direction);
	flush_write_buffers();
}

static inline void
dma_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
			      unsigned long offset, size_t size, int direction)
{
	BUG_ON(!valid_dma_direction(direction));
	if (dma_ops->sync_single_range_for_cpu) {
		dma_ops->sync_single_range_for_cpu(hwdev, dma_handle, offset, size, direction);
	}

	flush_write_buffers();
}

static inline void
dma_sync_single_range_for_device(struct device *hwdev, dma_addr_t dma_handle,
				 unsigned long offset, size_t size, int direction)
{
	BUG_ON(!valid_dma_direction(direction));
	if (dma_ops->sync_single_range_for_device)
		dma_ops->sync_single_range_for_device(hwdev, dma_handle,
						      offset, size, direction);

	flush_write_buffers();
}

static inline void
dma_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
		    int nelems, int direction)
{
	BUG_ON(!valid_dma_direction(direction));
	if (dma_ops->sync_sg_for_cpu)
		dma_ops->sync_sg_for_cpu(hwdev, sg, nelems, direction);
	flush_write_buffers();
}

static inline void
dma_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
		       int nelems, int direction)
{
	BUG_ON(!valid_dma_direction(direction));
	if (dma_ops->sync_sg_for_device) {
		dma_ops->sync_sg_for_device(hwdev, sg, nelems, direction);
	}

	flush_write_buffers();
}

static inline int
dma_map_sg(struct device *hwdev, struct scatterlist *sg, int nents, int direction)
{
	BUG_ON(!valid_dma_direction(direction));
	return dma_ops->map_sg(hwdev, sg, nents, direction);
}

static inline void
dma_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nents,
	     int direction)
{
	BUG_ON(!valid_dma_direction(direction));
	dma_ops->unmap_sg(hwdev, sg, nents, direction);
}

extern int dma_supported(struct device *hwdev, u64 mask);

/* same for gart, swiotlb, and nommu */
static inline int dma_get_cache_alignment(void)
{
	return boot_cpu_data.x86_clflush_size;
}

#define dma_is_consistent(d, h) 1

extern int dma_set_mask(struct device *dev, u64 mask);

static inline void
dma_cache_sync(struct device *dev, void *vaddr, size_t size,
	enum dma_data_direction dir)
{
	flush_write_buffers();
}

extern struct device fallback_dev;
extern int panic_on_overflow;

#endif /* _X8664_DMA_MAPPING_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef _X8664_DMA_MAPPING_H
	2	#define _X8664_DMA_MAPPING_H 1
	3
	4	/*
	5	* IOMMU interface. See Documentation/DMA-mapping.txt and DMA-API.txt for
	6	* documentation.
	7	*/
	8
1da177e4 LT	9
	10	#include <asm/scatterlist.h>
	11	#include <asm/io.h>
	12	#include <asm/swiotlb.h>
	13
17a941d8 MBY	14	struct dma_mapping_ops {
	15	int (*mapping_error)(dma_addr_t dma_addr);
	16	void* (alloc_coherent)(struct device dev, size_t size,
	17	dma_addr_t *dma_handle, gfp_t gfp);
	18	void (free_coherent)(struct device dev, size_t size,
	19	void *vaddr, dma_addr_t dma_handle);
	20	dma_addr_t (map_single)(struct device hwdev, void *ptr,
	21	size_t size, int direction);
	22	/* like map_single, but doesn't check the device mask */
	23	dma_addr_t (map_simple)(struct device hwdev, char *ptr,
	24	size_t size, int direction);
	25	void (unmap_single)(struct device dev, dma_addr_t addr,
	26	size_t size, int direction);
	27	void (sync_single_for_cpu)(struct device hwdev,
	28	dma_addr_t dma_handle, size_t size,
	29	int direction);
	30	void (sync_single_for_device)(struct device hwdev,
	31	dma_addr_t dma_handle, size_t size,
	32	int direction);
	33	void (sync_single_range_for_cpu)(struct device hwdev,
	34	dma_addr_t dma_handle, unsigned long offset,
	35	size_t size, int direction);
	36	void (sync_single_range_for_device)(struct device hwdev,
	37	dma_addr_t dma_handle, unsigned long offset,
	38	size_t size, int direction);
	39	void (sync_sg_for_cpu)(struct device hwdev,
	40	struct scatterlist *sg, int nelems,
	41	int direction);
	42	void (sync_sg_for_device)(struct device hwdev,
	43	struct scatterlist *sg, int nelems,
	44	int direction);
	45	int (map_sg)(struct device hwdev, struct scatterlist *sg,
	46	int nents, int direction);
	47	void (unmap_sg)(struct device hwdev,
	48	struct scatterlist *sg, int nents,
	49	int direction);
	50	int (dma_supported)(struct device hwdev, u64 mask);
	51	int is_phys;
	52	};
1da177e4	53
17a941d8	54	extern dma_addr_t bad_dma_address;
e6584504	55	extern const struct dma_mapping_ops* dma_ops;
17a941d8	56	extern int iommu_merge;
1da177e4	57
17a941d8 MBY	58	static inline int dma_mapping_error(dma_addr_t dma_addr)
	59	{
	60	if (dma_ops->mapping_error)
	61	return dma_ops->mapping_error(dma_addr);
1da177e4	62
17a941d8 MBY	63	return (dma_addr == bad_dma_address);
17a941d8 MBY	64	}
1da177e4	65
259886a7 JG	66	#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
	67	#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
	68
2fa8a050 JG	69	#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
	70	#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
	71
17a941d8 MBY	72	extern void dma_alloc_coherent(struct device dev, size_t size,
	73	dma_addr_t *dma_handle, gfp_t gfp);
	74	extern void dma_free_coherent(struct device dev, size_t size, void vaddr,
	75	dma_addr_t dma_handle);
1da177e4	76
17a941d8 MBY	77	static inline dma_addr_t
	78	dma_map_single(struct device hwdev, void ptr, size_t size,
	79	int direction)
1da177e4	80	{
a3c042a0	81	BUG_ON(!valid_dma_direction(direction));
17a941d8	82	return dma_ops->map_single(hwdev, ptr, size, direction);
1da177e4 LT	83	}
1da177e4 LT	84
17a941d8 MBY	85	static inline void
	86	dma_unmap_single(struct device *dev, dma_addr_t addr,size_t size,
	87	int direction)
1da177e4	88	{
a3c042a0	89	BUG_ON(!valid_dma_direction(direction));
17a941d8	90	dma_ops->unmap_single(dev, addr, size, direction);
1da177e4 LT	91	}
1da177e4 LT	92
1da177e4 LT	93	#define dma_map_page(dev,page,offset,size,dir) \
	94	dma_map_single((dev), page_address(page)+(offset), (size), (dir))
	95
17a941d8	96	#define dma_unmap_page dma_unmap_single
1da177e4	97
17a941d8 MBY	98	static inline void
	99	dma_sync_single_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
	100	size_t size, int direction)
	101	{
a3c042a0	102	BUG_ON(!valid_dma_direction(direction));
17a941d8 MBY	103	if (dma_ops->sync_single_for_cpu)
	104	dma_ops->sync_single_for_cpu(hwdev, dma_handle, size,
	105	direction);
1da177e4 LT	106	flush_write_buffers();
	107	}
	108
17a941d8 MBY	109	static inline void
	110	dma_sync_single_for_device(struct device *hwdev, dma_addr_t dma_handle,
	111	size_t size, int direction)
1da177e4	112	{
a3c042a0	113	BUG_ON(!valid_dma_direction(direction));
17a941d8 MBY	114	if (dma_ops->sync_single_for_device)
	115	dma_ops->sync_single_for_device(hwdev, dma_handle, size,
	116	direction);
1da177e4 LT	117	flush_write_buffers();
	118	}
	119
17a941d8 MBY	120	static inline void
	121	dma_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
	122	unsigned long offset, size_t size, int direction)
8d15d19e	123	{
a3c042a0	124	BUG_ON(!valid_dma_direction(direction));
17a941d8 MBY	125	if (dma_ops->sync_single_range_for_cpu) {
	126	dma_ops->sync_single_range_for_cpu(hwdev, dma_handle, offset, size, direction);
	127	}
8d15d19e JL	128
	129	flush_write_buffers();
	130	}
	131
17a941d8 MBY	132	static inline void
	133	dma_sync_single_range_for_device(struct device *hwdev, dma_addr_t dma_handle,
	134	unsigned long offset, size_t size, int direction)
8d15d19e	135	{
a3c042a0	136	BUG_ON(!valid_dma_direction(direction));
17a941d8 MBY	137	if (dma_ops->sync_single_range_for_device)
	138	dma_ops->sync_single_range_for_device(hwdev, dma_handle,
	139	offset, size, direction);
8d15d19e JL	140
	141	flush_write_buffers();
	142	}
27183ebd	143
17a941d8 MBY	144	static inline void
	145	dma_sync_sg_for_cpu(struct device hwdev, struct scatterlist sg,
	146	int nelems, int direction)
1da177e4	147	{
a3c042a0	148	BUG_ON(!valid_dma_direction(direction));
17a941d8 MBY	149	if (dma_ops->sync_sg_for_cpu)
17a941d8 MBY	150	dma_ops->sync_sg_for_cpu(hwdev, sg, nelems, direction);
1da177e4 LT	151	flush_write_buffers();
	152	}
	153
17a941d8 MBY	154	static inline void
	155	dma_sync_sg_for_device(struct device hwdev, struct scatterlist sg,
	156	int nelems, int direction)
1da177e4	157	{
a3c042a0	158	BUG_ON(!valid_dma_direction(direction));
17a941d8 MBY	159	if (dma_ops->sync_sg_for_device) {
	160	dma_ops->sync_sg_for_device(hwdev, sg, nelems, direction);
	161	}
1da177e4 LT	162
	163	flush_write_buffers();
	164	}
	165
17a941d8 MBY	166	static inline int
	167	dma_map_sg(struct device hwdev, struct scatterlist sg, int nents, int direction)
	168	{
a3c042a0	169	BUG_ON(!valid_dma_direction(direction));
17a941d8 MBY	170	return dma_ops->map_sg(hwdev, sg, nents, direction);
17a941d8 MBY	171	}
1da177e4	172
17a941d8 MBY	173	static inline void
	174	dma_unmap_sg(struct device hwdev, struct scatterlist sg, int nents,
	175	int direction)
	176	{
a3c042a0	177	BUG_ON(!valid_dma_direction(direction));
17a941d8 MBY	178	dma_ops->unmap_sg(hwdev, sg, nents, direction);
17a941d8 MBY	179	}
1da177e4 LT	180
1da177e4 LT	181	extern int dma_supported(struct device *hwdev, u64 mask);
1da177e4	182
17a941d8 MBY	183	/* same for gart, swiotlb, and nommu */
17a941d8 MBY	184	static inline int dma_get_cache_alignment(void)
1da177e4	185	{
17a941d8	186	return boot_cpu_data.x86_clflush_size;
1da177e4 LT	187	}
1da177e4 LT	188
f67637ee	189	#define dma_is_consistent(d, h) 1
17a941d8 MBY	190
	191	extern int dma_set_mask(struct device *dev, u64 mask);
	192
	193	static inline void
d3fa72e4 RB	194	dma_cache_sync(struct device dev, void vaddr, size_t size,
d3fa72e4 RB	195	enum dma_data_direction dir)
1da177e4 LT	196	{
	197	flush_write_buffers();
	198	}
	199
17a941d8 MBY	200	extern struct device fallback_dev;
	201	extern int panic_on_overflow;
	202
	203	#endif /* _X8664_DMA_MAPPING_H */