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1da177e4 LT |
1 | #ifndef __x8664_PCI_H |
2 | #define __x8664_PCI_H | |
3 | ||
4 | #include <linux/config.h> | |
5 | #include <asm/io.h> | |
6 | ||
7 | #ifdef __KERNEL__ | |
8 | ||
9 | #include <linux/mm.h> /* for struct page */ | |
10 | ||
11 | /* Can be used to override the logic in pci_scan_bus for skipping | |
12 | already-configured bus numbers - to be used for buggy BIOSes | |
13 | or architectures with incomplete PCI setup by the loader */ | |
14 | ||
15 | #ifdef CONFIG_PCI | |
16 | extern unsigned int pcibios_assign_all_busses(void); | |
17 | #else | |
18 | #define pcibios_assign_all_busses() 0 | |
19 | #endif | |
20 | #define pcibios_scan_all_fns(a, b) 0 | |
21 | ||
22 | extern int no_iommu, force_iommu; | |
23 | ||
24 | extern unsigned long pci_mem_start; | |
25 | #define PCIBIOS_MIN_IO 0x1000 | |
26 | #define PCIBIOS_MIN_MEM (pci_mem_start) | |
27 | ||
28 | #define PCIBIOS_MIN_CARDBUS_IO 0x4000 | |
29 | ||
30 | void pcibios_config_init(void); | |
31 | struct pci_bus * pcibios_scan_root(int bus); | |
32 | extern int (*pci_config_read)(int seg, int bus, int dev, int fn, int reg, int len, u32 *value); | |
33 | extern int (*pci_config_write)(int seg, int bus, int dev, int fn, int reg, int len, u32 value); | |
34 | ||
35 | void pcibios_set_master(struct pci_dev *dev); | |
36 | void pcibios_penalize_isa_irq(int irq); | |
37 | struct irq_routing_table *pcibios_get_irq_routing_table(void); | |
38 | int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq); | |
39 | ||
40 | #include <linux/types.h> | |
41 | #include <linux/slab.h> | |
42 | #include <asm/scatterlist.h> | |
43 | #include <linux/string.h> | |
44 | #include <asm/page.h> | |
45 | ||
46 | extern int iommu_setup(char *opt); | |
47 | ||
48 | #ifdef CONFIG_GART_IOMMU | |
49 | /* The PCI address space does equal the physical memory | |
50 | * address space. The networking and block device layers use | |
51 | * this boolean for bounce buffer decisions | |
52 | * | |
53 | * On AMD64 it mostly equals, but we set it to zero to tell some subsystems | |
54 | * that an IOMMU is available. | |
55 | */ | |
56 | #define PCI_DMA_BUS_IS_PHYS (no_iommu ? 1 : 0) | |
57 | ||
58 | /* | |
59 | * x86-64 always supports DAC, but sometimes it is useful to force | |
60 | * devices through the IOMMU to get automatic sg list merging. | |
61 | * Optional right now. | |
62 | */ | |
63 | extern int iommu_sac_force; | |
64 | #define pci_dac_dma_supported(pci_dev, mask) (!iommu_sac_force) | |
65 | ||
66 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ | |
67 | dma_addr_t ADDR_NAME; | |
68 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ | |
69 | __u32 LEN_NAME; | |
70 | #define pci_unmap_addr(PTR, ADDR_NAME) \ | |
71 | ((PTR)->ADDR_NAME) | |
72 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ | |
73 | (((PTR)->ADDR_NAME) = (VAL)) | |
74 | #define pci_unmap_len(PTR, LEN_NAME) \ | |
75 | ((PTR)->LEN_NAME) | |
76 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ | |
77 | (((PTR)->LEN_NAME) = (VAL)) | |
78 | ||
79 | #else | |
80 | /* No IOMMU */ | |
81 | ||
82 | #define PCI_DMA_BUS_IS_PHYS 1 | |
83 | #define pci_dac_dma_supported(pci_dev, mask) 1 | |
84 | ||
85 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) | |
86 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) | |
87 | #define pci_unmap_addr(PTR, ADDR_NAME) (0) | |
88 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) | |
89 | #define pci_unmap_len(PTR, LEN_NAME) (0) | |
90 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) | |
91 | ||
92 | #endif | |
93 | ||
94 | #include <asm-generic/pci-dma-compat.h> | |
95 | ||
96 | static inline dma64_addr_t | |
97 | pci_dac_page_to_dma(struct pci_dev *pdev, struct page *page, unsigned long offset, int direction) | |
98 | { | |
99 | return ((dma64_addr_t) page_to_phys(page) + | |
100 | (dma64_addr_t) offset); | |
101 | } | |
102 | ||
103 | static inline struct page * | |
104 | pci_dac_dma_to_page(struct pci_dev *pdev, dma64_addr_t dma_addr) | |
105 | { | |
106 | return virt_to_page(__va(dma_addr)); | |
107 | } | |
108 | ||
109 | static inline unsigned long | |
110 | pci_dac_dma_to_offset(struct pci_dev *pdev, dma64_addr_t dma_addr) | |
111 | { | |
112 | return (dma_addr & ~PAGE_MASK); | |
113 | } | |
114 | ||
115 | static inline void | |
116 | pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction) | |
117 | { | |
118 | } | |
119 | ||
120 | static inline void | |
121 | pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction) | |
122 | { | |
123 | flush_write_buffers(); | |
124 | } | |
125 | ||
e24c2d96 DM |
126 | static inline void pci_dma_burst_advice(struct pci_dev *pdev, |
127 | enum pci_dma_burst_strategy *strat, | |
128 | unsigned long *strategy_parameter) | |
129 | { | |
130 | *strat = PCI_DMA_BURST_INFINITY; | |
131 | *strategy_parameter = ~0UL; | |
132 | } | |
133 | ||
1da177e4 LT |
134 | #define HAVE_PCI_MMAP |
135 | extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | |
136 | enum pci_mmap_state mmap_state, int write_combine); | |
137 | ||
138 | static inline void pcibios_add_platform_entries(struct pci_dev *dev) | |
139 | { | |
140 | } | |
141 | ||
142 | #endif /* __KERNEL__ */ | |
143 | ||
144 | /* generic pci stuff */ | |
145 | #ifdef CONFIG_PCI | |
146 | #include <asm-generic/pci.h> | |
147 | #endif | |
148 | ||
149 | #endif /* __x8664_PCI_H */ |