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Commit | Line | Data |
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67bad3e5 LP |
1 | /* |
2 | * ARTPEC-6 clock controller indexes | |
3 | * | |
4 | * Copyright 2016 Axis Comunications AB. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #ifndef DT_BINDINGS_CLK_ARTPEC6_CLKCTRL_H | |
12 | #define DT_BINDINGS_CLK_ARTPEC6_CLKCTRL_H | |
13 | ||
14 | #define ARTPEC6_CLK_CPU 0 | |
15 | #define ARTPEC6_CLK_CPU_PERIPH 1 | |
16 | #define ARTPEC6_CLK_NAND_CLKA 2 | |
17 | #define ARTPEC6_CLK_NAND_CLKB 3 | |
18 | #define ARTPEC6_CLK_ETH_ACLK 4 | |
19 | #define ARTPEC6_CLK_DMA_ACLK 5 | |
20 | #define ARTPEC6_CLK_PTP_REF 6 | |
21 | #define ARTPEC6_CLK_SD_PCLK 7 | |
22 | #define ARTPEC6_CLK_SD_IMCLK 8 | |
23 | #define ARTPEC6_CLK_I2S_HST 9 | |
24 | #define ARTPEC6_CLK_I2S0_CLK 10 | |
25 | #define ARTPEC6_CLK_I2S1_CLK 11 | |
26 | #define ARTPEC6_CLK_UART_PCLK 12 | |
27 | #define ARTPEC6_CLK_UART_REFCLK 13 | |
28 | #define ARTPEC6_CLK_I2C 14 | |
29 | #define ARTPEC6_CLK_SPI_PCLK 15 | |
30 | #define ARTPEC6_CLK_SPI_SSPCLK 16 | |
31 | #define ARTPEC6_CLK_SYS_TIMER 17 | |
32 | #define ARTPEC6_CLK_FRACDIV_IN 18 | |
33 | #define ARTPEC6_CLK_DBG_PCLK 19 | |
34 | ||
35 | /* This must be the highest clock index plus one. */ | |
36 | #define ARTPEC6_CLK_NUMCLOCKS 20 | |
37 | ||
38 | #endif |