[mirror_ubuntu-bionic-kernel.git] / include / dt-bindings / clock / sun6i-a31-ccu.h

/*
 * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This file is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This file is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

#ifndef _DT_BINDINGS_CLK_SUN6I_A31_H_
#define _DT_BINDINGS_CLK_SUN6I_A31_H_

#define CLK_PLL_VIDEO0_2X	7

#define CLK_PLL_PERIPH		10

#define CLK_PLL_VIDEO1_2X	13

#define CLK_CPU			18

#define CLK_AHB1_MIPIDSI	23
#define CLK_AHB1_SS		24
#define CLK_AHB1_DMA		25
#define CLK_AHB1_MMC0		26
#define CLK_AHB1_MMC1		27
#define CLK_AHB1_MMC2		28
#define CLK_AHB1_MMC3		29
#define CLK_AHB1_NAND1		30
#define CLK_AHB1_NAND0		31
#define CLK_AHB1_SDRAM		32
#define CLK_AHB1_EMAC		33
#define CLK_AHB1_TS		34
#define CLK_AHB1_HSTIMER	35
#define CLK_AHB1_SPI0		36
#define CLK_AHB1_SPI1		37
#define CLK_AHB1_SPI2		38
#define CLK_AHB1_SPI3		39
#define CLK_AHB1_OTG		40
#define CLK_AHB1_EHCI0		41
#define CLK_AHB1_EHCI1		42
#define CLK_AHB1_OHCI0		43
#define CLK_AHB1_OHCI1		44
#define CLK_AHB1_OHCI2		45
#define CLK_AHB1_VE		46
#define CLK_AHB1_LCD0		47
#define CLK_AHB1_LCD1		48
#define CLK_AHB1_CSI		49
#define CLK_AHB1_HDMI		50
#define CLK_AHB1_BE0		51
#define CLK_AHB1_BE1		52
#define CLK_AHB1_FE0		53
#define CLK_AHB1_FE1		54
#define CLK_AHB1_MP		55
#define CLK_AHB1_GPU		56
#define CLK_AHB1_DEU0		57
#define CLK_AHB1_DEU1		58
#define CLK_AHB1_DRC0		59
#define CLK_AHB1_DRC1		60

#define CLK_APB1_CODEC		61
#define CLK_APB1_SPDIF		62
#define CLK_APB1_DIGITAL_MIC	63
#define CLK_APB1_PIO		64
#define CLK_APB1_DAUDIO0	65
#define CLK_APB1_DAUDIO1	66

#define CLK_APB2_I2C0		67
#define CLK_APB2_I2C1		68
#define CLK_APB2_I2C2		69
#define CLK_APB2_I2C3		70
#define CLK_APB2_UART0		71
#define CLK_APB2_UART1		72
#define CLK_APB2_UART2		73
#define CLK_APB2_UART3		74
#define CLK_APB2_UART4		75
#define CLK_APB2_UART5		76

#define CLK_NAND0		77
#define CLK_NAND1		78
#define CLK_MMC0		79
#define CLK_MMC0_SAMPLE		80
#define CLK_MMC0_OUTPUT		81
#define CLK_MMC1		82
#define CLK_MMC1_SAMPLE		83
#define CLK_MMC1_OUTPUT		84
#define CLK_MMC2		85
#define CLK_MMC2_SAMPLE		86
#define CLK_MMC2_OUTPUT		87
#define CLK_MMC3		88
#define CLK_MMC3_SAMPLE		89
#define CLK_MMC3_OUTPUT		90
#define CLK_TS			91
#define CLK_SS			92
#define CLK_SPI0		93
#define CLK_SPI1		94
#define CLK_SPI2		95
#define CLK_SPI3		96
#define CLK_DAUDIO0		97
#define CLK_DAUDIO1		98
#define CLK_SPDIF		99
#define CLK_USB_PHY0		100
#define CLK_USB_PHY1		101
#define CLK_USB_PHY2		102
#define CLK_USB_OHCI0		103
#define CLK_USB_OHCI1		104
#define CLK_USB_OHCI2		105

#define CLK_DRAM_VE		110
#define CLK_DRAM_CSI_ISP	111
#define CLK_DRAM_TS		112
#define CLK_DRAM_DRC0		113
#define CLK_DRAM_DRC1		114
#define CLK_DRAM_DEU0		115
#define CLK_DRAM_DEU1		116
#define CLK_DRAM_FE0		117
#define CLK_DRAM_FE1		118
#define CLK_DRAM_BE0		119
#define CLK_DRAM_BE1		120
#define CLK_DRAM_MP		121

#define CLK_BE0			122
#define CLK_BE1			123
#define CLK_FE0			124
#define CLK_FE1			125
#define CLK_MP			126
#define CLK_LCD0_CH0		127
#define CLK_LCD1_CH0		128
#define CLK_LCD0_CH1		129
#define CLK_LCD1_CH1		130
#define CLK_CSI0_SCLK		131
#define CLK_CSI0_MCLK		132
#define CLK_CSI1_MCLK		133
#define CLK_VE			134
#define CLK_CODEC		135
#define CLK_AVS			136
#define CLK_DIGITAL_MIC		137
#define CLK_HDMI		138
#define CLK_HDMI_DDC		139
#define CLK_PS			140

#define CLK_MIPI_DSI		143
#define CLK_MIPI_DSI_DPHY	144
#define CLK_MIPI_CSI_DPHY	145
#define CLK_IEP_DRC0		146
#define CLK_IEP_DRC1		147
#define CLK_IEP_DEU0		148
#define CLK_IEP_DEU1		149
#define CLK_GPU_CORE		150
#define CLK_GPU_MEMORY		151
#define CLK_GPU_HYD		152
#define CLK_ATS			153
#define CLK_TRACE		154

#define CLK_OUT_A		155
#define CLK_OUT_B		156
#define CLK_OUT_C		157

#endif /* _DT_BINDINGS_CLK_SUN6I_A31_H_ */
Commit	Line	Data
c6e6c96d CYT	1	/*
	2	* Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
	3	*
	4	* This file is dual-licensed: you can use it either under the terms
	5	* of the GPL or the X11 license, at your option. Note that this dual
	6	* licensing only applies to this file, and not this project as a
	7	* whole.
	8	*
	9	* a) This file is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation; either version 2 of the
	12	* License, or (at your option) any later version.
	13	*
	14	* This file is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* Or, alternatively,
	20	*
	21	* b) Permission is hereby granted, free of charge, to any person
	22	* obtaining a copy of this software and associated documentation
	23	* files (the "Software"), to deal in the Software without
	24	* restriction, including without limitation the rights to use,
	25	* copy, modify, merge, publish, distribute, sublicense, and/or
	26	* sell copies of the Software, and to permit persons to whom the
	27	* Software is furnished to do so, subject to the following
	28	* conditions:
	29	*
	30	* The above copyright notice and this permission notice shall be
	31	* included in all copies or substantial portions of the Software.
	32	*
	33	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	34	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	35	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	36	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	37	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	38	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	39	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	40	* OTHER DEALINGS IN THE SOFTWARE.
	41	*/
	42
	43	#ifndef _DT_BINDINGS_CLK_SUN6I_A31_H_
	44	#define _DT_BINDINGS_CLK_SUN6I_A31_H_
	45
80815004 CYT	46	#define CLK_PLL_VIDEO0_2X 7
80815004 CYT	47
c6e6c96d CYT	48	#define CLK_PLL_PERIPH 10
c6e6c96d CYT	49
80815004 CYT	50	#define CLK_PLL_VIDEO1_2X 13
80815004 CYT	51
c6e6c96d CYT	52	#define CLK_CPU 18
	53
	54	#define CLK_AHB1_MIPIDSI 23
	55	#define CLK_AHB1_SS 24
	56	#define CLK_AHB1_DMA 25
	57	#define CLK_AHB1_MMC0 26
	58	#define CLK_AHB1_MMC1 27
	59	#define CLK_AHB1_MMC2 28
	60	#define CLK_AHB1_MMC3 29
	61	#define CLK_AHB1_NAND1 30
	62	#define CLK_AHB1_NAND0 31
	63	#define CLK_AHB1_SDRAM 32
	64	#define CLK_AHB1_EMAC 33
	65	#define CLK_AHB1_TS 34
	66	#define CLK_AHB1_HSTIMER 35
	67	#define CLK_AHB1_SPI0 36
	68	#define CLK_AHB1_SPI1 37
	69	#define CLK_AHB1_SPI2 38
	70	#define CLK_AHB1_SPI3 39
	71	#define CLK_AHB1_OTG 40
	72	#define CLK_AHB1_EHCI0 41
	73	#define CLK_AHB1_EHCI1 42
	74	#define CLK_AHB1_OHCI0 43
	75	#define CLK_AHB1_OHCI1 44
	76	#define CLK_AHB1_OHCI2 45
	77	#define CLK_AHB1_VE 46
	78	#define CLK_AHB1_LCD0 47
	79	#define CLK_AHB1_LCD1 48
	80	#define CLK_AHB1_CSI 49
	81	#define CLK_AHB1_HDMI 50
	82	#define CLK_AHB1_BE0 51
	83	#define CLK_AHB1_BE1 52
	84	#define CLK_AHB1_FE0 53
	85	#define CLK_AHB1_FE1 54
	86	#define CLK_AHB1_MP 55
	87	#define CLK_AHB1_GPU 56
	88	#define CLK_AHB1_DEU0 57
	89	#define CLK_AHB1_DEU1 58
	90	#define CLK_AHB1_DRC0 59
	91	#define CLK_AHB1_DRC1 60
	92
	93	#define CLK_APB1_CODEC 61
	94	#define CLK_APB1_SPDIF 62
	95	#define CLK_APB1_DIGITAL_MIC 63
	96	#define CLK_APB1_PIO 64
	97	#define CLK_APB1_DAUDIO0 65
	98	#define CLK_APB1_DAUDIO1 66
	99
	100	#define CLK_APB2_I2C0 67
	101	#define CLK_APB2_I2C1 68
	102	#define CLK_APB2_I2C2 69
	103	#define CLK_APB2_I2C3 70
	104	#define CLK_APB2_UART0 71
	105	#define CLK_APB2_UART1 72
	106	#define CLK_APB2_UART2 73
	107	#define CLK_APB2_UART3 74
	108	#define CLK_APB2_UART4 75
	109	#define CLK_APB2_UART5 76
	110
	111	#define CLK_NAND0 77
	112	#define CLK_NAND1 78
	113	#define CLK_MMC0 79
	114	#define CLK_MMC0_SAMPLE 80
	115	#define CLK_MMC0_OUTPUT 81
116	#define CLK_MMC1 82
117	#define CLK_MMC1_SAMPLE 83
118	#define CLK_MMC1_OUTPUT 84
119	#define CLK_MMC2 85
120	#define CLK_MMC2_SAMPLE 86
121	#define CLK_MMC2_OUTPUT 87
122	#define CLK_MMC3 88
123	#define CLK_MMC3_SAMPLE 89
124	#define CLK_MMC3_OUTPUT 90
125	#define CLK_TS 91
126	#define CLK_SS 92
127	#define CLK_SPI0 93
128	#define CLK_SPI1 94
129	#define CLK_SPI2 95
130	#define CLK_SPI3 96
131	#define CLK_DAUDIO0 97
132	#define CLK_DAUDIO1 98
133	#define CLK_SPDIF 99
134	#define CLK_USB_PHY0 100
135	#define CLK_USB_PHY1 101
136	#define CLK_USB_PHY2 102
137	#define CLK_USB_OHCI0 103
138	#define CLK_USB_OHCI1 104
139	#define CLK_USB_OHCI2 105
140
141	#define CLK_DRAM_VE 110
142	#define CLK_DRAM_CSI_ISP 111
143	#define CLK_DRAM_TS 112
144	#define CLK_DRAM_DRC0 113
145	#define CLK_DRAM_DRC1 114
146	#define CLK_DRAM_DEU0 115
147	#define CLK_DRAM_DEU1 116
148	#define CLK_DRAM_FE0 117
149	#define CLK_DRAM_FE1 118
150	#define CLK_DRAM_BE0 119
151	#define CLK_DRAM_BE1 120
152	#define CLK_DRAM_MP 121
153
154	#define CLK_BE0 122
155	#define CLK_BE1 123
156	#define CLK_FE0 124
157	#define CLK_FE1 125
158	#define CLK_MP 126
159	#define CLK_LCD0_CH0 127
160	#define CLK_LCD1_CH0 128
161	#define CLK_LCD0_CH1 129
162	#define CLK_LCD1_CH1 130
163	#define CLK_CSI0_SCLK 131
164	#define CLK_CSI0_MCLK 132
165	#define CLK_CSI1_MCLK 133
166	#define CLK_VE 134
167	#define CLK_CODEC 135
168	#define CLK_AVS 136
169	#define CLK_DIGITAL_MIC 137
170	#define CLK_HDMI 138
171	#define CLK_HDMI_DDC 139
172	#define CLK_PS 140
173
174	#define CLK_MIPI_DSI 143
175	#define CLK_MIPI_DSI_DPHY 144
176	#define CLK_MIPI_CSI_DPHY 145
177	#define CLK_IEP_DRC0 146
178	#define CLK_IEP_DRC1 147
179	#define CLK_IEP_DEU0 148
180	#define CLK_IEP_DEU1 149
181	#define CLK_GPU_CORE 150
182	#define CLK_GPU_MEMORY 151
183	#define CLK_GPU_HYD 152
184	#define CLK_ATS 153
185	#define CLK_TRACE 154
186
187	#define CLK_OUT_A 155
188	#define CLK_OUT_B 156
189	#define CLK_OUT_C 157
190
191	#endif /* _DT_BINDINGS_CLK_SUN6I_A31_H_ */