[mirror_ubuntu-bionic-kernel.git] / include / dt-bindings / mfd / stm32f4-rcc.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * This header provides constants for the STM32F4 RCC IP
 */

#ifndef _DT_BINDINGS_MFD_STM32F4_RCC_H
#define _DT_BINDINGS_MFD_STM32F4_RCC_H

/* AHB1 */
#define STM32F4_RCC_AHB1_GPIOA	0
#define STM32F4_RCC_AHB1_GPIOB	1
#define STM32F4_RCC_AHB1_GPIOC	2
#define STM32F4_RCC_AHB1_GPIOD	3
#define STM32F4_RCC_AHB1_GPIOE	4
#define STM32F4_RCC_AHB1_GPIOF	5
#define STM32F4_RCC_AHB1_GPIOG	6
#define STM32F4_RCC_AHB1_GPIOH	7
#define STM32F4_RCC_AHB1_GPIOI	8
#define STM32F4_RCC_AHB1_GPIOJ	9
#define STM32F4_RCC_AHB1_GPIOK	10
#define STM32F4_RCC_AHB1_CRC	12
#define STM32F4_RCC_AHB1_BKPSRAM	18
#define STM32F4_RCC_AHB1_CCMDATARAM	20
#define STM32F4_RCC_AHB1_DMA1	21
#define STM32F4_RCC_AHB1_DMA2	22
#define STM32F4_RCC_AHB1_DMA2D	23
#define STM32F4_RCC_AHB1_ETHMAC	25
#define STM32F4_RCC_AHB1_ETHMACTX	26
#define STM32F4_RCC_AHB1_ETHMACRX	27
#define STM32F4_RCC_AHB1_ETHMACPTP	28
#define STM32F4_RCC_AHB1_OTGHS		29
#define STM32F4_RCC_AHB1_OTGHSULPI	30

#define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8))
#define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit)


/* AHB2 */
#define STM32F4_RCC_AHB2_DCMI	0
#define STM32F4_RCC_AHB2_CRYP	4
#define STM32F4_RCC_AHB2_HASH	5
#define STM32F4_RCC_AHB2_RNG	6
#define STM32F4_RCC_AHB2_OTGFS	7

#define STM32F4_AHB2_RESET(bit)	(STM32F4_RCC_AHB2_##bit + (0x14 * 8))
#define STM32F4_AHB2_CLOCK(bit)	(STM32F4_RCC_AHB2_##bit + 0x20)

/* AHB3 */
#define STM32F4_RCC_AHB3_FMC	0
#define STM32F4_RCC_AHB3_QSPI	1

#define STM32F4_AHB3_RESET(bit)	(STM32F4_RCC_AHB3_##bit + (0x18 * 8))
#define STM32F4_AHB3_CLOCK(bit)	(STM32F4_RCC_AHB3_##bit + 0x40)

/* APB1 */
#define STM32F4_RCC_APB1_TIM2	0
#define STM32F4_RCC_APB1_TIM3	1
#define STM32F4_RCC_APB1_TIM4	2
#define STM32F4_RCC_APB1_TIM5	3
#define STM32F4_RCC_APB1_TIM6	4
#define STM32F4_RCC_APB1_TIM7	5
#define STM32F4_RCC_APB1_TIM12	6
#define STM32F4_RCC_APB1_TIM13	7
#define STM32F4_RCC_APB1_TIM14	8
#define STM32F4_RCC_APB1_WWDG	11
#define STM32F4_RCC_APB1_SPI2	14
#define STM32F4_RCC_APB1_SPI3	15
#define STM32F4_RCC_APB1_UART2	17
#define STM32F4_RCC_APB1_UART3	18
#define STM32F4_RCC_APB1_UART4	19
#define STM32F4_RCC_APB1_UART5	20
#define STM32F4_RCC_APB1_I2C1	21
#define STM32F4_RCC_APB1_I2C2	22
#define STM32F4_RCC_APB1_I2C3	23
#define STM32F4_RCC_APB1_CAN1	25
#define STM32F4_RCC_APB1_CAN2	26
#define STM32F4_RCC_APB1_PWR	28
#define STM32F4_RCC_APB1_DAC	29
#define STM32F4_RCC_APB1_UART7	30
#define STM32F4_RCC_APB1_UART8	31

#define STM32F4_APB1_RESET(bit)	(STM32F4_RCC_APB1_##bit + (0x20 * 8))
#define STM32F4_APB1_CLOCK(bit)	(STM32F4_RCC_APB1_##bit + 0x80)

/* APB2 */
#define STM32F4_RCC_APB2_TIM1	0
#define STM32F4_RCC_APB2_TIM8	1
#define STM32F4_RCC_APB2_USART1	4
#define STM32F4_RCC_APB2_USART6	5
#define STM32F4_RCC_APB2_ADC1	8
#define STM32F4_RCC_APB2_ADC2	9
#define STM32F4_RCC_APB2_ADC3	10
#define STM32F4_RCC_APB2_SDIO	11
#define STM32F4_RCC_APB2_SPI1	12
#define STM32F4_RCC_APB2_SPI4	13
#define STM32F4_RCC_APB2_SYSCFG	14
#define STM32F4_RCC_APB2_TIM9	16
#define STM32F4_RCC_APB2_TIM10	17
#define STM32F4_RCC_APB2_TIM11	18
#define STM32F4_RCC_APB2_SPI5	20
#define STM32F4_RCC_APB2_SPI6	21
#define STM32F4_RCC_APB2_SAI1	22
#define STM32F4_RCC_APB2_LTDC	26
#define STM32F4_RCC_APB2_DSI	27

#define STM32F4_APB2_RESET(bit)	(STM32F4_RCC_APB2_##bit + (0x24 * 8))
#define STM32F4_APB2_CLOCK(bit)	(STM32F4_RCC_APB2_##bit + 0xA0)

#endif /* _DT_BINDINGS_MFD_STM32F4_RCC_H */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
ca9f71f0 MC	2	/*
	3	* This header provides constants for the STM32F4 RCC IP
	4	*/
	5
	6	#ifndef _DT_BINDINGS_MFD_STM32F4_RCC_H
	7	#define _DT_BINDINGS_MFD_STM32F4_RCC_H
	8
	9	/* AHB1 */
	10	#define STM32F4_RCC_AHB1_GPIOA 0
	11	#define STM32F4_RCC_AHB1_GPIOB 1
	12	#define STM32F4_RCC_AHB1_GPIOC 2
	13	#define STM32F4_RCC_AHB1_GPIOD 3
	14	#define STM32F4_RCC_AHB1_GPIOE 4
	15	#define STM32F4_RCC_AHB1_GPIOF 5
	16	#define STM32F4_RCC_AHB1_GPIOG 6
	17	#define STM32F4_RCC_AHB1_GPIOH 7
	18	#define STM32F4_RCC_AHB1_GPIOI 8
	19	#define STM32F4_RCC_AHB1_GPIOJ 9
	20	#define STM32F4_RCC_AHB1_GPIOK 10
	21	#define STM32F4_RCC_AHB1_CRC 12
2cfb397b GF	22	#define STM32F4_RCC_AHB1_BKPSRAM 18
2cfb397b GF	23	#define STM32F4_RCC_AHB1_CCMDATARAM 20
ca9f71f0 MC	24	#define STM32F4_RCC_AHB1_DMA1 21
	25	#define STM32F4_RCC_AHB1_DMA2 22
	26	#define STM32F4_RCC_AHB1_DMA2D 23
	27	#define STM32F4_RCC_AHB1_ETHMAC 25
2cfb397b GF	28	#define STM32F4_RCC_AHB1_ETHMACTX 26
	29	#define STM32F4_RCC_AHB1_ETHMACRX 27
	30	#define STM32F4_RCC_AHB1_ETHMACPTP 28
	31	#define STM32F4_RCC_AHB1_OTGHS 29
	32	#define STM32F4_RCC_AHB1_OTGHSULPI 30
ca9f71f0 MC	33
ca9f71f0 MC	34	#define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8))
982b1592	35	#define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit)
ca9f71f0 MC	36
	37
	38	/* AHB2 */
	39	#define STM32F4_RCC_AHB2_DCMI 0
	40	#define STM32F4_RCC_AHB2_CRYP 4
	41	#define STM32F4_RCC_AHB2_HASH 5
	42	#define STM32F4_RCC_AHB2_RNG 6
	43	#define STM32F4_RCC_AHB2_OTGFS 7
	44
	45	#define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8))
982b1592	46	#define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20)
ca9f71f0 MC	47
	48	/* AHB3 */
	49	#define STM32F4_RCC_AHB3_FMC 0
2cfb397b	50	#define STM32F4_RCC_AHB3_QSPI 1
ca9f71f0 MC	51
ca9f71f0 MC	52	#define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8))
982b1592	53	#define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40)
ca9f71f0 MC	54
	55	/* APB1 */
	56	#define STM32F4_RCC_APB1_TIM2 0
	57	#define STM32F4_RCC_APB1_TIM3 1
	58	#define STM32F4_RCC_APB1_TIM4 2
	59	#define STM32F4_RCC_APB1_TIM5 3
	60	#define STM32F4_RCC_APB1_TIM6 4
	61	#define STM32F4_RCC_APB1_TIM7 5
	62	#define STM32F4_RCC_APB1_TIM12 6
	63	#define STM32F4_RCC_APB1_TIM13 7
	64	#define STM32F4_RCC_APB1_TIM14 8
	65	#define STM32F4_RCC_APB1_WWDG 11
	66	#define STM32F4_RCC_APB1_SPI2 14
	67	#define STM32F4_RCC_APB1_SPI3 15
	68	#define STM32F4_RCC_APB1_UART2 17
	69	#define STM32F4_RCC_APB1_UART3 18
	70	#define STM32F4_RCC_APB1_UART4 19
	71	#define STM32F4_RCC_APB1_UART5 20
	72	#define STM32F4_RCC_APB1_I2C1 21
	73	#define STM32F4_RCC_APB1_I2C2 22
	74	#define STM32F4_RCC_APB1_I2C3 23
	75	#define STM32F4_RCC_APB1_CAN1 25
	76	#define STM32F4_RCC_APB1_CAN2 26
	77	#define STM32F4_RCC_APB1_PWR 28
	78	#define STM32F4_RCC_APB1_DAC 29
	79	#define STM32F4_RCC_APB1_UART7 30
	80	#define STM32F4_RCC_APB1_UART8 31
	81
	82	#define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8))
982b1592	83	#define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80)
ca9f71f0 MC	84
	85	/* APB2 */
	86	#define STM32F4_RCC_APB2_TIM1 0
	87	#define STM32F4_RCC_APB2_TIM8 1
	88	#define STM32F4_RCC_APB2_USART1 4
	89	#define STM32F4_RCC_APB2_USART6 5
2cfb397b GF	90	#define STM32F4_RCC_APB2_ADC1 8
	91	#define STM32F4_RCC_APB2_ADC2 9
	92	#define STM32F4_RCC_APB2_ADC3 10
ca9f71f0 MC	93	#define STM32F4_RCC_APB2_SDIO 11
	94	#define STM32F4_RCC_APB2_SPI1 12
	95	#define STM32F4_RCC_APB2_SPI4 13
	96	#define STM32F4_RCC_APB2_SYSCFG 14
	97	#define STM32F4_RCC_APB2_TIM9 16
	98	#define STM32F4_RCC_APB2_TIM10 17
	99	#define STM32F4_RCC_APB2_TIM11 18
	100	#define STM32F4_RCC_APB2_SPI5 20
	101	#define STM32F4_RCC_APB2_SPI6 21
	102	#define STM32F4_RCC_APB2_SAI1 22
	103	#define STM32F4_RCC_APB2_LTDC 26
2cfb397b	104	#define STM32F4_RCC_APB2_DSI 27
ca9f71f0 MC	105
ca9f71f0 MC	106	#define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8))
982b1592	107	#define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0)
ca9f71f0 MC	108
ca9f71f0 MC	109	#endif /* _DT_BINDINGS_MFD_STM32F4_RCC_H */