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1 | /* |
2 | * Copyright Intel Corporation (C) 2017. All Rights Reserved | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License along with | |
14 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
15 | * | |
16 | * Reset binding definitions for Altera Arria10 MAX5 System Resource Chip | |
17 | * | |
18 | * Adapted from altr,rst-mgr-a10.h | |
19 | */ | |
20 | ||
21 | #ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H | |
22 | #define _DT_BINDINGS_RESET_ALTR_RST_MGR_A10SR_H | |
23 | ||
24 | /* Peripheral PHY resets */ | |
25 | #define A10SR_RESET_ENET_HPS 0 | |
26 | #define A10SR_RESET_PCIE 1 | |
27 | #define A10SR_RESET_FILE 2 | |
28 | #define A10SR_RESET_BQSPI 3 | |
29 | #define A10SR_RESET_USB 4 | |
30 | ||
31 | #define A10SR_RESET_NUM 5 | |
32 | ||
33 | #endif |