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1ad2134f 1#ifndef CPU_COMMON_H
175de524 2#define CPU_COMMON_H
1ad2134f 3
07f35073 4/* CPU interfaces that are target independent. */
1ad2134f 5
ce927ed9 6#ifndef CONFIG_USER_ONLY
022c62cb 7#include "exec/hwaddr.h"
ce927ed9 8#endif
37b76cfd 9
0ac20318 10/* The CPU list lock nests outside page_(un)lock or mmap_(un)lock */
267f685b
PB
11void qemu_init_cpu_list(void);
12void cpu_list_lock(void);
13void cpu_list_unlock(void);
14
2cd53943
TH
15void tcg_flush_softmmu_tlb(CPUState *cs);
16
d9f24bf5
PB
17void tcg_iommu_init_notifier_list(CPUState *cpu);
18void tcg_iommu_free_notifier_list(CPUState *cpu);
19
b3755a91
PB
20#if !defined(CONFIG_USER_ONLY)
21
dd310534
AG
22enum device_endian {
23 DEVICE_NATIVE_ENDIAN,
24 DEVICE_BIG_ENDIAN,
25 DEVICE_LITTLE_ENDIAN,
26};
27
c99a29e7
YX
28#if defined(HOST_WORDS_BIGENDIAN)
29#define DEVICE_HOST_ENDIAN DEVICE_BIG_ENDIAN
30#else
31#define DEVICE_HOST_ENDIAN DEVICE_LITTLE_ENDIAN
32#endif
33
1ad2134f 34/* address in the RAM (different from a physical address) */
4be403c8 35#if defined(CONFIG_XEN_BACKEND)
f15fbc4b
AP
36typedef uint64_t ram_addr_t;
37# define RAM_ADDR_MAX UINT64_MAX
38# define RAM_ADDR_FMT "%" PRIx64
39#else
53576999
SW
40typedef uintptr_t ram_addr_t;
41# define RAM_ADDR_MAX UINTPTR_MAX
42# define RAM_ADDR_FMT "%" PRIxPTR
f15fbc4b 43#endif
1ad2134f
PB
44
45/* memory API */
46
cd19cfa2 47void qemu_ram_remap(ram_addr_t addr, ram_addr_t length);
1ad2134f 48/* This should not be used by devices. */
07bdaa41 49ram_addr_t qemu_ram_addr_from_host(void *ptr);
e3dd7493 50RAMBlock *qemu_ram_block_by_name(const char *name);
422148d3 51RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset,
f615f396 52 ram_addr_t *offset);
f90bb71b 53ram_addr_t qemu_ram_block_host_offset(RAMBlock *rb, void *host);
fa53a0e5
GA
54void qemu_ram_set_idstr(RAMBlock *block, const char *name, DeviceState *dev);
55void qemu_ram_unset_idstr(RAMBlock *block);
422148d3 56const char *qemu_ram_get_idstr(RAMBlock *rb);
754cb9c0
YK
57void *qemu_ram_get_host_addr(RAMBlock *rb);
58ram_addr_t qemu_ram_get_offset(RAMBlock *rb);
59ram_addr_t qemu_ram_get_used_length(RAMBlock *rb);
082851a3 60ram_addr_t qemu_ram_get_max_length(RAMBlock *rb);
463a4ac2 61bool qemu_ram_is_shared(RAMBlock *rb);
8dbe22c6 62bool qemu_ram_is_noreserve(RAMBlock *rb);
2ce16640
DDAG
63bool qemu_ram_is_uf_zeroable(RAMBlock *rb);
64void qemu_ram_set_uf_zeroable(RAMBlock *rb);
b895de50
CLG
65bool qemu_ram_is_migratable(RAMBlock *rb);
66void qemu_ram_set_migratable(RAMBlock *rb);
67void qemu_ram_unset_migratable(RAMBlock *rb);
2ce16640 68
863e9621 69size_t qemu_ram_pagesize(RAMBlock *block);
67f11b5c 70size_t qemu_ram_pagesize_largest(void);
1ad2134f 71
d7ef71ef 72void cpu_physical_memory_rw(hwaddr addr, void *buf,
28c80bfe 73 hwaddr len, bool is_write);
a8170e5e 74static inline void cpu_physical_memory_read(hwaddr addr,
0c249ff7 75 void *buf, hwaddr len)
1ad2134f 76{
85eb7c18 77 cpu_physical_memory_rw(addr, buf, len, false);
1ad2134f 78}
a8170e5e 79static inline void cpu_physical_memory_write(hwaddr addr,
0c249ff7 80 const void *buf, hwaddr len)
1ad2134f 81{
85eb7c18 82 cpu_physical_memory_rw(addr, (void *)buf, len, true);
1ad2134f 83}
a8170e5e
AK
84void *cpu_physical_memory_map(hwaddr addr,
85 hwaddr *plen,
28c80bfe 86 bool is_write);
a8170e5e 87void cpu_physical_memory_unmap(void *buffer, hwaddr len,
28c80bfe 88 bool is_write, hwaddr access_len);
e95205e1
FZ
89void cpu_register_map_client(QEMUBH *bh);
90void cpu_unregister_map_client(QEMUBH *bh);
1ad2134f 91
a8170e5e 92bool cpu_physical_memory_is_io(hwaddr phys_addr);
76f35538 93
6842a08e
BS
94/* Coalesced MMIO regions are areas where write operations can be reordered.
95 * This usually implies that write operations are side-effect free. This allows
96 * batching which can make a major impact on performance when using
97 * virtualization.
98 */
6842a08e
BS
99void qemu_flush_coalesced_mmio_buffer(void);
100
0c249ff7 101void cpu_flush_icache_range(hwaddr start, hwaddr len);
1ad2134f 102
754cb9c0 103typedef int (RAMBlockIterFunc)(RAMBlock *rb, void *opaque);
bd2fa51f 104
e3807054 105int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque);
d3a5038c 106int ram_block_discard_range(RAMBlock *rb, uint64_t start, size_t length);
bd2fa51f 107
b3755a91
PB
108#endif
109
c5e3c918
PB
110/* vl.c */
111extern int singlestep;
112
175de524 113#endif /* CPU_COMMON_H */