]>
Commit | Line | Data |
---|---|---|
5fafdf24 | 1 | /* |
6b3a45cc PB |
2 | * Helper routines to provide target memory access for semihosting |
3 | * syscalls in system emulation mode. | |
4 | * | |
5 | * Copyright (c) 2007 CodeSourcery. | |
6 | * | |
8e31bf38 | 7 | * This code is licensed under the GPL |
6b3a45cc | 8 | */ |
175de524 | 9 | |
cb9c377f | 10 | #ifndef SOFTMMU_SEMI_H |
175de524 | 11 | #define SOFTMMU_SEMI_H |
6b3a45cc | 12 | |
ec150c7e MA |
13 | #include "cpu.h" |
14 | ||
44d4a499 PM |
15 | static inline uint64_t softmmu_tget64(CPUArchState *env, target_ulong addr) |
16 | { | |
17 | uint64_t val; | |
18 | ||
29a0af61 | 19 | cpu_memory_rw_debug(env_cpu(env), addr, (uint8_t *)&val, 8, 0); |
44d4a499 PM |
20 | return tswap64(val); |
21 | } | |
22 | ||
9f6f7ca1 | 23 | static inline uint32_t softmmu_tget32(CPUArchState *env, target_ulong addr) |
6b3a45cc PB |
24 | { |
25 | uint32_t val; | |
26 | ||
29a0af61 | 27 | cpu_memory_rw_debug(env_cpu(env), addr, (uint8_t *)&val, 4, 0); |
6b3a45cc PB |
28 | return tswap32(val); |
29 | } | |
44d4a499 | 30 | |
9f6f7ca1 | 31 | static inline uint32_t softmmu_tget8(CPUArchState *env, target_ulong addr) |
6b3a45cc PB |
32 | { |
33 | uint8_t val; | |
34 | ||
29a0af61 | 35 | cpu_memory_rw_debug(env_cpu(env), addr, &val, 1, 0); |
6b3a45cc PB |
36 | return val; |
37 | } | |
2f619698 | 38 | |
44d4a499 | 39 | #define get_user_u64(arg, p) ({ arg = softmmu_tget64(env, p); 0; }) |
2f619698 FB |
40 | #define get_user_u32(arg, p) ({ arg = softmmu_tget32(env, p) ; 0; }) |
41 | #define get_user_u8(arg, p) ({ arg = softmmu_tget8(env, p) ; 0; }) | |
42 | #define get_user_ual(arg, p) get_user_u32(arg, p) | |
6b3a45cc | 43 | |
44d4a499 PM |
44 | static inline void softmmu_tput64(CPUArchState *env, |
45 | target_ulong addr, uint64_t val) | |
46 | { | |
47 | val = tswap64(val); | |
29a0af61 | 48 | cpu_memory_rw_debug(env_cpu(env), addr, (uint8_t *)&val, 8, 1); |
44d4a499 PM |
49 | } |
50 | ||
9f6f7ca1 MR |
51 | static inline void softmmu_tput32(CPUArchState *env, |
52 | target_ulong addr, uint32_t val) | |
6b3a45cc PB |
53 | { |
54 | val = tswap32(val); | |
29a0af61 | 55 | cpu_memory_rw_debug(env_cpu(env), addr, (uint8_t *)&val, 4, 1); |
6b3a45cc | 56 | } |
44d4a499 | 57 | #define put_user_u64(arg, p) ({ softmmu_tput64(env, p, arg) ; 0; }) |
2f619698 FB |
58 | #define put_user_u32(arg, p) ({ softmmu_tput32(env, p, arg) ; 0; }) |
59 | #define put_user_ual(arg, p) put_user_u32(arg, p) | |
6b3a45cc | 60 | |
9f6f7ca1 MR |
61 | static void *softmmu_lock_user(CPUArchState *env, |
62 | target_ulong addr, target_ulong len, int copy) | |
6b3a45cc | 63 | { |
b55266b5 | 64 | uint8_t *p; |
6b3a45cc PB |
65 | /* TODO: Make this something that isn't fixed size. */ |
66 | p = malloc(len); | |
f17ec444 | 67 | if (p && copy) { |
29a0af61 | 68 | cpu_memory_rw_debug(env_cpu(env), addr, p, len, 0); |
f17ec444 | 69 | } |
6b3a45cc PB |
70 | return p; |
71 | } | |
579a97f7 | 72 | #define lock_user(type, p, len, copy) softmmu_lock_user(env, p, len, copy) |
9f6f7ca1 | 73 | static char *softmmu_lock_user_string(CPUArchState *env, target_ulong addr) |
6b3a45cc PB |
74 | { |
75 | char *p; | |
76 | char *s; | |
77 | uint8_t c; | |
78 | /* TODO: Make this something that isn't fixed size. */ | |
79 | s = p = malloc(1024); | |
15d9e3bc JM |
80 | if (!s) { |
81 | return NULL; | |
82 | } | |
6b3a45cc | 83 | do { |
29a0af61 | 84 | cpu_memory_rw_debug(env_cpu(env), addr, &c, 1, 0); |
6b3a45cc PB |
85 | addr++; |
86 | *(p++) = c; | |
87 | } while (c); | |
88 | return s; | |
89 | } | |
90 | #define lock_user_string(p) softmmu_lock_user_string(env, p) | |
9349b4f9 | 91 | static void softmmu_unlock_user(CPUArchState *env, void *p, target_ulong addr, |
6b3a45cc PB |
92 | target_ulong len) |
93 | { | |
f17ec444 | 94 | if (len) { |
29a0af61 | 95 | cpu_memory_rw_debug(env_cpu(env), addr, p, len, 1); |
f17ec444 | 96 | } |
6b3a45cc PB |
97 | free(p); |
98 | } | |
99 | #define unlock_user(s, args, len) softmmu_unlock_user(env, s, args, len) | |
cb9c377f PB |
100 | |
101 | #endif |