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990b150e IY |
1 | #ifndef QEMU_HW_ACPI_H |
2 | #define QEMU_HW_ACPI_H | |
3 | /* | |
4 | * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp> | |
5 | * VA Linux Systems Japan K.K. | |
6 | * | |
7 | * This library is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU Lesser General Public | |
9 | * License as published by the Free Software Foundation; either | |
10 | * version 2 of the License, or (at your option) any later version. | |
11 | * | |
12 | * This library is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
15 | * Lesser General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU Lesser General Public | |
1012e960 BS |
18 | * License along with this library; if not, see |
19 | * <http://www.gnu.org/licenses/>. | |
990b150e IY |
20 | */ |
21 | ||
e53339cf MT |
22 | #include "qemu/notify.h" |
23 | #include "qemu/option.h" | |
24 | #include "exec/memory.h" | |
c24d5e0b | 25 | #include "hw/irq.h" |
eaf23bf7 | 26 | #include "hw/acpi/acpi_dev_interface.h" |
e53339cf | 27 | |
a0cc8856 | 28 | /* |
b4acfbcd | 29 | * current device naming scheme supports up to 256 memory devices |
a0cc8856 IM |
30 | */ |
31 | #define ACPI_MAX_RAM_SLOTS 256 | |
32 | ||
990b150e IY |
33 | /* from linux include/acpi/actype.h */ |
34 | /* Default ACPI register widths */ | |
35 | ||
36 | #define ACPI_GPE_REGISTER_WIDTH 8 | |
37 | #define ACPI_PM1_REGISTER_WIDTH 16 | |
38 | #define ACPI_PM2_REGISTER_WIDTH 8 | |
39 | #define ACPI_PM_TIMER_WIDTH 32 | |
40 | ||
41 | /* PM Timer ticks per second (HZ) */ | |
42 | #define PM_TIMER_FREQUENCY 3579545 | |
43 | ||
44 | ||
45 | /* ACPI fixed hardware registers */ | |
46 | ||
47 | /* from linux/drivers/acpi/acpica/aclocal.h */ | |
48 | /* Masks used to access the bit_registers */ | |
49 | ||
50 | /* PM1x_STS */ | |
51 | #define ACPI_BITMASK_TIMER_STATUS 0x0001 | |
52 | #define ACPI_BITMASK_BUS_MASTER_STATUS 0x0010 | |
53 | #define ACPI_BITMASK_GLOBAL_LOCK_STATUS 0x0020 | |
54 | #define ACPI_BITMASK_POWER_BUTTON_STATUS 0x0100 | |
55 | #define ACPI_BITMASK_SLEEP_BUTTON_STATUS 0x0200 | |
56 | #define ACPI_BITMASK_RT_CLOCK_STATUS 0x0400 | |
57 | #define ACPI_BITMASK_PCIEXP_WAKE_STATUS 0x4000 /* ACPI 3.0 */ | |
58 | #define ACPI_BITMASK_WAKE_STATUS 0x8000 | |
59 | ||
60 | #define ACPI_BITMASK_ALL_FIXED_STATUS (\ | |
61 | ACPI_BITMASK_TIMER_STATUS | \ | |
62 | ACPI_BITMASK_BUS_MASTER_STATUS | \ | |
63 | ACPI_BITMASK_GLOBAL_LOCK_STATUS | \ | |
64 | ACPI_BITMASK_POWER_BUTTON_STATUS | \ | |
65 | ACPI_BITMASK_SLEEP_BUTTON_STATUS | \ | |
66 | ACPI_BITMASK_RT_CLOCK_STATUS | \ | |
67 | ACPI_BITMASK_WAKE_STATUS) | |
68 | ||
69 | /* PM1x_EN */ | |
70 | #define ACPI_BITMASK_TIMER_ENABLE 0x0001 | |
71 | #define ACPI_BITMASK_GLOBAL_LOCK_ENABLE 0x0020 | |
72 | #define ACPI_BITMASK_POWER_BUTTON_ENABLE 0x0100 | |
73 | #define ACPI_BITMASK_SLEEP_BUTTON_ENABLE 0x0200 | |
74 | #define ACPI_BITMASK_RT_CLOCK_ENABLE 0x0400 | |
75 | #define ACPI_BITMASK_PCIEXP_WAKE_DISABLE 0x4000 /* ACPI 3.0 */ | |
76 | ||
06313503 IM |
77 | #define ACPI_BITMASK_PM1_COMMON_ENABLED ( \ |
78 | ACPI_BITMASK_RT_CLOCK_ENABLE | \ | |
79 | ACPI_BITMASK_POWER_BUTTON_ENABLE | \ | |
80 | ACPI_BITMASK_GLOBAL_LOCK_ENABLE | \ | |
81 | ACPI_BITMASK_TIMER_ENABLE) | |
82 | ||
990b150e IY |
83 | /* PM1x_CNT */ |
84 | #define ACPI_BITMASK_SCI_ENABLE 0x0001 | |
85 | #define ACPI_BITMASK_BUS_MASTER_RLD 0x0002 | |
86 | #define ACPI_BITMASK_GLOBAL_LOCK_RELEASE 0x0004 | |
87 | #define ACPI_BITMASK_SLEEP_TYPE 0x1C00 | |
88 | #define ACPI_BITMASK_SLEEP_ENABLE 0x2000 | |
89 | ||
90 | /* PM2_CNT */ | |
91 | #define ACPI_BITMASK_ARB_DISABLE 0x0001 | |
92 | ||
067866d6 | 93 | /* structs */ |
a54d41a8 | 94 | typedef struct ACPIPMTimer ACPIPMTimer; |
067866d6 GH |
95 | typedef struct ACPIPM1EVT ACPIPM1EVT; |
96 | typedef struct ACPIPM1CNT ACPIPM1CNT; | |
97 | typedef struct ACPIGPE ACPIGPE; | |
355bf2e5 | 98 | typedef struct ACPIREGS ACPIREGS; |
a54d41a8 | 99 | |
355bf2e5 | 100 | typedef void (*acpi_update_sci_fn)(ACPIREGS *ar); |
a54d41a8 IY |
101 | |
102 | struct ACPIPMTimer { | |
103 | QEMUTimer *timer; | |
77d58b1e | 104 | MemoryRegion io; |
a54d41a8 IY |
105 | int64_t overflow_time; |
106 | ||
107 | acpi_update_sci_fn update_sci; | |
108 | }; | |
109 | ||
067866d6 | 110 | struct ACPIPM1EVT { |
b5a7c024 | 111 | MemoryRegion io; |
067866d6 GH |
112 | uint16_t sts; |
113 | uint16_t en; | |
b5a7c024 | 114 | acpi_update_sci_fn update_sci; |
067866d6 GH |
115 | }; |
116 | ||
117 | struct ACPIPM1CNT { | |
afafe4bb | 118 | MemoryRegion io; |
067866d6 | 119 | uint16_t cnt; |
afafe4bb | 120 | uint8_t s4_val; |
067866d6 GH |
121 | }; |
122 | ||
123 | struct ACPIGPE { | |
067866d6 GH |
124 | uint8_t len; |
125 | ||
126 | uint8_t *sts; | |
127 | uint8_t *en; | |
128 | }; | |
129 | ||
355bf2e5 GH |
130 | struct ACPIREGS { |
131 | ACPIPMTimer tmr; | |
132 | ACPIGPE gpe; | |
133 | struct { | |
134 | ACPIPM1EVT evt; | |
135 | ACPIPM1CNT cnt; | |
136 | } pm1; | |
da98c8eb | 137 | Notifier wakeup; |
355bf2e5 GH |
138 | }; |
139 | ||
067866d6 | 140 | /* PM_TMR */ |
355bf2e5 GH |
141 | void acpi_pm_tmr_update(ACPIREGS *ar, bool enable); |
142 | void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar); | |
77d58b1e GH |
143 | void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci, |
144 | MemoryRegion *parent); | |
355bf2e5 | 145 | void acpi_pm_tmr_reset(ACPIREGS *ar); |
a54d41a8 | 146 | |
04dc308f | 147 | /* PM1a_EVT: piix and ich9 don't implement PM1b. */ |
2886be1b | 148 | uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar); |
355bf2e5 GH |
149 | void acpi_pm1_evt_power_down(ACPIREGS *ar); |
150 | void acpi_pm1_evt_reset(ACPIREGS *ar); | |
b5a7c024 GH |
151 | void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci, |
152 | MemoryRegion *parent); | |
04dc308f | 153 | |
eaba51c5 | 154 | /* PM1a_CNT: piix and ich9 don't implement PM1b CNT. */ |
9a10bbb4 LE |
155 | void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent, |
156 | bool disable_s3, bool disable_s4, uint8_t s4_val); | |
355bf2e5 | 157 | void acpi_pm1_cnt_update(ACPIREGS *ar, |
eaba51c5 | 158 | bool sci_enable, bool sci_disable); |
355bf2e5 | 159 | void acpi_pm1_cnt_reset(ACPIREGS *ar); |
eaba51c5 | 160 | |
23910d3f | 161 | /* GPE0 */ |
355bf2e5 | 162 | void acpi_gpe_init(ACPIREGS *ar, uint8_t len); |
355bf2e5 | 163 | void acpi_gpe_reset(ACPIREGS *ar); |
23910d3f | 164 | |
355bf2e5 GH |
165 | void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val); |
166 | uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr); | |
23910d3f | 167 | |
ca9b46bc | 168 | void acpi_send_gpe_event(ACPIREGS *ar, qemu_irq irq, |
eaf23bf7 | 169 | AcpiEventStatusBits status); |
ca9b46bc | 170 | |
06313503 IM |
171 | void acpi_update_sci(ACPIREGS *acpi_regs, qemu_irq irq); |
172 | ||
0445259b MT |
173 | /* acpi.c */ |
174 | extern int acpi_enabled; | |
175 | extern char unsigned *acpi_tables; | |
176 | extern size_t acpi_tables_len; | |
177 | ||
60de1163 MT |
178 | uint8_t *acpi_table_first(void); |
179 | uint8_t *acpi_table_next(uint8_t *current); | |
180 | unsigned acpi_table_len(void *current); | |
0445259b | 181 | void acpi_table_add(const QemuOpts *opts, Error **errp); |
60de1163 | 182 | void acpi_table_add_builtin(const QemuOpts *opts, Error **errp); |
0445259b | 183 | |
88594e4f LE |
184 | typedef struct AcpiSlicOem AcpiSlicOem; |
185 | struct AcpiSlicOem { | |
186 | char *id; | |
187 | char *table_id; | |
188 | }; | |
189 | int acpi_get_slic_oem(AcpiSlicOem *oem); | |
190 | ||
990b150e | 191 | #endif /* !QEMU_HW_ACPI_H */ |