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hw/arm/allwinner: add SD/MMC host controller
[mirror_qemu.git] / include / hw / arm / allwinner-a10.h
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1#ifndef HW_ARM_ALLWINNER_A10_H
2#define HW_ARM_ALLWINNER_A10_H
9158fa54 3
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4#include "qemu/error-report.h"
5#include "hw/char/serial.h"
12ec8bd5 6#include "hw/arm/boot.h"
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7#include "hw/timer/allwinner-a10-pit.h"
8#include "hw/intc/allwinner-a10-pic.h"
db7dfd4c 9#include "hw/net/allwinner_emac.h"
82e48382 10#include "hw/sd/allwinner-sdhost.h"
dca62576 11#include "hw/ide/ahci.h"
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12#include "hw/usb/hcd-ohci.h"
13#include "hw/usb/hcd-ehci.h"
9158fa54 14
ec150c7e 15#include "target/arm/cpu.h"
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16
17
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18#define AW_A10_SDRAM_BASE 0x40000000
19
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20#define AW_A10_NUM_USB 2
21
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22#define TYPE_AW_A10 "allwinner-a10"
23#define AW_A10(obj) OBJECT_CHECK(AwA10State, (obj), TYPE_AW_A10)
24
25typedef struct AwA10State {
26 /*< private >*/
27 DeviceState parent_obj;
28 /*< public >*/
29
30 ARMCPU cpu;
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31 AwA10PITState timer;
32 AwA10PICState intc;
db7dfd4c 33 AwEmacState emac;
dca62576 34 AllwinnerAHCIState sata;
82e48382 35 AwSdHostState mmc0;
ead07aa4 36 MemoryRegion sram_a;
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37 EHCISysBusState ehci[AW_A10_NUM_USB];
38 OHCISysBusState ohci[AW_A10_NUM_USB];
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39} AwA10State;
40
9158fa54 41#endif