projects / mirror_qemu.git / blame
| Commit | Line | Data |
|---|---|---|
| bad56236 AB |
1 | /* |
| 2 | * Raspberry Pi emulation (c) 2012 Gregory Estrade | |
| 3 | * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous | |
| 4 | * | |
| 5 | * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft | |
| 6 | * Written by Andrew Baumann | |
| 7 | * | |
| 6111a0c0 PMD |
8 | * This work is licensed under the terms of the GNU GPL, version 2 or later. |
| 9 | * See the COPYING file in the top-level directory. | |
| bad56236 AB |
10 | */ |
| 11 | ||
| 12 | #ifndef BCM2836_H | |
| 13 | #define BCM2836_H | |
| 14 | ||
| bad56236 AB |
15 | #include "hw/arm/bcm2835_peripherals.h" |
| 16 | #include "hw/intc/bcm2836_control.h" | |
| ec150c7e | 17 | #include "target/arm/cpu.h" |
| db1015e9 | 18 | #include "qom/object.h" |
| bad56236 | 19 | |
| f932093a SK |
20 | #define TYPE_BCM283X_BASE "bcm283x-base" |
| 21 | OBJECT_DECLARE_TYPE(BCM283XBaseState, BCM283XBaseClass, BCM283X_BASE) | |
| 926dcdf0 | 22 | #define TYPE_BCM283X "bcm283x" |
| f932093a | 23 | OBJECT_DECLARE_SIMPLE_TYPE(BCM283XState, BCM283X) |
| bad56236 | 24 | |
| 926dcdf0 | 25 | #define BCM283X_NCPUS 4 |
| bad56236 | 26 | |
| 0fd74f03 PM |
27 | /* These type names are for specific SoCs; other than instantiating |
| 28 | * them, code using these devices should always handle them via the | |
| 29 | * BCM283x base class, so they have no BCM2836(obj) etc macros. | |
| 30 | */ | |
| df6cf08d | 31 | #define TYPE_BCM2835 "bcm2835" |
| 0fd74f03 PM |
32 | #define TYPE_BCM2836 "bcm2836" |
| 33 | #define TYPE_BCM2837 "bcm2837" | |
| 34 | ||
| f932093a | 35 | struct BCM283XBaseState { |
| bad56236 AB |
36 | /*< private >*/ |
| 37 | DeviceState parent_obj; | |
| 38 | /*< public >*/ | |
| 39 | ||
| 40 | uint32_t enabled_cpus; | |
| 41 | ||
| 5e5e9ed6 PMD |
42 | struct { |
| 43 | ARMCPU core; | |
| 44 | } cpu[BCM283X_NCPUS]; | |
| bad56236 | 45 | BCM2836ControlState control; |
| f932093a SK |
46 | }; |
| 47 | ||
| 48 | struct BCM283XBaseClass { | |
| 49 | /*< private >*/ | |
| 50 | DeviceClass parent_class; | |
| 51 | /*< public >*/ | |
| 52 | const char *name; | |
| 53 | const char *cpu_type; | |
| 54 | unsigned core_count; | |
| 55 | hwaddr peri_base; /* Peripheral base address seen by the CPU */ | |
| 56 | hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */ | |
| 57 | int clusterid; | |
| 58 | }; | |
| 59 | ||
| 60 | struct BCM283XState { | |
| 61 | /*< private >*/ | |
| 62 | BCM283XBaseState parent_obj; | |
| 63 | /*< public >*/ | |
| bad56236 | 64 | BCM2835PeripheralState peripherals; |
| db1015e9 | 65 | }; |
| bad56236 | 66 | |
| 7d04d630 SK |
67 | bool bcm283x_common_realize(DeviceState *dev, BCMSocPeripheralBaseState *ps, |
| 68 | Error **errp); | |
| f932093a | 69 | |
| bad56236 | 70 | #endif /* BCM2836_H */ |