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1 | /* |
2 | * STM32F205 SoC | |
3 | * | |
4 | * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me> | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
121d0712 MA |
25 | #ifndef HW_ARM_STM32F205_SOC_H |
26 | #define HW_ARM_STM32F205_SOC_H | |
db635521 AF |
27 | |
28 | #include "hw/misc/stm32f2xx_syscfg.h" | |
29 | #include "hw/timer/stm32f2xx_timer.h" | |
30 | #include "hw/char/stm32f2xx_usart.h" | |
b63041c8 AF |
31 | #include "hw/adc/stm32f2xx_adc.h" |
32 | #include "hw/or-irq.h" | |
540a8f34 | 33 | #include "hw/ssi/stm32f2xx_spi.h" |
b72e2f68 | 34 | #include "hw/arm/armv7m.h" |
db1015e9 | 35 | #include "qom/object.h" |
db635521 | 36 | |
342b0711 | 37 | #define TYPE_STM32F205_SOC "stm32f205-soc" |
8063396b | 38 | OBJECT_DECLARE_SIMPLE_TYPE(STM32F205State, STM32F205_SOC) |
db635521 AF |
39 | |
40 | #define STM_NUM_USARTS 6 | |
41 | #define STM_NUM_TIMERS 4 | |
b63041c8 | 42 | #define STM_NUM_ADCS 3 |
540a8f34 | 43 | #define STM_NUM_SPIS 3 |
db635521 AF |
44 | |
45 | #define FLASH_BASE_ADDRESS 0x08000000 | |
46 | #define FLASH_SIZE (1024 * 1024) | |
47 | #define SRAM_BASE_ADDRESS 0x20000000 | |
48 | #define SRAM_SIZE (128 * 1024) | |
49 | ||
db1015e9 | 50 | struct STM32F205State { |
db635521 AF |
51 | /*< private >*/ |
52 | SysBusDevice parent_obj; | |
53 | /*< public >*/ | |
54 | ||
ba1ba5cc | 55 | char *cpu_type; |
db635521 | 56 | |
b72e2f68 PM |
57 | ARMv7MState armv7m; |
58 | ||
db635521 AF |
59 | STM32F2XXSyscfgState syscfg; |
60 | STM32F2XXUsartState usart[STM_NUM_USARTS]; | |
61 | STM32F2XXTimerState timer[STM_NUM_TIMERS]; | |
b63041c8 | 62 | STM32F2XXADCState adc[STM_NUM_ADCS]; |
540a8f34 | 63 | STM32F2XXSPIState spi[STM_NUM_SPIS]; |
b63041c8 AF |
64 | |
65 | qemu_or_irq *adc_irqs; | |
db1015e9 | 66 | }; |
db635521 AF |
67 | |
68 | #endif |