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1/* Declarations for use by board files for creating devices. */
2
3#ifndef HW_BOARDS_H
4#define HW_BOARDS_H
5
9c17d615 6#include "sysemu/blockdev.h"
ac2da55e 7#include "sysemu/accel.h"
83c9f4ca 8#include "hw/qdev.h"
36d20cb2 9#include "qom/object.h"
3811ef14 10#include "qom/cpu.h"
b6b61144 11
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12/**
13 * memory_region_allocate_system_memory - Allocate a board's main memory
14 * @mr: the #MemoryRegion to be initialized
15 * @owner: the object that tracks the region's reference count
16 * @name: name of the memory region
17 * @ram_size: size of the region in bytes
18 *
19 * This function allocates the main memory for a board model, and
20 * initializes @mr appropriately. It also arranges for the memory
21 * to be migrated (by calling vmstate_register_ram_global()).
22 *
23 * Memory allocated via this function will be backed with the memory
24 * backend the user provided using "-mem-path" or "-numa node,memdev=..."
25 * if appropriate; this is typically used to cause host huge pages to be
26 * used. This function should therefore be called by a board exactly once,
27 * for the primary or largest RAM area it implements.
28 *
29 * For boards where the major RAM is split into two parts in the memory
30 * map, you can deal with this by calling memory_region_allocate_system_memory()
31 * once to get a MemoryRegion with enough RAM for both parts, and then
32 * creating alias MemoryRegions via memory_region_init_alias() which
33 * alias into different parts of the RAM MemoryRegion and can be mapped
34 * into the memory map in the appropriate places.
35 *
36 * Smaller pieces of memory (display RAM, static RAMs, etc) don't need
37 * to be backed via the -mem-path memory backend and can simply
5bd366b4 38 * be created via memory_region_init_ram().
09ad6438 39 */
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40void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner,
41 const char *name,
42 uint64_t ram_size);
43
dfabb8b9 44#define TYPE_MACHINE_SUFFIX "-machine"
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45
46/* Machine class name that needs to be used for class-name-based machine
47 * type lookup to work.
48 */
49#define MACHINE_TYPE_NAME(machinename) (machinename TYPE_MACHINE_SUFFIX)
50
36d20cb2 51#define TYPE_MACHINE "machine"
c8897e8e 52#undef MACHINE /* BSD defines it and QEMU does not use it */
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53#define MACHINE(obj) \
54 OBJECT_CHECK(MachineState, (obj), TYPE_MACHINE)
55#define MACHINE_GET_CLASS(obj) \
56 OBJECT_GET_CLASS(MachineClass, (obj), TYPE_MACHINE)
57#define MACHINE_CLASS(klass) \
58 OBJECT_CLASS_CHECK(MachineClass, (klass), TYPE_MACHINE)
59
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60extern MachineState *current_machine;
61
482dfe9a 62void machine_run_board_init(MachineState *machine);
5e97b623 63bool machine_usb(MachineState *machine);
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64bool machine_kernel_irqchip_allowed(MachineState *machine);
65bool machine_kernel_irqchip_required(MachineState *machine);
32c18a2d 66bool machine_kernel_irqchip_split(MachineState *machine);
4689b77b 67int machine_kvm_shadow_mem(MachineState *machine);
6cabe7fa 68int machine_phandle_start(MachineState *machine);
47c8ca53 69bool machine_dump_guest_core(MachineState *machine);
75cc7f01 70bool machine_mem_merge(MachineState *machine);
f2d672c2 71HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine);
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72void machine_set_cpu_numa_node(MachineState *machine,
73 const CpuInstanceProperties *props,
74 Error **errp);
5e97b623 75
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76void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type);
77
78
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79/**
80 * CPUArchId:
81 * @arch_id - architecture-dependent CPU ID of present or possible CPU
82 * @cpu - pointer to corresponding CPU object if it's present on NULL otherwise
d342eb76 83 * @type - QOM class name of possible @cpu object
c67ae933 84 * @props - CPU object properties, initialized by board
f2d672c2 85 * #vcpus_count - number of threads provided by @cpu object
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86 */
87typedef struct {
88 uint64_t arch_id;
f2d672c2 89 int64_t vcpus_count;
c67ae933 90 CpuInstanceProperties props;
8aba3842 91 Object *cpu;
d342eb76 92 const char *type;
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93} CPUArchId;
94
95/**
96 * CPUArchIdList:
97 * @len - number of @CPUArchId items in @cpus array
98 * @cpus - array of present or possible CPUs for current machine configuration
99 */
100typedef struct {
101 int len;
102 CPUArchId cpus[0];
103} CPUArchIdList;
104
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105/**
106 * MachineClass:
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107 * @deprecation_reason: If set, the machine is marked as deprecated. The
108 * string should provide some clear information about what to use instead.
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109 * @max_cpus: maximum number of CPUs supported. Default: 1
110 * @min_cpus: minimum number of CPUs supported. Default: 1
111 * @default_cpus: number of CPUs instantiated if none are specified. Default: 1
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112 * @get_hotplug_handler: this function is called during bus-less
113 * device hotplug. If defined it returns pointer to an instance
114 * of HotplugHandler object, which handles hotplug operation
115 * for a given @dev. It may return NULL if @dev doesn't require
116 * any actions to be performed by hotplug handler.
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117 * @cpu_index_to_instance_props:
118 * used to provide @cpu_index to socket/core/thread number mapping, allowing
119 * legacy code to perform maping from cpu_index to topology properties
120 * Returns: tuple of socket/core/thread ids given cpu_index belongs to.
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121 * used to provide @cpu_index to socket number mapping, allowing
122 * a machine to group CPU threads belonging to the same socket/package
123 * Returns: socket number given cpu_index belongs to.
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124 * @hw_version:
125 * Value of QEMU_VERSION when the machine was added to QEMU.
126 * Set only by old machines because they need to keep
127 * compatibility on code that exposed QEMU_VERSION to guests in
128 * the past (and now use qemu_hw_version()).
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129 * @possible_cpu_arch_ids:
130 * Returns an array of @CPUArchId architecture-dependent CPU IDs
131 * which includes CPU IDs for present and possible to hotplug CPUs.
132 * Caller is responsible for freeing returned list.
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133 * @get_default_cpu_node_id:
134 * returns default board specific node_id value for CPU slot specified by
135 * index @idx in @ms->possible_cpus[]
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136 * @has_hotpluggable_cpus:
137 * If true, board supports CPUs creation with -device/device_add.
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138 * @default_cpu_type:
139 * specifies default CPU_TYPE, which will be used for parsing target
140 * specific features and for creating CPUs if CPU name wasn't provided
141 * explicitly at CLI
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142 * @minimum_page_bits:
143 * If non-zero, the board promises never to create a CPU with a page size
144 * smaller than this, so QEMU can use a more efficient larger page
145 * size than the target architecture's minimum. (Attempting to create
146 * such a CPU will fail.) Note that changing this is a migration
147 * compatibility break for the machine.
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148 * @ignore_memory_transaction_failures:
149 * If this is flag is true then the CPU will ignore memory transaction
150 * failures which should cause the CPU to take an exception due to an
151 * access to an unassigned physical address; the transaction will instead
152 * return zero (for a read) or be ignored (for a write). This should be
153 * set only by legacy board models which rely on the old RAZ/WI behaviour
154 * for handling devices that QEMU does not yet model. New board models
155 * should instead use "unimplemented-device" for all memory ranges where
156 * the guest will attempt to probe for a device that QEMU doesn't
157 * implement and a stub device is required.
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158 * @kvm_type:
159 * Return the type of KVM corresponding to the kvm-type string option or
160 * computed based on other criteria such as the host kernel capabilities.
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161 */
162struct MachineClass {
163 /*< private >*/
164 ObjectClass parent_class;
165 /*< public >*/
166
2709f263 167 const char *family; /* NULL iff @name identifies a standalone machtype */
8ea75371 168 char *name;
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169 const char *alias;
170 const char *desc;
08fe6824 171 const char *deprecation_reason;
00b4fbe2 172
3ef96221 173 void (*init)(MachineState *state);
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174 void (*reset)(void);
175 void (*hot_add_cpu)(const int64_t id, Error **errp);
dc0ca80e 176 int (*kvm_type)(MachineState *machine, const char *arg);
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177
178 BlockInterfaceType block_default_type;
16026518 179 int units_per_default_bus;
00b4fbe2 180 int max_cpus;
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181 int min_cpus;
182 int default_cpus;
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183 unsigned int no_serial:1,
184 no_parallel:1,
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185 no_floppy:1,
186 no_cdrom:1,
33cd52b5 187 no_sdcard:1,
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188 pci_allow_0_address:1,
189 legacy_fw_cfg_order:1;
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190 int is_default;
191 const char *default_machine_opts;
192 const char *default_boot_order;
6f00494a 193 const char *default_display;
b66bbee3 194 GPtrArray *compat_props;
00b4fbe2 195 const char *hw_version;
076b35b5 196 ram_addr_t default_ram_size;
6063d4c0 197 const char *default_cpu_type;
b2fc91db 198 bool default_kernel_irqchip_split;
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199 bool option_rom_has_mr;
200 bool rom_file_has_mr;
20bccb82 201 int minimum_page_bits;
c5514d0e 202 bool has_hotpluggable_cpus;
ed860129 203 bool ignore_memory_transaction_failures;
55641213 204 int numa_mem_align_shift;
c9cf636d 205 const char **valid_cpu_types;
0bd1909d 206 strList *allowed_dynamic_sysbus_devices;
7b8be49d 207 bool auto_enable_numa_with_memhp;
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208 void (*numa_auto_assign_ram)(MachineClass *mc, NodeInfo *nodes,
209 int nb_nodes, ram_addr_t size);
907aac2f 210 bool ignore_boot_device_suffixes;
7fccf2a0 211 bool smbus_no_migration_support;
f6a0d06b 212 bool nvdimm_supported;
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213
214 HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
215 DeviceState *dev);
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216 CpuInstanceProperties (*cpu_index_to_instance_props)(MachineState *machine,
217 unsigned cpu_index);
80e5db30 218 const CPUArchIdList *(*possible_cpu_arch_ids)(MachineState *machine);
79e07936 219 int64_t (*get_default_cpu_node_id)(const MachineState *ms, int idx);
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220};
221
b0c14ec4 222/**
e017da37 223 * DeviceMemoryState:
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224 * @base: address in guest physical address space where the memory
225 * address space for memory devices starts
226 * @mr: address space container for memory devices
227 */
e017da37 228typedef struct DeviceMemoryState {
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229 hwaddr base;
230 MemoryRegion mr;
e017da37 231} DeviceMemoryState;
b0c14ec4 232
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233/**
234 * MachineState:
235 */
236struct MachineState {
237 /*< private >*/
238 Object parent_obj;
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239 Notifier sysbus_notifier;
240
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241 /*< public >*/
242
243 char *accel;
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244 bool kernel_irqchip_allowed;
245 bool kernel_irqchip_required;
32c18a2d 246 bool kernel_irqchip_split;
36d20cb2 247 int kvm_shadow_mem;
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248 char *dtb;
249 char *dumpdtb;
250 int phandle_start;
251 char *dt_compatible;
252 bool dump_guest_core;
253 bool mem_merge;
254 bool usb;
c6e76503 255 bool usb_disabled;
79814179 256 bool igd_gfx_passthru;
36d20cb2 257 char *firmware;
a52a7fdf 258 bool iommu;
9850c604 259 bool suppress_vmdesc;
902c053d 260 bool enforce_config_section;
cfc58cf3 261 bool enable_graphics;
db588194 262 char *memory_encryption;
e017da37 263 DeviceMemoryState *device_memory;
36d20cb2 264
3ef96221 265 ram_addr_t ram_size;
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266 ram_addr_t maxram_size;
267 uint64_t ram_slots;
3ef96221 268 const char *boot_order;
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269 char *kernel_filename;
270 char *kernel_cmdline;
271 char *initrd_filename;
6063d4c0 272 const char *cpu_type;
ac2da55e 273 AccelState *accelerator;
38690a1c 274 CPUArchIdList *possible_cpus;
f6a0d06b 275 struct NVDIMMState *nvdimms_state;
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276};
277
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278#define DEFINE_MACHINE(namestr, machine_initfn) \
279 static void machine_initfn##_class_init(ObjectClass *oc, void *data) \
280 { \
281 MachineClass *mc = MACHINE_CLASS(oc); \
282 machine_initfn(mc); \
283 } \
284 static const TypeInfo machine_initfn##_typeinfo = { \
285 .name = MACHINE_TYPE_NAME(namestr), \
286 .parent = TYPE_MACHINE, \
287 .class_init = machine_initfn##_class_init, \
288 }; \
289 static void machine_initfn##_register_types(void) \
290 { \
291 type_register_static(&machine_initfn##_typeinfo); \
292 } \
0e6aac87 293 type_init(machine_initfn##_register_types)
ed0b6de3 294
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295extern GlobalProperty hw_compat_4_0[];
296extern const size_t hw_compat_4_0_len;
297
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298extern GlobalProperty hw_compat_3_1[];
299extern const size_t hw_compat_3_1_len;
300
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301extern GlobalProperty hw_compat_3_0[];
302extern const size_t hw_compat_3_0_len;
303
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304extern GlobalProperty hw_compat_2_12[];
305extern const size_t hw_compat_2_12_len;
306
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307extern GlobalProperty hw_compat_2_11[];
308extern const size_t hw_compat_2_11_len;
309
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310extern GlobalProperty hw_compat_2_10[];
311extern const size_t hw_compat_2_10_len;
312
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313extern GlobalProperty hw_compat_2_9[];
314extern const size_t hw_compat_2_9_len;
315
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316extern GlobalProperty hw_compat_2_8[];
317extern const size_t hw_compat_2_8_len;
318
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319extern GlobalProperty hw_compat_2_7[];
320extern const size_t hw_compat_2_7_len;
321
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322extern GlobalProperty hw_compat_2_6[];
323extern const size_t hw_compat_2_6_len;
324
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325extern GlobalProperty hw_compat_2_5[];
326extern const size_t hw_compat_2_5_len;
327
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328extern GlobalProperty hw_compat_2_4[];
329extern const size_t hw_compat_2_4_len;
330
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331extern GlobalProperty hw_compat_2_3[];
332extern const size_t hw_compat_2_3_len;
333
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334extern GlobalProperty hw_compat_2_2[];
335extern const size_t hw_compat_2_2_len;
336
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337extern GlobalProperty hw_compat_2_1[];
338extern const size_t hw_compat_2_1_len;
339
87ecb68b 340#endif