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1/* Declarations for use by board files for creating devices. */
2
3#ifndef HW_BOARDS_H
4#define HW_BOARDS_H
5
9c17d615 6#include "sysemu/blockdev.h"
ac2da55e 7#include "sysemu/accel.h"
83c9f4ca 8#include "hw/qdev.h"
0b8fa32f 9#include "qemu/module.h"
36d20cb2 10#include "qom/object.h"
3811ef14 11#include "qom/cpu.h"
b6b61144 12
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13/**
14 * memory_region_allocate_system_memory - Allocate a board's main memory
15 * @mr: the #MemoryRegion to be initialized
16 * @owner: the object that tracks the region's reference count
17 * @name: name of the memory region
18 * @ram_size: size of the region in bytes
19 *
20 * This function allocates the main memory for a board model, and
21 * initializes @mr appropriately. It also arranges for the memory
22 * to be migrated (by calling vmstate_register_ram_global()).
23 *
24 * Memory allocated via this function will be backed with the memory
25 * backend the user provided using "-mem-path" or "-numa node,memdev=..."
26 * if appropriate; this is typically used to cause host huge pages to be
27 * used. This function should therefore be called by a board exactly once,
28 * for the primary or largest RAM area it implements.
29 *
30 * For boards where the major RAM is split into two parts in the memory
31 * map, you can deal with this by calling memory_region_allocate_system_memory()
32 * once to get a MemoryRegion with enough RAM for both parts, and then
33 * creating alias MemoryRegions via memory_region_init_alias() which
34 * alias into different parts of the RAM MemoryRegion and can be mapped
35 * into the memory map in the appropriate places.
36 *
37 * Smaller pieces of memory (display RAM, static RAMs, etc) don't need
38 * to be backed via the -mem-path memory backend and can simply
5bd366b4 39 * be created via memory_region_init_ram().
09ad6438 40 */
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41void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner,
42 const char *name,
43 uint64_t ram_size);
44
dfabb8b9 45#define TYPE_MACHINE_SUFFIX "-machine"
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46
47/* Machine class name that needs to be used for class-name-based machine
48 * type lookup to work.
49 */
50#define MACHINE_TYPE_NAME(machinename) (machinename TYPE_MACHINE_SUFFIX)
51
36d20cb2 52#define TYPE_MACHINE "machine"
c8897e8e 53#undef MACHINE /* BSD defines it and QEMU does not use it */
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54#define MACHINE(obj) \
55 OBJECT_CHECK(MachineState, (obj), TYPE_MACHINE)
56#define MACHINE_GET_CLASS(obj) \
57 OBJECT_GET_CLASS(MachineClass, (obj), TYPE_MACHINE)
58#define MACHINE_CLASS(klass) \
59 OBJECT_CLASS_CHECK(MachineClass, (klass), TYPE_MACHINE)
60
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61extern MachineState *current_machine;
62
482dfe9a 63void machine_run_board_init(MachineState *machine);
5e97b623 64bool machine_usb(MachineState *machine);
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65bool machine_kernel_irqchip_allowed(MachineState *machine);
66bool machine_kernel_irqchip_required(MachineState *machine);
32c18a2d 67bool machine_kernel_irqchip_split(MachineState *machine);
4689b77b 68int machine_kvm_shadow_mem(MachineState *machine);
6cabe7fa 69int machine_phandle_start(MachineState *machine);
47c8ca53 70bool machine_dump_guest_core(MachineState *machine);
75cc7f01 71bool machine_mem_merge(MachineState *machine);
f2d672c2 72HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine);
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73void machine_set_cpu_numa_node(MachineState *machine,
74 const CpuInstanceProperties *props,
75 Error **errp);
5e97b623 76
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77void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type);
78
79
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80/**
81 * CPUArchId:
82 * @arch_id - architecture-dependent CPU ID of present or possible CPU
83 * @cpu - pointer to corresponding CPU object if it's present on NULL otherwise
d342eb76 84 * @type - QOM class name of possible @cpu object
c67ae933 85 * @props - CPU object properties, initialized by board
f2d672c2 86 * #vcpus_count - number of threads provided by @cpu object
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87 */
88typedef struct {
89 uint64_t arch_id;
f2d672c2 90 int64_t vcpus_count;
c67ae933 91 CpuInstanceProperties props;
8aba3842 92 Object *cpu;
d342eb76 93 const char *type;
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94} CPUArchId;
95
96/**
97 * CPUArchIdList:
98 * @len - number of @CPUArchId items in @cpus array
99 * @cpus - array of present or possible CPUs for current machine configuration
100 */
101typedef struct {
102 int len;
103 CPUArchId cpus[0];
104} CPUArchIdList;
105
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106/**
107 * MachineClass:
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108 * @deprecation_reason: If set, the machine is marked as deprecated. The
109 * string should provide some clear information about what to use instead.
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110 * @max_cpus: maximum number of CPUs supported. Default: 1
111 * @min_cpus: minimum number of CPUs supported. Default: 1
112 * @default_cpus: number of CPUs instantiated if none are specified. Default: 1
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113 * @get_hotplug_handler: this function is called during bus-less
114 * device hotplug. If defined it returns pointer to an instance
115 * of HotplugHandler object, which handles hotplug operation
116 * for a given @dev. It may return NULL if @dev doesn't require
117 * any actions to be performed by hotplug handler.
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118 * @cpu_index_to_instance_props:
119 * used to provide @cpu_index to socket/core/thread number mapping, allowing
120 * legacy code to perform maping from cpu_index to topology properties
121 * Returns: tuple of socket/core/thread ids given cpu_index belongs to.
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122 * used to provide @cpu_index to socket number mapping, allowing
123 * a machine to group CPU threads belonging to the same socket/package
124 * Returns: socket number given cpu_index belongs to.
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125 * @hw_version:
126 * Value of QEMU_VERSION when the machine was added to QEMU.
127 * Set only by old machines because they need to keep
128 * compatibility on code that exposed QEMU_VERSION to guests in
129 * the past (and now use qemu_hw_version()).
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130 * @possible_cpu_arch_ids:
131 * Returns an array of @CPUArchId architecture-dependent CPU IDs
132 * which includes CPU IDs for present and possible to hotplug CPUs.
133 * Caller is responsible for freeing returned list.
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134 * @get_default_cpu_node_id:
135 * returns default board specific node_id value for CPU slot specified by
136 * index @idx in @ms->possible_cpus[]
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137 * @has_hotpluggable_cpus:
138 * If true, board supports CPUs creation with -device/device_add.
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139 * @default_cpu_type:
140 * specifies default CPU_TYPE, which will be used for parsing target
141 * specific features and for creating CPUs if CPU name wasn't provided
142 * explicitly at CLI
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143 * @minimum_page_bits:
144 * If non-zero, the board promises never to create a CPU with a page size
145 * smaller than this, so QEMU can use a more efficient larger page
146 * size than the target architecture's minimum. (Attempting to create
147 * such a CPU will fail.) Note that changing this is a migration
148 * compatibility break for the machine.
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149 * @ignore_memory_transaction_failures:
150 * If this is flag is true then the CPU will ignore memory transaction
151 * failures which should cause the CPU to take an exception due to an
152 * access to an unassigned physical address; the transaction will instead
153 * return zero (for a read) or be ignored (for a write). This should be
154 * set only by legacy board models which rely on the old RAZ/WI behaviour
155 * for handling devices that QEMU does not yet model. New board models
156 * should instead use "unimplemented-device" for all memory ranges where
157 * the guest will attempt to probe for a device that QEMU doesn't
158 * implement and a stub device is required.
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159 * @kvm_type:
160 * Return the type of KVM corresponding to the kvm-type string option or
161 * computed based on other criteria such as the host kernel capabilities.
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162 */
163struct MachineClass {
164 /*< private >*/
165 ObjectClass parent_class;
166 /*< public >*/
167
2709f263 168 const char *family; /* NULL iff @name identifies a standalone machtype */
8ea75371 169 char *name;
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170 const char *alias;
171 const char *desc;
08fe6824 172 const char *deprecation_reason;
00b4fbe2 173
3ef96221 174 void (*init)(MachineState *state);
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175 void (*reset)(void);
176 void (*hot_add_cpu)(const int64_t id, Error **errp);
dc0ca80e 177 int (*kvm_type)(MachineState *machine, const char *arg);
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178
179 BlockInterfaceType block_default_type;
16026518 180 int units_per_default_bus;
00b4fbe2 181 int max_cpus;
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182 int min_cpus;
183 int default_cpus;
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184 unsigned int no_serial:1,
185 no_parallel:1,
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186 no_floppy:1,
187 no_cdrom:1,
33cd52b5 188 no_sdcard:1,
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189 pci_allow_0_address:1,
190 legacy_fw_cfg_order:1;
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191 int is_default;
192 const char *default_machine_opts;
193 const char *default_boot_order;
6f00494a 194 const char *default_display;
b66bbee3 195 GPtrArray *compat_props;
00b4fbe2 196 const char *hw_version;
076b35b5 197 ram_addr_t default_ram_size;
6063d4c0 198 const char *default_cpu_type;
b2fc91db 199 bool default_kernel_irqchip_split;
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200 bool option_rom_has_mr;
201 bool rom_file_has_mr;
20bccb82 202 int minimum_page_bits;
c5514d0e 203 bool has_hotpluggable_cpus;
ed860129 204 bool ignore_memory_transaction_failures;
55641213 205 int numa_mem_align_shift;
c9cf636d 206 const char **valid_cpu_types;
0bd1909d 207 strList *allowed_dynamic_sysbus_devices;
7b8be49d 208 bool auto_enable_numa_with_memhp;
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209 void (*numa_auto_assign_ram)(MachineClass *mc, NodeInfo *nodes,
210 int nb_nodes, ram_addr_t size);
907aac2f 211 bool ignore_boot_device_suffixes;
7fccf2a0 212 bool smbus_no_migration_support;
f6a0d06b 213 bool nvdimm_supported;
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214
215 HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
216 DeviceState *dev);
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217 CpuInstanceProperties (*cpu_index_to_instance_props)(MachineState *machine,
218 unsigned cpu_index);
80e5db30 219 const CPUArchIdList *(*possible_cpu_arch_ids)(MachineState *machine);
79e07936 220 int64_t (*get_default_cpu_node_id)(const MachineState *ms, int idx);
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221};
222
b0c14ec4 223/**
e017da37 224 * DeviceMemoryState:
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225 * @base: address in guest physical address space where the memory
226 * address space for memory devices starts
227 * @mr: address space container for memory devices
228 */
e017da37 229typedef struct DeviceMemoryState {
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230 hwaddr base;
231 MemoryRegion mr;
e017da37 232} DeviceMemoryState;
b0c14ec4 233
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234/**
235 * MachineState:
236 */
237struct MachineState {
238 /*< private >*/
239 Object parent_obj;
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240 Notifier sysbus_notifier;
241
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242 /*< public >*/
243
244 char *accel;
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245 bool kernel_irqchip_allowed;
246 bool kernel_irqchip_required;
32c18a2d 247 bool kernel_irqchip_split;
36d20cb2 248 int kvm_shadow_mem;
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249 char *dtb;
250 char *dumpdtb;
251 int phandle_start;
252 char *dt_compatible;
253 bool dump_guest_core;
254 bool mem_merge;
255 bool usb;
c6e76503 256 bool usb_disabled;
79814179 257 bool igd_gfx_passthru;
36d20cb2 258 char *firmware;
a52a7fdf 259 bool iommu;
9850c604 260 bool suppress_vmdesc;
902c053d 261 bool enforce_config_section;
cfc58cf3 262 bool enable_graphics;
db588194 263 char *memory_encryption;
e017da37 264 DeviceMemoryState *device_memory;
36d20cb2 265
3ef96221 266 ram_addr_t ram_size;
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267 ram_addr_t maxram_size;
268 uint64_t ram_slots;
3ef96221 269 const char *boot_order;
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270 char *kernel_filename;
271 char *kernel_cmdline;
272 char *initrd_filename;
6063d4c0 273 const char *cpu_type;
ac2da55e 274 AccelState *accelerator;
38690a1c 275 CPUArchIdList *possible_cpus;
f6a0d06b 276 struct NVDIMMState *nvdimms_state;
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277};
278
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279#define DEFINE_MACHINE(namestr, machine_initfn) \
280 static void machine_initfn##_class_init(ObjectClass *oc, void *data) \
281 { \
282 MachineClass *mc = MACHINE_CLASS(oc); \
283 machine_initfn(mc); \
284 } \
285 static const TypeInfo machine_initfn##_typeinfo = { \
286 .name = MACHINE_TYPE_NAME(namestr), \
287 .parent = TYPE_MACHINE, \
288 .class_init = machine_initfn##_class_init, \
289 }; \
290 static void machine_initfn##_register_types(void) \
291 { \
292 type_register_static(&machine_initfn##_typeinfo); \
293 } \
0e6aac87 294 type_init(machine_initfn##_register_types)
ed0b6de3 295
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296extern GlobalProperty hw_compat_4_0_1[];
297extern const size_t hw_compat_4_0_1_len;
298
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299extern GlobalProperty hw_compat_4_0[];
300extern const size_t hw_compat_4_0_len;
301
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302extern GlobalProperty hw_compat_3_1[];
303extern const size_t hw_compat_3_1_len;
304
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305extern GlobalProperty hw_compat_3_0[];
306extern const size_t hw_compat_3_0_len;
307
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308extern GlobalProperty hw_compat_2_12[];
309extern const size_t hw_compat_2_12_len;
310
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311extern GlobalProperty hw_compat_2_11[];
312extern const size_t hw_compat_2_11_len;
313
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314extern GlobalProperty hw_compat_2_10[];
315extern const size_t hw_compat_2_10_len;
316
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317extern GlobalProperty hw_compat_2_9[];
318extern const size_t hw_compat_2_9_len;
319
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320extern GlobalProperty hw_compat_2_8[];
321extern const size_t hw_compat_2_8_len;
322
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323extern GlobalProperty hw_compat_2_7[];
324extern const size_t hw_compat_2_7_len;
325
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326extern GlobalProperty hw_compat_2_6[];
327extern const size_t hw_compat_2_6_len;
328
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329extern GlobalProperty hw_compat_2_5[];
330extern const size_t hw_compat_2_5_len;
331
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332extern GlobalProperty hw_compat_2_4[];
333extern const size_t hw_compat_2_4_len;
334
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335extern GlobalProperty hw_compat_2_3[];
336extern const size_t hw_compat_2_3_len;
337
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338extern GlobalProperty hw_compat_2_2[];
339extern const size_t hw_compat_2_2_len;
340
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341extern GlobalProperty hw_compat_2_1[];
342extern const size_t hw_compat_2_1_len;
343
87ecb68b 344#endif