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Commit | Line | Data |
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87ecb68b PB |
1 | /* Declarations for use by board files for creating devices. */ |
2 | ||
3 | #ifndef HW_BOARDS_H | |
4 | #define HW_BOARDS_H | |
5 | ||
d4842052 | 6 | #include "exec/memory.h" |
aa8b1839 | 7 | #include "sysemu/hostmem.h" |
9c17d615 | 8 | #include "sysemu/blockdev.h" |
940e43aa | 9 | #include "qemu/accel.h" |
8ac25c84 | 10 | #include "qapi/qapi-types-machine.h" |
0b8fa32f | 11 | #include "qemu/module.h" |
36d20cb2 | 12 | #include "qom/object.h" |
2e5b09fd | 13 | #include "hw/core/cpu.h" |
b6b61144 | 14 | |
dfabb8b9 | 15 | #define TYPE_MACHINE_SUFFIX "-machine" |
c84a8f01 EH |
16 | |
17 | /* Machine class name that needs to be used for class-name-based machine | |
18 | * type lookup to work. | |
19 | */ | |
20 | #define MACHINE_TYPE_NAME(machinename) (machinename TYPE_MACHINE_SUFFIX) | |
21 | ||
36d20cb2 | 22 | #define TYPE_MACHINE "machine" |
c8897e8e | 23 | #undef MACHINE /* BSD defines it and QEMU does not use it */ |
a489d195 | 24 | OBJECT_DECLARE_TYPE(MachineState, MachineClass, MACHINE) |
36d20cb2 | 25 | |
0056ae24 MA |
26 | extern MachineState *current_machine; |
27 | ||
482dfe9a | 28 | void machine_run_board_init(MachineState *machine); |
3df8c4f3 | 29 | bool machine_smp_parse(MachineState *ms, QemuOpts *opts, Error **errp); |
5e97b623 | 30 | bool machine_usb(MachineState *machine); |
6cabe7fa | 31 | int machine_phandle_start(MachineState *machine); |
47c8ca53 | 32 | bool machine_dump_guest_core(MachineState *machine); |
75cc7f01 | 33 | bool machine_mem_merge(MachineState *machine); |
f2d672c2 | 34 | HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine); |
7c88e65d IM |
35 | void machine_set_cpu_numa_node(MachineState *machine, |
36 | const CpuInstanceProperties *props, | |
37 | Error **errp); | |
5e97b623 | 38 | |
0bd1909d | 39 | void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type); |
82b911aa IM |
40 | /* |
41 | * Checks that backend isn't used, preps it for exclusive usage and | |
42 | * returns migratable MemoryRegion provided by backend. | |
43 | */ | |
44 | MemoryRegion *machine_consume_memdev(MachineState *machine, | |
45 | HostMemoryBackend *backend); | |
0bd1909d | 46 | |
3811ef14 IM |
47 | /** |
48 | * CPUArchId: | |
49 | * @arch_id - architecture-dependent CPU ID of present or possible CPU | |
50 | * @cpu - pointer to corresponding CPU object if it's present on NULL otherwise | |
d342eb76 | 51 | * @type - QOM class name of possible @cpu object |
c67ae933 | 52 | * @props - CPU object properties, initialized by board |
f2d672c2 | 53 | * #vcpus_count - number of threads provided by @cpu object |
3811ef14 | 54 | */ |
a44432b4 | 55 | typedef struct CPUArchId { |
3811ef14 | 56 | uint64_t arch_id; |
f2d672c2 | 57 | int64_t vcpus_count; |
c67ae933 | 58 | CpuInstanceProperties props; |
8aba3842 | 59 | Object *cpu; |
d342eb76 | 60 | const char *type; |
3811ef14 IM |
61 | } CPUArchId; |
62 | ||
63 | /** | |
64 | * CPUArchIdList: | |
65 | * @len - number of @CPUArchId items in @cpus array | |
66 | * @cpus - array of present or possible CPUs for current machine configuration | |
67 | */ | |
68 | typedef struct { | |
69 | int len; | |
880a7817 | 70 | CPUArchId cpus[]; |
3811ef14 IM |
71 | } CPUArchIdList; |
72 | ||
36d20cb2 MA |
73 | /** |
74 | * MachineClass: | |
08fe6824 TH |
75 | * @deprecation_reason: If set, the machine is marked as deprecated. The |
76 | * string should provide some clear information about what to use instead. | |
72649619 EC |
77 | * @max_cpus: maximum number of CPUs supported. Default: 1 |
78 | * @min_cpus: minimum number of CPUs supported. Default: 1 | |
79 | * @default_cpus: number of CPUs instantiated if none are specified. Default: 1 | |
ea0ac7f6 PMD |
80 | * @is_default: |
81 | * If true QEMU will use this machine by default if no '-M' option is given. | |
b7454548 IM |
82 | * @get_hotplug_handler: this function is called during bus-less |
83 | * device hotplug. If defined it returns pointer to an instance | |
84 | * of HotplugHandler object, which handles hotplug operation | |
85 | * for a given @dev. It may return NULL if @dev doesn't require | |
86 | * any actions to be performed by hotplug handler. | |
ea089eeb IM |
87 | * @cpu_index_to_instance_props: |
88 | * used to provide @cpu_index to socket/core/thread number mapping, allowing | |
89 | * legacy code to perform maping from cpu_index to topology properties | |
90 | * Returns: tuple of socket/core/thread ids given cpu_index belongs to. | |
57924bcd IM |
91 | * used to provide @cpu_index to socket number mapping, allowing |
92 | * a machine to group CPU threads belonging to the same socket/package | |
93 | * Returns: socket number given cpu_index belongs to. | |
fac862ff EH |
94 | * @hw_version: |
95 | * Value of QEMU_VERSION when the machine was added to QEMU. | |
96 | * Set only by old machines because they need to keep | |
97 | * compatibility on code that exposed QEMU_VERSION to guests in | |
98 | * the past (and now use qemu_hw_version()). | |
3811ef14 IM |
99 | * @possible_cpu_arch_ids: |
100 | * Returns an array of @CPUArchId architecture-dependent CPU IDs | |
101 | * which includes CPU IDs for present and possible to hotplug CPUs. | |
102 | * Caller is responsible for freeing returned list. | |
79e07936 IM |
103 | * @get_default_cpu_node_id: |
104 | * returns default board specific node_id value for CPU slot specified by | |
105 | * index @idx in @ms->possible_cpus[] | |
c5514d0e IM |
106 | * @has_hotpluggable_cpus: |
107 | * If true, board supports CPUs creation with -device/device_add. | |
6063d4c0 IM |
108 | * @default_cpu_type: |
109 | * specifies default CPU_TYPE, which will be used for parsing target | |
110 | * specific features and for creating CPUs if CPU name wasn't provided | |
111 | * explicitly at CLI | |
20bccb82 PM |
112 | * @minimum_page_bits: |
113 | * If non-zero, the board promises never to create a CPU with a page size | |
114 | * smaller than this, so QEMU can use a more efficient larger page | |
115 | * size than the target architecture's minimum. (Attempting to create | |
116 | * such a CPU will fail.) Note that changing this is a migration | |
117 | * compatibility break for the machine. | |
ed860129 PM |
118 | * @ignore_memory_transaction_failures: |
119 | * If this is flag is true then the CPU will ignore memory transaction | |
120 | * failures which should cause the CPU to take an exception due to an | |
121 | * access to an unassigned physical address; the transaction will instead | |
122 | * return zero (for a read) or be ignored (for a write). This should be | |
123 | * set only by legacy board models which rely on the old RAZ/WI behaviour | |
124 | * for handling devices that QEMU does not yet model. New board models | |
125 | * should instead use "unimplemented-device" for all memory ranges where | |
126 | * the guest will attempt to probe for a device that QEMU doesn't | |
127 | * implement and a stub device is required. | |
dc0ca80e EA |
128 | * @kvm_type: |
129 | * Return the type of KVM corresponding to the kvm-type string option or | |
130 | * computed based on other criteria such as the host kernel capabilities. | |
516fc0a0 | 131 | * kvm-type may be NULL if it is not needed. |
cd5ff833 IM |
132 | * @numa_mem_supported: |
133 | * true if '--numa node.mem' option is supported and false otherwise | |
6f479566 LX |
134 | * @smp_parse: |
135 | * The function pointer to hook different machine specific functions for | |
136 | * parsing "smp-opts" from QemuOpts to MachineState::CpuTopology and more | |
137 | * machine specific topology fields, such as smp_dies for PCMachine. | |
d2321d31 PX |
138 | * @hotplug_allowed: |
139 | * If the hook is provided, then it'll be called for each device | |
140 | * hotplug to check whether the device hotplug is allowed. Return | |
141 | * true to grant allowance or false to reject the hotplug. When | |
142 | * false is returned, an error must be set to show the reason of | |
143 | * the rejection. If the hook is not provided, all hotplug will be | |
144 | * allowed. | |
900c0ba3 IM |
145 | * @default_ram_id: |
146 | * Specifies inital RAM MemoryRegion name to be used for default backend | |
147 | * creation if user explicitly hasn't specified backend with "memory-backend" | |
148 | * property. | |
149 | * It also will be used as a way to optin into "-m" option support. | |
150 | * If it's not set by board, '-m' will be ignored and generic code will | |
151 | * not create default RAM MemoryRegion. | |
5c30ef93 CB |
152 | * @fixup_ram_size: |
153 | * Amends user provided ram size (with -m option) using machine | |
154 | * specific algorithm. To be used by old machine types for compat | |
155 | * purposes only. | |
156 | * Applies only to default memory backend, i.e., explicit memory backend | |
157 | * wasn't used. | |
36d20cb2 MA |
158 | */ |
159 | struct MachineClass { | |
160 | /*< private >*/ | |
161 | ObjectClass parent_class; | |
162 | /*< public >*/ | |
163 | ||
2709f263 | 164 | const char *family; /* NULL iff @name identifies a standalone machtype */ |
8ea75371 | 165 | char *name; |
00b4fbe2 MA |
166 | const char *alias; |
167 | const char *desc; | |
08fe6824 | 168 | const char *deprecation_reason; |
00b4fbe2 | 169 | |
3ef96221 | 170 | void (*init)(MachineState *state); |
a0628599 | 171 | void (*reset)(MachineState *state); |
4b5e06c9 | 172 | void (*wakeup)(MachineState *state); |
dc0ca80e | 173 | int (*kvm_type)(MachineState *machine, const char *arg); |
6f479566 | 174 | void (*smp_parse)(MachineState *ms, QemuOpts *opts); |
00b4fbe2 MA |
175 | |
176 | BlockInterfaceType block_default_type; | |
16026518 | 177 | int units_per_default_bus; |
00b4fbe2 | 178 | int max_cpus; |
72649619 EC |
179 | int min_cpus; |
180 | int default_cpus; | |
00b4fbe2 MA |
181 | unsigned int no_serial:1, |
182 | no_parallel:1, | |
00b4fbe2 MA |
183 | no_floppy:1, |
184 | no_cdrom:1, | |
33cd52b5 | 185 | no_sdcard:1, |
bab47d9a GH |
186 | pci_allow_0_address:1, |
187 | legacy_fw_cfg_order:1; | |
ea0ac7f6 | 188 | bool is_default; |
00b4fbe2 MA |
189 | const char *default_machine_opts; |
190 | const char *default_boot_order; | |
6f00494a | 191 | const char *default_display; |
b66bbee3 | 192 | GPtrArray *compat_props; |
00b4fbe2 | 193 | const char *hw_version; |
076b35b5 | 194 | ram_addr_t default_ram_size; |
6063d4c0 | 195 | const char *default_cpu_type; |
b2fc91db | 196 | bool default_kernel_irqchip_split; |
71ae9e94 EH |
197 | bool option_rom_has_mr; |
198 | bool rom_file_has_mr; | |
20bccb82 | 199 | int minimum_page_bits; |
c5514d0e | 200 | bool has_hotpluggable_cpus; |
ed860129 | 201 | bool ignore_memory_transaction_failures; |
55641213 | 202 | int numa_mem_align_shift; |
c9cf636d | 203 | const char **valid_cpu_types; |
0bd1909d | 204 | strList *allowed_dynamic_sysbus_devices; |
7b8be49d | 205 | bool auto_enable_numa_with_memhp; |
195784a0 | 206 | bool auto_enable_numa_with_memdev; |
907aac2f | 207 | bool ignore_boot_device_suffixes; |
7fccf2a0 | 208 | bool smbus_no_migration_support; |
f6a0d06b | 209 | bool nvdimm_supported; |
cd5ff833 | 210 | bool numa_mem_supported; |
0533ef5f | 211 | bool auto_enable_numa; |
900c0ba3 | 212 | const char *default_ram_id; |
b7454548 IM |
213 | |
214 | HotplugHandler *(*get_hotplug_handler)(MachineState *machine, | |
215 | DeviceState *dev); | |
d2321d31 PX |
216 | bool (*hotplug_allowed)(MachineState *state, DeviceState *dev, |
217 | Error **errp); | |
ea089eeb IM |
218 | CpuInstanceProperties (*cpu_index_to_instance_props)(MachineState *machine, |
219 | unsigned cpu_index); | |
80e5db30 | 220 | const CPUArchIdList *(*possible_cpu_arch_ids)(MachineState *machine); |
79e07936 | 221 | int64_t (*get_default_cpu_node_id)(const MachineState *ms, int idx); |
5c30ef93 | 222 | ram_addr_t (*fixup_ram_size)(ram_addr_t size); |
36d20cb2 MA |
223 | }; |
224 | ||
b0c14ec4 | 225 | /** |
e017da37 | 226 | * DeviceMemoryState: |
b0c14ec4 DH |
227 | * @base: address in guest physical address space where the memory |
228 | * address space for memory devices starts | |
229 | * @mr: address space container for memory devices | |
230 | */ | |
e017da37 | 231 | typedef struct DeviceMemoryState { |
b0c14ec4 DH |
232 | hwaddr base; |
233 | MemoryRegion mr; | |
e017da37 | 234 | } DeviceMemoryState; |
b0c14ec4 | 235 | |
edeeec91 LX |
236 | /** |
237 | * CpuTopology: | |
238 | * @cpus: the number of present logical processors on the machine | |
239 | * @cores: the number of cores in one package | |
240 | * @threads: the number of threads in one core | |
8cb30e3a | 241 | * @sockets: the number of sockets on the machine |
edeeec91 LX |
242 | * @max_cpus: the maximum number of logical processors on the machine |
243 | */ | |
244 | typedef struct CpuTopology { | |
245 | unsigned int cpus; | |
246 | unsigned int cores; | |
247 | unsigned int threads; | |
8cb30e3a | 248 | unsigned int sockets; |
edeeec91 LX |
249 | unsigned int max_cpus; |
250 | } CpuTopology; | |
251 | ||
36d20cb2 MA |
252 | /** |
253 | * MachineState: | |
254 | */ | |
255 | struct MachineState { | |
256 | /*< private >*/ | |
257 | Object parent_obj; | |
33cd52b5 AG |
258 | Notifier sysbus_notifier; |
259 | ||
36d20cb2 MA |
260 | /*< public >*/ |
261 | ||
a6487d37 | 262 | void *fdt; |
36d20cb2 MA |
263 | char *dtb; |
264 | char *dumpdtb; | |
265 | int phandle_start; | |
266 | char *dt_compatible; | |
267 | bool dump_guest_core; | |
268 | bool mem_merge; | |
269 | bool usb; | |
c6e76503 | 270 | bool usb_disabled; |
36d20cb2 | 271 | char *firmware; |
a52a7fdf | 272 | bool iommu; |
9850c604 | 273 | bool suppress_vmdesc; |
cfc58cf3 | 274 | bool enable_graphics; |
e0292d7c | 275 | ConfidentialGuestSupport *cgs; |
aa8b1839 | 276 | char *ram_memdev_id; |
82b911aa IM |
277 | /* |
278 | * convenience alias to ram_memdev_id backend memory region | |
279 | * or to numa container memory region | |
280 | */ | |
281 | MemoryRegion *ram; | |
e017da37 | 282 | DeviceMemoryState *device_memory; |
36d20cb2 | 283 | |
3ef96221 | 284 | ram_addr_t ram_size; |
c270fb9e IM |
285 | ram_addr_t maxram_size; |
286 | uint64_t ram_slots; | |
3ef96221 | 287 | const char *boot_order; |
4b7acd2a | 288 | const char *boot_once; |
6b1b1440 MA |
289 | char *kernel_filename; |
290 | char *kernel_cmdline; | |
291 | char *initrd_filename; | |
6063d4c0 | 292 | const char *cpu_type; |
ac2da55e | 293 | AccelState *accelerator; |
38690a1c | 294 | CPUArchIdList *possible_cpus; |
edeeec91 | 295 | CpuTopology smp; |
f6a0d06b | 296 | struct NVDIMMState *nvdimms_state; |
aa570207 | 297 | struct NumaState *numa_state; |
36d20cb2 MA |
298 | }; |
299 | ||
ed0b6de3 EH |
300 | #define DEFINE_MACHINE(namestr, machine_initfn) \ |
301 | static void machine_initfn##_class_init(ObjectClass *oc, void *data) \ | |
302 | { \ | |
303 | MachineClass *mc = MACHINE_CLASS(oc); \ | |
304 | machine_initfn(mc); \ | |
305 | } \ | |
306 | static const TypeInfo machine_initfn##_typeinfo = { \ | |
307 | .name = MACHINE_TYPE_NAME(namestr), \ | |
308 | .parent = TYPE_MACHINE, \ | |
309 | .class_init = machine_initfn##_class_init, \ | |
310 | }; \ | |
311 | static void machine_initfn##_register_types(void) \ | |
312 | { \ | |
313 | type_register_static(&machine_initfn##_typeinfo); \ | |
314 | } \ | |
0e6aac87 | 315 | type_init(machine_initfn##_register_types) |
ed0b6de3 | 316 | |
576a00bd CH |
317 | extern GlobalProperty hw_compat_5_2[]; |
318 | extern const size_t hw_compat_5_2_len; | |
319 | ||
3ff3c5d3 CH |
320 | extern GlobalProperty hw_compat_5_1[]; |
321 | extern const size_t hw_compat_5_1_len; | |
322 | ||
541aaa1d CH |
323 | extern GlobalProperty hw_compat_5_0[]; |
324 | extern const size_t hw_compat_5_0_len; | |
325 | ||
5f258577 EY |
326 | extern GlobalProperty hw_compat_4_2[]; |
327 | extern const size_t hw_compat_4_2_len; | |
328 | ||
9aec2e52 CH |
329 | extern GlobalProperty hw_compat_4_1[]; |
330 | extern const size_t hw_compat_4_1_len; | |
331 | ||
9bf2650b CH |
332 | extern GlobalProperty hw_compat_4_0[]; |
333 | extern const size_t hw_compat_4_0_len; | |
334 | ||
abd93cc7 MAL |
335 | extern GlobalProperty hw_compat_3_1[]; |
336 | extern const size_t hw_compat_3_1_len; | |
337 | ||
ddb3235d MAL |
338 | extern GlobalProperty hw_compat_3_0[]; |
339 | extern const size_t hw_compat_3_0_len; | |
340 | ||
0d47310b MAL |
341 | extern GlobalProperty hw_compat_2_12[]; |
342 | extern const size_t hw_compat_2_12_len; | |
343 | ||
43df70a9 MAL |
344 | extern GlobalProperty hw_compat_2_11[]; |
345 | extern const size_t hw_compat_2_11_len; | |
346 | ||
503224f4 MAL |
347 | extern GlobalProperty hw_compat_2_10[]; |
348 | extern const size_t hw_compat_2_10_len; | |
349 | ||
3e803152 MAL |
350 | extern GlobalProperty hw_compat_2_9[]; |
351 | extern const size_t hw_compat_2_9_len; | |
352 | ||
edc24ccd MAL |
353 | extern GlobalProperty hw_compat_2_8[]; |
354 | extern const size_t hw_compat_2_8_len; | |
355 | ||
5a995064 MAL |
356 | extern GlobalProperty hw_compat_2_7[]; |
357 | extern const size_t hw_compat_2_7_len; | |
358 | ||
ff8f261f MAL |
359 | extern GlobalProperty hw_compat_2_6[]; |
360 | extern const size_t hw_compat_2_6_len; | |
361 | ||
fe759610 MAL |
362 | extern GlobalProperty hw_compat_2_5[]; |
363 | extern const size_t hw_compat_2_5_len; | |
364 | ||
2f99b9c2 MAL |
365 | extern GlobalProperty hw_compat_2_4[]; |
366 | extern const size_t hw_compat_2_4_len; | |
367 | ||
8995dd90 MAL |
368 | extern GlobalProperty hw_compat_2_3[]; |
369 | extern const size_t hw_compat_2_3_len; | |
370 | ||
1c30044e MAL |
371 | extern GlobalProperty hw_compat_2_2[]; |
372 | extern const size_t hw_compat_2_2_len; | |
373 | ||
c4fc5695 MAL |
374 | extern GlobalProperty hw_compat_2_1[]; |
375 | extern const size_t hw_compat_2_1_len; | |
376 | ||
87ecb68b | 377 | #endif |