]> git.proxmox.com Git - mirror_qemu.git/blame - include/hw/boards.h
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
[mirror_qemu.git] / include / hw / boards.h
CommitLineData
87ecb68b
PB
1/* Declarations for use by board files for creating devices. */
2
3#ifndef HW_BOARDS_H
4#define HW_BOARDS_H
5
9c17d615 6#include "sysemu/blockdev.h"
ac2da55e 7#include "sysemu/accel.h"
83c9f4ca 8#include "hw/qdev.h"
36d20cb2 9#include "qom/object.h"
3811ef14 10#include "qom/cpu.h"
b6b61144 11
09ad6438
PM
12/**
13 * memory_region_allocate_system_memory - Allocate a board's main memory
14 * @mr: the #MemoryRegion to be initialized
15 * @owner: the object that tracks the region's reference count
16 * @name: name of the memory region
17 * @ram_size: size of the region in bytes
18 *
19 * This function allocates the main memory for a board model, and
20 * initializes @mr appropriately. It also arranges for the memory
21 * to be migrated (by calling vmstate_register_ram_global()).
22 *
23 * Memory allocated via this function will be backed with the memory
24 * backend the user provided using "-mem-path" or "-numa node,memdev=..."
25 * if appropriate; this is typically used to cause host huge pages to be
26 * used. This function should therefore be called by a board exactly once,
27 * for the primary or largest RAM area it implements.
28 *
29 * For boards where the major RAM is split into two parts in the memory
30 * map, you can deal with this by calling memory_region_allocate_system_memory()
31 * once to get a MemoryRegion with enough RAM for both parts, and then
32 * creating alias MemoryRegions via memory_region_init_alias() which
33 * alias into different parts of the RAM MemoryRegion and can be mapped
34 * into the memory map in the appropriate places.
35 *
36 * Smaller pieces of memory (display RAM, static RAMs, etc) don't need
37 * to be backed via the -mem-path memory backend and can simply
5bd366b4 38 * be created via memory_region_init_ram().
09ad6438 39 */
dfabb8b9
PB
40void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner,
41 const char *name,
42 uint64_t ram_size);
43
dfabb8b9 44#define TYPE_MACHINE_SUFFIX "-machine"
c84a8f01
EH
45
46/* Machine class name that needs to be used for class-name-based machine
47 * type lookup to work.
48 */
49#define MACHINE_TYPE_NAME(machinename) (machinename TYPE_MACHINE_SUFFIX)
50
36d20cb2 51#define TYPE_MACHINE "machine"
c8897e8e 52#undef MACHINE /* BSD defines it and QEMU does not use it */
36d20cb2
MA
53#define MACHINE(obj) \
54 OBJECT_CHECK(MachineState, (obj), TYPE_MACHINE)
55#define MACHINE_GET_CLASS(obj) \
56 OBJECT_GET_CLASS(MachineClass, (obj), TYPE_MACHINE)
57#define MACHINE_CLASS(klass) \
58 OBJECT_CLASS_CHECK(MachineClass, (klass), TYPE_MACHINE)
59
0056ae24
MA
60MachineClass *find_default_machine(void);
61extern MachineState *current_machine;
62
482dfe9a 63void machine_run_board_init(MachineState *machine);
5e97b623 64bool machine_usb(MachineState *machine);
d8870d02
MA
65bool machine_kernel_irqchip_allowed(MachineState *machine);
66bool machine_kernel_irqchip_required(MachineState *machine);
32c18a2d 67bool machine_kernel_irqchip_split(MachineState *machine);
4689b77b 68int machine_kvm_shadow_mem(MachineState *machine);
6cabe7fa 69int machine_phandle_start(MachineState *machine);
47c8ca53 70bool machine_dump_guest_core(MachineState *machine);
75cc7f01 71bool machine_mem_merge(MachineState *machine);
f2d672c2 72HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine);
7c88e65d
IM
73void machine_set_cpu_numa_node(MachineState *machine,
74 const CpuInstanceProperties *props,
75 Error **errp);
5e97b623 76
0bd1909d
EH
77void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type);
78
79
3811ef14
IM
80/**
81 * CPUArchId:
82 * @arch_id - architecture-dependent CPU ID of present or possible CPU
83 * @cpu - pointer to corresponding CPU object if it's present on NULL otherwise
d342eb76 84 * @type - QOM class name of possible @cpu object
c67ae933 85 * @props - CPU object properties, initialized by board
f2d672c2 86 * #vcpus_count - number of threads provided by @cpu object
3811ef14
IM
87 */
88typedef struct {
89 uint64_t arch_id;
f2d672c2 90 int64_t vcpus_count;
c67ae933 91 CpuInstanceProperties props;
8aba3842 92 Object *cpu;
d342eb76 93 const char *type;
3811ef14
IM
94} CPUArchId;
95
96/**
97 * CPUArchIdList:
98 * @len - number of @CPUArchId items in @cpus array
99 * @cpus - array of present or possible CPUs for current machine configuration
100 */
101typedef struct {
102 int len;
103 CPUArchId cpus[0];
104} CPUArchIdList;
105
36d20cb2
MA
106/**
107 * MachineClass:
08fe6824
TH
108 * @deprecation_reason: If set, the machine is marked as deprecated. The
109 * string should provide some clear information about what to use instead.
72649619
EC
110 * @max_cpus: maximum number of CPUs supported. Default: 1
111 * @min_cpus: minimum number of CPUs supported. Default: 1
112 * @default_cpus: number of CPUs instantiated if none are specified. Default: 1
b7454548
IM
113 * @get_hotplug_handler: this function is called during bus-less
114 * device hotplug. If defined it returns pointer to an instance
115 * of HotplugHandler object, which handles hotplug operation
116 * for a given @dev. It may return NULL if @dev doesn't require
117 * any actions to be performed by hotplug handler.
ea089eeb
IM
118 * @cpu_index_to_instance_props:
119 * used to provide @cpu_index to socket/core/thread number mapping, allowing
120 * legacy code to perform maping from cpu_index to topology properties
121 * Returns: tuple of socket/core/thread ids given cpu_index belongs to.
57924bcd
IM
122 * used to provide @cpu_index to socket number mapping, allowing
123 * a machine to group CPU threads belonging to the same socket/package
124 * Returns: socket number given cpu_index belongs to.
fac862ff
EH
125 * @hw_version:
126 * Value of QEMU_VERSION when the machine was added to QEMU.
127 * Set only by old machines because they need to keep
128 * compatibility on code that exposed QEMU_VERSION to guests in
129 * the past (and now use qemu_hw_version()).
3811ef14
IM
130 * @possible_cpu_arch_ids:
131 * Returns an array of @CPUArchId architecture-dependent CPU IDs
132 * which includes CPU IDs for present and possible to hotplug CPUs.
133 * Caller is responsible for freeing returned list.
79e07936
IM
134 * @get_default_cpu_node_id:
135 * returns default board specific node_id value for CPU slot specified by
136 * index @idx in @ms->possible_cpus[]
c5514d0e
IM
137 * @has_hotpluggable_cpus:
138 * If true, board supports CPUs creation with -device/device_add.
6063d4c0
IM
139 * @default_cpu_type:
140 * specifies default CPU_TYPE, which will be used for parsing target
141 * specific features and for creating CPUs if CPU name wasn't provided
142 * explicitly at CLI
20bccb82
PM
143 * @minimum_page_bits:
144 * If non-zero, the board promises never to create a CPU with a page size
145 * smaller than this, so QEMU can use a more efficient larger page
146 * size than the target architecture's minimum. (Attempting to create
147 * such a CPU will fail.) Note that changing this is a migration
148 * compatibility break for the machine.
ed860129
PM
149 * @ignore_memory_transaction_failures:
150 * If this is flag is true then the CPU will ignore memory transaction
151 * failures which should cause the CPU to take an exception due to an
152 * access to an unassigned physical address; the transaction will instead
153 * return zero (for a read) or be ignored (for a write). This should be
154 * set only by legacy board models which rely on the old RAZ/WI behaviour
155 * for handling devices that QEMU does not yet model. New board models
156 * should instead use "unimplemented-device" for all memory ranges where
157 * the guest will attempt to probe for a device that QEMU doesn't
158 * implement and a stub device is required.
36d20cb2
MA
159 */
160struct MachineClass {
161 /*< private >*/
162 ObjectClass parent_class;
163 /*< public >*/
164
2709f263 165 const char *family; /* NULL iff @name identifies a standalone machtype */
8ea75371 166 char *name;
00b4fbe2
MA
167 const char *alias;
168 const char *desc;
08fe6824 169 const char *deprecation_reason;
00b4fbe2 170
3ef96221 171 void (*init)(MachineState *state);
00b4fbe2
MA
172 void (*reset)(void);
173 void (*hot_add_cpu)(const int64_t id, Error **errp);
174 int (*kvm_type)(const char *arg);
175
176 BlockInterfaceType block_default_type;
16026518 177 int units_per_default_bus;
00b4fbe2 178 int max_cpus;
72649619
EC
179 int min_cpus;
180 int default_cpus;
00b4fbe2
MA
181 unsigned int no_serial:1,
182 no_parallel:1,
00b4fbe2
MA
183 no_floppy:1,
184 no_cdrom:1,
33cd52b5 185 no_sdcard:1,
bab47d9a
GH
186 pci_allow_0_address:1,
187 legacy_fw_cfg_order:1;
00b4fbe2
MA
188 int is_default;
189 const char *default_machine_opts;
190 const char *default_boot_order;
6f00494a 191 const char *default_display;
b66bbee3 192 GPtrArray *compat_props;
00b4fbe2 193 const char *hw_version;
076b35b5 194 ram_addr_t default_ram_size;
6063d4c0 195 const char *default_cpu_type;
b2fc91db 196 bool default_kernel_irqchip_split;
71ae9e94
EH
197 bool option_rom_has_mr;
198 bool rom_file_has_mr;
20bccb82 199 int minimum_page_bits;
c5514d0e 200 bool has_hotpluggable_cpus;
ed860129 201 bool ignore_memory_transaction_failures;
55641213 202 int numa_mem_align_shift;
c9cf636d 203 const char **valid_cpu_types;
0bd1909d 204 strList *allowed_dynamic_sysbus_devices;
7b8be49d 205 bool auto_enable_numa_with_memhp;
3bfe5716
LV
206 void (*numa_auto_assign_ram)(MachineClass *mc, NodeInfo *nodes,
207 int nb_nodes, ram_addr_t size);
907aac2f 208 bool ignore_boot_device_suffixes;
b7454548
IM
209
210 HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
211 DeviceState *dev);
ea089eeb
IM
212 CpuInstanceProperties (*cpu_index_to_instance_props)(MachineState *machine,
213 unsigned cpu_index);
80e5db30 214 const CPUArchIdList *(*possible_cpu_arch_ids)(MachineState *machine);
79e07936 215 int64_t (*get_default_cpu_node_id)(const MachineState *ms, int idx);
36d20cb2
MA
216};
217
b0c14ec4 218/**
e017da37 219 * DeviceMemoryState:
b0c14ec4
DH
220 * @base: address in guest physical address space where the memory
221 * address space for memory devices starts
222 * @mr: address space container for memory devices
223 */
e017da37 224typedef struct DeviceMemoryState {
b0c14ec4
DH
225 hwaddr base;
226 MemoryRegion mr;
e017da37 227} DeviceMemoryState;
b0c14ec4 228
36d20cb2
MA
229/**
230 * MachineState:
231 */
232struct MachineState {
233 /*< private >*/
234 Object parent_obj;
33cd52b5
AG
235 Notifier sysbus_notifier;
236
36d20cb2
MA
237 /*< public >*/
238
239 char *accel;
d8870d02
MA
240 bool kernel_irqchip_allowed;
241 bool kernel_irqchip_required;
32c18a2d 242 bool kernel_irqchip_split;
36d20cb2 243 int kvm_shadow_mem;
36d20cb2
MA
244 char *dtb;
245 char *dumpdtb;
246 int phandle_start;
247 char *dt_compatible;
248 bool dump_guest_core;
249 bool mem_merge;
250 bool usb;
c6e76503 251 bool usb_disabled;
79814179 252 bool igd_gfx_passthru;
36d20cb2 253 char *firmware;
a52a7fdf 254 bool iommu;
9850c604 255 bool suppress_vmdesc;
902c053d 256 bool enforce_config_section;
cfc58cf3 257 bool enable_graphics;
db588194 258 char *memory_encryption;
e017da37 259 DeviceMemoryState *device_memory;
36d20cb2 260
3ef96221 261 ram_addr_t ram_size;
c270fb9e
IM
262 ram_addr_t maxram_size;
263 uint64_t ram_slots;
3ef96221 264 const char *boot_order;
6b1b1440
MA
265 char *kernel_filename;
266 char *kernel_cmdline;
267 char *initrd_filename;
6063d4c0 268 const char *cpu_type;
ac2da55e 269 AccelState *accelerator;
38690a1c 270 CPUArchIdList *possible_cpus;
36d20cb2
MA
271};
272
ed0b6de3
EH
273#define DEFINE_MACHINE(namestr, machine_initfn) \
274 static void machine_initfn##_class_init(ObjectClass *oc, void *data) \
275 { \
276 MachineClass *mc = MACHINE_CLASS(oc); \
277 machine_initfn(mc); \
278 } \
279 static const TypeInfo machine_initfn##_typeinfo = { \
280 .name = MACHINE_TYPE_NAME(namestr), \
281 .parent = TYPE_MACHINE, \
282 .class_init = machine_initfn##_class_init, \
283 }; \
284 static void machine_initfn##_register_types(void) \
285 { \
286 type_register_static(&machine_initfn##_typeinfo); \
287 } \
0e6aac87 288 type_init(machine_initfn##_register_types)
ed0b6de3 289
abd93cc7
MAL
290extern GlobalProperty hw_compat_3_1[];
291extern const size_t hw_compat_3_1_len;
292
ddb3235d
MAL
293extern GlobalProperty hw_compat_3_0[];
294extern const size_t hw_compat_3_0_len;
295
0d47310b
MAL
296extern GlobalProperty hw_compat_2_12[];
297extern const size_t hw_compat_2_12_len;
298
43df70a9
MAL
299extern GlobalProperty hw_compat_2_11[];
300extern const size_t hw_compat_2_11_len;
301
503224f4
MAL
302extern GlobalProperty hw_compat_2_10[];
303extern const size_t hw_compat_2_10_len;
304
3e803152
MAL
305extern GlobalProperty hw_compat_2_9[];
306extern const size_t hw_compat_2_9_len;
307
edc24ccd
MAL
308extern GlobalProperty hw_compat_2_8[];
309extern const size_t hw_compat_2_8_len;
310
5a995064
MAL
311extern GlobalProperty hw_compat_2_7[];
312extern const size_t hw_compat_2_7_len;
313
ff8f261f
MAL
314extern GlobalProperty hw_compat_2_6[];
315extern const size_t hw_compat_2_6_len;
316
fe759610
MAL
317extern GlobalProperty hw_compat_2_5[];
318extern const size_t hw_compat_2_5_len;
319
2f99b9c2
MAL
320extern GlobalProperty hw_compat_2_4[];
321extern const size_t hw_compat_2_4_len;
322
8995dd90
MAL
323extern GlobalProperty hw_compat_2_3[];
324extern const size_t hw_compat_2_3_len;
325
1c30044e
MAL
326extern GlobalProperty hw_compat_2_2[];
327extern const size_t hw_compat_2_2_len;
328
c4fc5695
MAL
329extern GlobalProperty hw_compat_2_1[];
330extern const size_t hw_compat_2_1_len;
331
87ecb68b 332#endif