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87ecb68b
PB
1/* Declarations for use by board files for creating devices. */
2
3#ifndef HW_BOARDS_H
4#define HW_BOARDS_H
5
d4842052 6#include "exec/memory.h"
aa8b1839 7#include "sysemu/hostmem.h"
9c17d615 8#include "sysemu/blockdev.h"
ac2da55e 9#include "sysemu/accel.h"
8ac25c84 10#include "qapi/qapi-types-machine.h"
0b8fa32f 11#include "qemu/module.h"
36d20cb2 12#include "qom/object.h"
2e5b09fd 13#include "hw/core/cpu.h"
b6b61144 14
dfabb8b9 15#define TYPE_MACHINE_SUFFIX "-machine"
c84a8f01
EH
16
17/* Machine class name that needs to be used for class-name-based machine
18 * type lookup to work.
19 */
20#define MACHINE_TYPE_NAME(machinename) (machinename TYPE_MACHINE_SUFFIX)
21
36d20cb2 22#define TYPE_MACHINE "machine"
c8897e8e 23#undef MACHINE /* BSD defines it and QEMU does not use it */
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MA
24#define MACHINE(obj) \
25 OBJECT_CHECK(MachineState, (obj), TYPE_MACHINE)
26#define MACHINE_GET_CLASS(obj) \
27 OBJECT_GET_CLASS(MachineClass, (obj), TYPE_MACHINE)
28#define MACHINE_CLASS(klass) \
29 OBJECT_CLASS_CHECK(MachineClass, (klass), TYPE_MACHINE)
30
0056ae24
MA
31extern MachineState *current_machine;
32
482dfe9a 33void machine_run_board_init(MachineState *machine);
5e97b623 34bool machine_usb(MachineState *machine);
6cabe7fa 35int machine_phandle_start(MachineState *machine);
47c8ca53 36bool machine_dump_guest_core(MachineState *machine);
75cc7f01 37bool machine_mem_merge(MachineState *machine);
f2d672c2 38HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine);
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39void machine_set_cpu_numa_node(MachineState *machine,
40 const CpuInstanceProperties *props,
41 Error **errp);
5e97b623 42
0bd1909d 43void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type);
82b911aa
IM
44/*
45 * Checks that backend isn't used, preps it for exclusive usage and
46 * returns migratable MemoryRegion provided by backend.
47 */
48MemoryRegion *machine_consume_memdev(MachineState *machine,
49 HostMemoryBackend *backend);
0bd1909d 50
3811ef14
IM
51/**
52 * CPUArchId:
53 * @arch_id - architecture-dependent CPU ID of present or possible CPU
54 * @cpu - pointer to corresponding CPU object if it's present on NULL otherwise
d342eb76 55 * @type - QOM class name of possible @cpu object
c67ae933 56 * @props - CPU object properties, initialized by board
f2d672c2 57 * #vcpus_count - number of threads provided by @cpu object
3811ef14 58 */
a44432b4 59typedef struct CPUArchId {
3811ef14 60 uint64_t arch_id;
f2d672c2 61 int64_t vcpus_count;
c67ae933 62 CpuInstanceProperties props;
8aba3842 63 Object *cpu;
d342eb76 64 const char *type;
3811ef14
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65} CPUArchId;
66
67/**
68 * CPUArchIdList:
69 * @len - number of @CPUArchId items in @cpus array
70 * @cpus - array of present or possible CPUs for current machine configuration
71 */
72typedef struct {
73 int len;
880a7817 74 CPUArchId cpus[];
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75} CPUArchIdList;
76
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77/**
78 * MachineClass:
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79 * @deprecation_reason: If set, the machine is marked as deprecated. The
80 * string should provide some clear information about what to use instead.
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81 * @max_cpus: maximum number of CPUs supported. Default: 1
82 * @min_cpus: minimum number of CPUs supported. Default: 1
83 * @default_cpus: number of CPUs instantiated if none are specified. Default: 1
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84 * @is_default:
85 * If true QEMU will use this machine by default if no '-M' option is given.
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86 * @get_hotplug_handler: this function is called during bus-less
87 * device hotplug. If defined it returns pointer to an instance
88 * of HotplugHandler object, which handles hotplug operation
89 * for a given @dev. It may return NULL if @dev doesn't require
90 * any actions to be performed by hotplug handler.
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91 * @cpu_index_to_instance_props:
92 * used to provide @cpu_index to socket/core/thread number mapping, allowing
93 * legacy code to perform maping from cpu_index to topology properties
94 * Returns: tuple of socket/core/thread ids given cpu_index belongs to.
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95 * used to provide @cpu_index to socket number mapping, allowing
96 * a machine to group CPU threads belonging to the same socket/package
97 * Returns: socket number given cpu_index belongs to.
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98 * @hw_version:
99 * Value of QEMU_VERSION when the machine was added to QEMU.
100 * Set only by old machines because they need to keep
101 * compatibility on code that exposed QEMU_VERSION to guests in
102 * the past (and now use qemu_hw_version()).
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103 * @possible_cpu_arch_ids:
104 * Returns an array of @CPUArchId architecture-dependent CPU IDs
105 * which includes CPU IDs for present and possible to hotplug CPUs.
106 * Caller is responsible for freeing returned list.
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107 * @get_default_cpu_node_id:
108 * returns default board specific node_id value for CPU slot specified by
109 * index @idx in @ms->possible_cpus[]
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110 * @has_hotpluggable_cpus:
111 * If true, board supports CPUs creation with -device/device_add.
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112 * @default_cpu_type:
113 * specifies default CPU_TYPE, which will be used for parsing target
114 * specific features and for creating CPUs if CPU name wasn't provided
115 * explicitly at CLI
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116 * @minimum_page_bits:
117 * If non-zero, the board promises never to create a CPU with a page size
118 * smaller than this, so QEMU can use a more efficient larger page
119 * size than the target architecture's minimum. (Attempting to create
120 * such a CPU will fail.) Note that changing this is a migration
121 * compatibility break for the machine.
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122 * @ignore_memory_transaction_failures:
123 * If this is flag is true then the CPU will ignore memory transaction
124 * failures which should cause the CPU to take an exception due to an
125 * access to an unassigned physical address; the transaction will instead
126 * return zero (for a read) or be ignored (for a write). This should be
127 * set only by legacy board models which rely on the old RAZ/WI behaviour
128 * for handling devices that QEMU does not yet model. New board models
129 * should instead use "unimplemented-device" for all memory ranges where
130 * the guest will attempt to probe for a device that QEMU doesn't
131 * implement and a stub device is required.
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132 * @kvm_type:
133 * Return the type of KVM corresponding to the kvm-type string option or
134 * computed based on other criteria such as the host kernel capabilities.
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135 * @numa_mem_supported:
136 * true if '--numa node.mem' option is supported and false otherwise
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137 * @smp_parse:
138 * The function pointer to hook different machine specific functions for
139 * parsing "smp-opts" from QemuOpts to MachineState::CpuTopology and more
140 * machine specific topology fields, such as smp_dies for PCMachine.
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141 * @hotplug_allowed:
142 * If the hook is provided, then it'll be called for each device
143 * hotplug to check whether the device hotplug is allowed. Return
144 * true to grant allowance or false to reject the hotplug. When
145 * false is returned, an error must be set to show the reason of
146 * the rejection. If the hook is not provided, all hotplug will be
147 * allowed.
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148 * @default_ram_id:
149 * Specifies inital RAM MemoryRegion name to be used for default backend
150 * creation if user explicitly hasn't specified backend with "memory-backend"
151 * property.
152 * It also will be used as a way to optin into "-m" option support.
153 * If it's not set by board, '-m' will be ignored and generic code will
154 * not create default RAM MemoryRegion.
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155 * @fixup_ram_size:
156 * Amends user provided ram size (with -m option) using machine
157 * specific algorithm. To be used by old machine types for compat
158 * purposes only.
159 * Applies only to default memory backend, i.e., explicit memory backend
160 * wasn't used.
36d20cb2
MA
161 */
162struct MachineClass {
163 /*< private >*/
164 ObjectClass parent_class;
165 /*< public >*/
166
2709f263 167 const char *family; /* NULL iff @name identifies a standalone machtype */
8ea75371 168 char *name;
00b4fbe2
MA
169 const char *alias;
170 const char *desc;
08fe6824 171 const char *deprecation_reason;
00b4fbe2 172
3ef96221 173 void (*init)(MachineState *state);
a0628599 174 void (*reset)(MachineState *state);
4b5e06c9 175 void (*wakeup)(MachineState *state);
a0628599 176 void (*hot_add_cpu)(MachineState *state, const int64_t id, Error **errp);
dc0ca80e 177 int (*kvm_type)(MachineState *machine, const char *arg);
6f479566 178 void (*smp_parse)(MachineState *ms, QemuOpts *opts);
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179
180 BlockInterfaceType block_default_type;
16026518 181 int units_per_default_bus;
00b4fbe2 182 int max_cpus;
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183 int min_cpus;
184 int default_cpus;
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185 unsigned int no_serial:1,
186 no_parallel:1,
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187 no_floppy:1,
188 no_cdrom:1,
33cd52b5 189 no_sdcard:1,
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190 pci_allow_0_address:1,
191 legacy_fw_cfg_order:1;
ea0ac7f6 192 bool is_default;
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193 const char *default_machine_opts;
194 const char *default_boot_order;
6f00494a 195 const char *default_display;
b66bbee3 196 GPtrArray *compat_props;
00b4fbe2 197 const char *hw_version;
076b35b5 198 ram_addr_t default_ram_size;
6063d4c0 199 const char *default_cpu_type;
b2fc91db 200 bool default_kernel_irqchip_split;
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201 bool option_rom_has_mr;
202 bool rom_file_has_mr;
20bccb82 203 int minimum_page_bits;
c5514d0e 204 bool has_hotpluggable_cpus;
ed860129 205 bool ignore_memory_transaction_failures;
55641213 206 int numa_mem_align_shift;
c9cf636d 207 const char **valid_cpu_types;
0bd1909d 208 strList *allowed_dynamic_sysbus_devices;
7b8be49d 209 bool auto_enable_numa_with_memhp;
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210 void (*numa_auto_assign_ram)(MachineClass *mc, NodeInfo *nodes,
211 int nb_nodes, ram_addr_t size);
907aac2f 212 bool ignore_boot_device_suffixes;
7fccf2a0 213 bool smbus_no_migration_support;
f6a0d06b 214 bool nvdimm_supported;
cd5ff833 215 bool numa_mem_supported;
0533ef5f 216 bool auto_enable_numa;
900c0ba3 217 const char *default_ram_id;
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218
219 HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
220 DeviceState *dev);
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221 bool (*hotplug_allowed)(MachineState *state, DeviceState *dev,
222 Error **errp);
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223 CpuInstanceProperties (*cpu_index_to_instance_props)(MachineState *machine,
224 unsigned cpu_index);
80e5db30 225 const CPUArchIdList *(*possible_cpu_arch_ids)(MachineState *machine);
79e07936 226 int64_t (*get_default_cpu_node_id)(const MachineState *ms, int idx);
5c30ef93 227 ram_addr_t (*fixup_ram_size)(ram_addr_t size);
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MA
228};
229
b0c14ec4 230/**
e017da37 231 * DeviceMemoryState:
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232 * @base: address in guest physical address space where the memory
233 * address space for memory devices starts
234 * @mr: address space container for memory devices
235 */
e017da37 236typedef struct DeviceMemoryState {
b0c14ec4
DH
237 hwaddr base;
238 MemoryRegion mr;
e017da37 239} DeviceMemoryState;
b0c14ec4 240
edeeec91
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241/**
242 * CpuTopology:
243 * @cpus: the number of present logical processors on the machine
244 * @cores: the number of cores in one package
245 * @threads: the number of threads in one core
8cb30e3a 246 * @sockets: the number of sockets on the machine
edeeec91
LX
247 * @max_cpus: the maximum number of logical processors on the machine
248 */
249typedef struct CpuTopology {
250 unsigned int cpus;
251 unsigned int cores;
252 unsigned int threads;
8cb30e3a 253 unsigned int sockets;
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LX
254 unsigned int max_cpus;
255} CpuTopology;
256
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MA
257/**
258 * MachineState:
259 */
260struct MachineState {
261 /*< private >*/
262 Object parent_obj;
33cd52b5
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263 Notifier sysbus_notifier;
264
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MA
265 /*< public >*/
266
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MA
267 char *dtb;
268 char *dumpdtb;
269 int phandle_start;
270 char *dt_compatible;
271 bool dump_guest_core;
272 bool mem_merge;
273 bool usb;
c6e76503 274 bool usb_disabled;
36d20cb2 275 char *firmware;
a52a7fdf 276 bool iommu;
9850c604 277 bool suppress_vmdesc;
902c053d 278 bool enforce_config_section;
cfc58cf3 279 bool enable_graphics;
db588194 280 char *memory_encryption;
aa8b1839 281 char *ram_memdev_id;
82b911aa
IM
282 /*
283 * convenience alias to ram_memdev_id backend memory region
284 * or to numa container memory region
285 */
286 MemoryRegion *ram;
e017da37 287 DeviceMemoryState *device_memory;
36d20cb2 288
3ef96221 289 ram_addr_t ram_size;
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IM
290 ram_addr_t maxram_size;
291 uint64_t ram_slots;
3ef96221 292 const char *boot_order;
6b1b1440
MA
293 char *kernel_filename;
294 char *kernel_cmdline;
295 char *initrd_filename;
6063d4c0 296 const char *cpu_type;
ac2da55e 297 AccelState *accelerator;
38690a1c 298 CPUArchIdList *possible_cpus;
edeeec91 299 CpuTopology smp;
f6a0d06b 300 struct NVDIMMState *nvdimms_state;
aa570207 301 struct NumaState *numa_state;
36d20cb2
MA
302};
303
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EH
304#define DEFINE_MACHINE(namestr, machine_initfn) \
305 static void machine_initfn##_class_init(ObjectClass *oc, void *data) \
306 { \
307 MachineClass *mc = MACHINE_CLASS(oc); \
308 machine_initfn(mc); \
309 } \
310 static const TypeInfo machine_initfn##_typeinfo = { \
311 .name = MACHINE_TYPE_NAME(namestr), \
312 .parent = TYPE_MACHINE, \
313 .class_init = machine_initfn##_class_init, \
314 }; \
315 static void machine_initfn##_register_types(void) \
316 { \
317 type_register_static(&machine_initfn##_typeinfo); \
318 } \
0e6aac87 319 type_init(machine_initfn##_register_types)
ed0b6de3 320
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EY
321extern GlobalProperty hw_compat_4_2[];
322extern const size_t hw_compat_4_2_len;
323
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CH
324extern GlobalProperty hw_compat_4_1[];
325extern const size_t hw_compat_4_1_len;
326
9bf2650b
CH
327extern GlobalProperty hw_compat_4_0[];
328extern const size_t hw_compat_4_0_len;
329
abd93cc7
MAL
330extern GlobalProperty hw_compat_3_1[];
331extern const size_t hw_compat_3_1_len;
332
ddb3235d
MAL
333extern GlobalProperty hw_compat_3_0[];
334extern const size_t hw_compat_3_0_len;
335
0d47310b
MAL
336extern GlobalProperty hw_compat_2_12[];
337extern const size_t hw_compat_2_12_len;
338
43df70a9
MAL
339extern GlobalProperty hw_compat_2_11[];
340extern const size_t hw_compat_2_11_len;
341
503224f4
MAL
342extern GlobalProperty hw_compat_2_10[];
343extern const size_t hw_compat_2_10_len;
344
3e803152
MAL
345extern GlobalProperty hw_compat_2_9[];
346extern const size_t hw_compat_2_9_len;
347
edc24ccd
MAL
348extern GlobalProperty hw_compat_2_8[];
349extern const size_t hw_compat_2_8_len;
350
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MAL
351extern GlobalProperty hw_compat_2_7[];
352extern const size_t hw_compat_2_7_len;
353
ff8f261f
MAL
354extern GlobalProperty hw_compat_2_6[];
355extern const size_t hw_compat_2_6_len;
356
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MAL
357extern GlobalProperty hw_compat_2_5[];
358extern const size_t hw_compat_2_5_len;
359
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MAL
360extern GlobalProperty hw_compat_2_4[];
361extern const size_t hw_compat_2_4_len;
362
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363extern GlobalProperty hw_compat_2_3[];
364extern const size_t hw_compat_2_3_len;
365
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MAL
366extern GlobalProperty hw_compat_2_2[];
367extern const size_t hw_compat_2_2_len;
368
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MAL
369extern GlobalProperty hw_compat_2_1[];
370extern const size_t hw_compat_2_1_len;
371
87ecb68b 372#endif