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Commit | Line | Data |
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87ecb68b PB |
1 | /* Declarations for use by board files for creating devices. */ |
2 | ||
3 | #ifndef HW_BOARDS_H | |
4 | #define HW_BOARDS_H | |
5 | ||
9c17d615 | 6 | #include "sysemu/blockdev.h" |
ac2da55e | 7 | #include "sysemu/accel.h" |
83c9f4ca | 8 | #include "hw/qdev.h" |
36d20cb2 | 9 | #include "qom/object.h" |
3811ef14 | 10 | #include "qom/cpu.h" |
b6b61144 | 11 | |
09ad6438 PM |
12 | /** |
13 | * memory_region_allocate_system_memory - Allocate a board's main memory | |
14 | * @mr: the #MemoryRegion to be initialized | |
15 | * @owner: the object that tracks the region's reference count | |
16 | * @name: name of the memory region | |
17 | * @ram_size: size of the region in bytes | |
18 | * | |
19 | * This function allocates the main memory for a board model, and | |
20 | * initializes @mr appropriately. It also arranges for the memory | |
21 | * to be migrated (by calling vmstate_register_ram_global()). | |
22 | * | |
23 | * Memory allocated via this function will be backed with the memory | |
24 | * backend the user provided using "-mem-path" or "-numa node,memdev=..." | |
25 | * if appropriate; this is typically used to cause host huge pages to be | |
26 | * used. This function should therefore be called by a board exactly once, | |
27 | * for the primary or largest RAM area it implements. | |
28 | * | |
29 | * For boards where the major RAM is split into two parts in the memory | |
30 | * map, you can deal with this by calling memory_region_allocate_system_memory() | |
31 | * once to get a MemoryRegion with enough RAM for both parts, and then | |
32 | * creating alias MemoryRegions via memory_region_init_alias() which | |
33 | * alias into different parts of the RAM MemoryRegion and can be mapped | |
34 | * into the memory map in the appropriate places. | |
35 | * | |
36 | * Smaller pieces of memory (display RAM, static RAMs, etc) don't need | |
37 | * to be backed via the -mem-path memory backend and can simply | |
b08199c6 PM |
38 | * be created via memory_region_allocate_aux_memory() or |
39 | * memory_region_init_ram(). | |
09ad6438 | 40 | */ |
dfabb8b9 PB |
41 | void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner, |
42 | const char *name, | |
43 | uint64_t ram_size); | |
44 | ||
dfabb8b9 | 45 | #define TYPE_MACHINE_SUFFIX "-machine" |
c84a8f01 EH |
46 | |
47 | /* Machine class name that needs to be used for class-name-based machine | |
48 | * type lookup to work. | |
49 | */ | |
50 | #define MACHINE_TYPE_NAME(machinename) (machinename TYPE_MACHINE_SUFFIX) | |
51 | ||
36d20cb2 | 52 | #define TYPE_MACHINE "machine" |
c8897e8e | 53 | #undef MACHINE /* BSD defines it and QEMU does not use it */ |
36d20cb2 MA |
54 | #define MACHINE(obj) \ |
55 | OBJECT_CHECK(MachineState, (obj), TYPE_MACHINE) | |
56 | #define MACHINE_GET_CLASS(obj) \ | |
57 | OBJECT_GET_CLASS(MachineClass, (obj), TYPE_MACHINE) | |
58 | #define MACHINE_CLASS(klass) \ | |
59 | OBJECT_CLASS_CHECK(MachineClass, (klass), TYPE_MACHINE) | |
60 | ||
0056ae24 MA |
61 | MachineClass *find_default_machine(void); |
62 | extern MachineState *current_machine; | |
63 | ||
482dfe9a | 64 | void machine_run_board_init(MachineState *machine); |
5e97b623 | 65 | bool machine_usb(MachineState *machine); |
d8870d02 MA |
66 | bool machine_kernel_irqchip_allowed(MachineState *machine); |
67 | bool machine_kernel_irqchip_required(MachineState *machine); | |
32c18a2d | 68 | bool machine_kernel_irqchip_split(MachineState *machine); |
4689b77b | 69 | int machine_kvm_shadow_mem(MachineState *machine); |
6cabe7fa | 70 | int machine_phandle_start(MachineState *machine); |
47c8ca53 | 71 | bool machine_dump_guest_core(MachineState *machine); |
75cc7f01 | 72 | bool machine_mem_merge(MachineState *machine); |
39a3b377 | 73 | void machine_register_compat_props(MachineState *machine); |
f2d672c2 | 74 | HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine); |
7c88e65d IM |
75 | void machine_set_cpu_numa_node(MachineState *machine, |
76 | const CpuInstanceProperties *props, | |
77 | Error **errp); | |
5e97b623 | 78 | |
0bd1909d EH |
79 | void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type); |
80 | ||
81 | ||
3811ef14 IM |
82 | /** |
83 | * CPUArchId: | |
84 | * @arch_id - architecture-dependent CPU ID of present or possible CPU | |
85 | * @cpu - pointer to corresponding CPU object if it's present on NULL otherwise | |
c67ae933 | 86 | * @props - CPU object properties, initialized by board |
f2d672c2 | 87 | * #vcpus_count - number of threads provided by @cpu object |
3811ef14 IM |
88 | */ |
89 | typedef struct { | |
90 | uint64_t arch_id; | |
f2d672c2 | 91 | int64_t vcpus_count; |
c67ae933 | 92 | CpuInstanceProperties props; |
8aba3842 | 93 | Object *cpu; |
3811ef14 IM |
94 | } CPUArchId; |
95 | ||
96 | /** | |
97 | * CPUArchIdList: | |
98 | * @len - number of @CPUArchId items in @cpus array | |
99 | * @cpus - array of present or possible CPUs for current machine configuration | |
100 | */ | |
101 | typedef struct { | |
102 | int len; | |
103 | CPUArchId cpus[0]; | |
104 | } CPUArchIdList; | |
105 | ||
36d20cb2 MA |
106 | /** |
107 | * MachineClass: | |
72649619 EC |
108 | * @max_cpus: maximum number of CPUs supported. Default: 1 |
109 | * @min_cpus: minimum number of CPUs supported. Default: 1 | |
110 | * @default_cpus: number of CPUs instantiated if none are specified. Default: 1 | |
b7454548 IM |
111 | * @get_hotplug_handler: this function is called during bus-less |
112 | * device hotplug. If defined it returns pointer to an instance | |
113 | * of HotplugHandler object, which handles hotplug operation | |
114 | * for a given @dev. It may return NULL if @dev doesn't require | |
115 | * any actions to be performed by hotplug handler. | |
ea089eeb IM |
116 | * @cpu_index_to_instance_props: |
117 | * used to provide @cpu_index to socket/core/thread number mapping, allowing | |
118 | * legacy code to perform maping from cpu_index to topology properties | |
119 | * Returns: tuple of socket/core/thread ids given cpu_index belongs to. | |
57924bcd IM |
120 | * used to provide @cpu_index to socket number mapping, allowing |
121 | * a machine to group CPU threads belonging to the same socket/package | |
122 | * Returns: socket number given cpu_index belongs to. | |
fac862ff EH |
123 | * @hw_version: |
124 | * Value of QEMU_VERSION when the machine was added to QEMU. | |
125 | * Set only by old machines because they need to keep | |
126 | * compatibility on code that exposed QEMU_VERSION to guests in | |
127 | * the past (and now use qemu_hw_version()). | |
3811ef14 IM |
128 | * @possible_cpu_arch_ids: |
129 | * Returns an array of @CPUArchId architecture-dependent CPU IDs | |
130 | * which includes CPU IDs for present and possible to hotplug CPUs. | |
131 | * Caller is responsible for freeing returned list. | |
79e07936 IM |
132 | * @get_default_cpu_node_id: |
133 | * returns default board specific node_id value for CPU slot specified by | |
134 | * index @idx in @ms->possible_cpus[] | |
c5514d0e IM |
135 | * @has_hotpluggable_cpus: |
136 | * If true, board supports CPUs creation with -device/device_add. | |
6063d4c0 IM |
137 | * @default_cpu_type: |
138 | * specifies default CPU_TYPE, which will be used for parsing target | |
139 | * specific features and for creating CPUs if CPU name wasn't provided | |
140 | * explicitly at CLI | |
20bccb82 PM |
141 | * @minimum_page_bits: |
142 | * If non-zero, the board promises never to create a CPU with a page size | |
143 | * smaller than this, so QEMU can use a more efficient larger page | |
144 | * size than the target architecture's minimum. (Attempting to create | |
145 | * such a CPU will fail.) Note that changing this is a migration | |
146 | * compatibility break for the machine. | |
ed860129 PM |
147 | * @ignore_memory_transaction_failures: |
148 | * If this is flag is true then the CPU will ignore memory transaction | |
149 | * failures which should cause the CPU to take an exception due to an | |
150 | * access to an unassigned physical address; the transaction will instead | |
151 | * return zero (for a read) or be ignored (for a write). This should be | |
152 | * set only by legacy board models which rely on the old RAZ/WI behaviour | |
153 | * for handling devices that QEMU does not yet model. New board models | |
154 | * should instead use "unimplemented-device" for all memory ranges where | |
155 | * the guest will attempt to probe for a device that QEMU doesn't | |
156 | * implement and a stub device is required. | |
36d20cb2 MA |
157 | */ |
158 | struct MachineClass { | |
159 | /*< private >*/ | |
160 | ObjectClass parent_class; | |
161 | /*< public >*/ | |
162 | ||
2709f263 | 163 | const char *family; /* NULL iff @name identifies a standalone machtype */ |
8ea75371 | 164 | char *name; |
00b4fbe2 MA |
165 | const char *alias; |
166 | const char *desc; | |
167 | ||
3ef96221 | 168 | void (*init)(MachineState *state); |
00b4fbe2 MA |
169 | void (*reset)(void); |
170 | void (*hot_add_cpu)(const int64_t id, Error **errp); | |
171 | int (*kvm_type)(const char *arg); | |
172 | ||
173 | BlockInterfaceType block_default_type; | |
16026518 | 174 | int units_per_default_bus; |
00b4fbe2 | 175 | int max_cpus; |
72649619 EC |
176 | int min_cpus; |
177 | int default_cpus; | |
00b4fbe2 MA |
178 | unsigned int no_serial:1, |
179 | no_parallel:1, | |
180 | use_virtcon:1, | |
181 | use_sclp:1, | |
182 | no_floppy:1, | |
183 | no_cdrom:1, | |
33cd52b5 | 184 | no_sdcard:1, |
bab47d9a GH |
185 | pci_allow_0_address:1, |
186 | legacy_fw_cfg_order:1; | |
00b4fbe2 MA |
187 | int is_default; |
188 | const char *default_machine_opts; | |
189 | const char *default_boot_order; | |
6f00494a | 190 | const char *default_display; |
bacc344c | 191 | GArray *compat_props; |
00b4fbe2 | 192 | const char *hw_version; |
076b35b5 | 193 | ram_addr_t default_ram_size; |
6063d4c0 | 194 | const char *default_cpu_type; |
71ae9e94 EH |
195 | bool option_rom_has_mr; |
196 | bool rom_file_has_mr; | |
20bccb82 | 197 | int minimum_page_bits; |
c5514d0e | 198 | bool has_hotpluggable_cpus; |
ed860129 | 199 | bool ignore_memory_transaction_failures; |
55641213 | 200 | int numa_mem_align_shift; |
c9cf636d | 201 | const char **valid_cpu_types; |
0bd1909d | 202 | strList *allowed_dynamic_sysbus_devices; |
7b8be49d | 203 | bool auto_enable_numa_with_memhp; |
3bfe5716 LV |
204 | void (*numa_auto_assign_ram)(MachineClass *mc, NodeInfo *nodes, |
205 | int nb_nodes, ram_addr_t size); | |
b7454548 IM |
206 | |
207 | HotplugHandler *(*get_hotplug_handler)(MachineState *machine, | |
208 | DeviceState *dev); | |
ea089eeb IM |
209 | CpuInstanceProperties (*cpu_index_to_instance_props)(MachineState *machine, |
210 | unsigned cpu_index); | |
80e5db30 | 211 | const CPUArchIdList *(*possible_cpu_arch_ids)(MachineState *machine); |
79e07936 | 212 | int64_t (*get_default_cpu_node_id)(const MachineState *ms, int idx); |
36d20cb2 MA |
213 | }; |
214 | ||
215 | /** | |
216 | * MachineState: | |
217 | */ | |
218 | struct MachineState { | |
219 | /*< private >*/ | |
220 | Object parent_obj; | |
33cd52b5 AG |
221 | Notifier sysbus_notifier; |
222 | ||
36d20cb2 MA |
223 | /*< public >*/ |
224 | ||
225 | char *accel; | |
d8870d02 MA |
226 | bool kernel_irqchip_allowed; |
227 | bool kernel_irqchip_required; | |
32c18a2d | 228 | bool kernel_irqchip_split; |
36d20cb2 | 229 | int kvm_shadow_mem; |
36d20cb2 MA |
230 | char *dtb; |
231 | char *dumpdtb; | |
232 | int phandle_start; | |
233 | char *dt_compatible; | |
234 | bool dump_guest_core; | |
235 | bool mem_merge; | |
236 | bool usb; | |
c6e76503 | 237 | bool usb_disabled; |
79814179 | 238 | bool igd_gfx_passthru; |
36d20cb2 | 239 | char *firmware; |
a52a7fdf | 240 | bool iommu; |
9850c604 | 241 | bool suppress_vmdesc; |
902c053d | 242 | bool enforce_config_section; |
cfc58cf3 | 243 | bool enable_graphics; |
36d20cb2 | 244 | |
3ef96221 | 245 | ram_addr_t ram_size; |
c270fb9e IM |
246 | ram_addr_t maxram_size; |
247 | uint64_t ram_slots; | |
3ef96221 | 248 | const char *boot_order; |
6b1b1440 MA |
249 | char *kernel_filename; |
250 | char *kernel_cmdline; | |
251 | char *initrd_filename; | |
3ef96221 | 252 | const char *cpu_model; |
6063d4c0 | 253 | const char *cpu_type; |
ac2da55e | 254 | AccelState *accelerator; |
38690a1c | 255 | CPUArchIdList *possible_cpus; |
36d20cb2 MA |
256 | }; |
257 | ||
ed0b6de3 EH |
258 | #define DEFINE_MACHINE(namestr, machine_initfn) \ |
259 | static void machine_initfn##_class_init(ObjectClass *oc, void *data) \ | |
260 | { \ | |
261 | MachineClass *mc = MACHINE_CLASS(oc); \ | |
262 | machine_initfn(mc); \ | |
263 | } \ | |
264 | static const TypeInfo machine_initfn##_typeinfo = { \ | |
265 | .name = MACHINE_TYPE_NAME(namestr), \ | |
266 | .parent = TYPE_MACHINE, \ | |
267 | .class_init = machine_initfn##_class_init, \ | |
268 | }; \ | |
269 | static void machine_initfn##_register_types(void) \ | |
270 | { \ | |
271 | type_register_static(&machine_initfn##_typeinfo); \ | |
272 | } \ | |
0e6aac87 | 273 | type_init(machine_initfn##_register_types) |
ed0b6de3 | 274 | |
877f8931 DG |
275 | #define SET_MACHINE_COMPAT(m, COMPAT) \ |
276 | do { \ | |
bacc344c | 277 | int i; \ |
877f8931 DG |
278 | static GlobalProperty props[] = { \ |
279 | COMPAT \ | |
280 | { /* end of list */ } \ | |
281 | }; \ | |
bacc344c IM |
282 | if (!m->compat_props) { \ |
283 | m->compat_props = g_array_new(false, false, sizeof(void *)); \ | |
284 | } \ | |
285 | for (i = 0; props[i].driver != NULL; i++) { \ | |
286 | GlobalProperty *prop = &props[i]; \ | |
287 | g_array_append_val(m->compat_props, prop); \ | |
288 | } \ | |
877f8931 DG |
289 | } while (0) |
290 | ||
87ecb68b | 291 | #endif |