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87ecb68b
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1/* Declarations for use by board files for creating devices. */
2
3#ifndef HW_BOARDS_H
4#define HW_BOARDS_H
5
d4842052 6#include "exec/memory.h"
aa8b1839 7#include "sysemu/hostmem.h"
9c17d615 8#include "sysemu/blockdev.h"
940e43aa 9#include "qemu/accel.h"
8ac25c84 10#include "qapi/qapi-types-machine.h"
0b8fa32f 11#include "qemu/module.h"
36d20cb2 12#include "qom/object.h"
2e5b09fd 13#include "hw/core/cpu.h"
b6b61144 14
dfabb8b9 15#define TYPE_MACHINE_SUFFIX "-machine"
c84a8f01
EH
16
17/* Machine class name that needs to be used for class-name-based machine
18 * type lookup to work.
19 */
20#define MACHINE_TYPE_NAME(machinename) (machinename TYPE_MACHINE_SUFFIX)
21
36d20cb2 22#define TYPE_MACHINE "machine"
c8897e8e 23#undef MACHINE /* BSD defines it and QEMU does not use it */
a489d195 24OBJECT_DECLARE_TYPE(MachineState, MachineClass, MACHINE)
36d20cb2 25
0056ae24
MA
26extern MachineState *current_machine;
27
482dfe9a 28void machine_run_board_init(MachineState *machine);
3df8c4f3 29bool machine_smp_parse(MachineState *ms, QemuOpts *opts, Error **errp);
5e97b623 30bool machine_usb(MachineState *machine);
6cabe7fa 31int machine_phandle_start(MachineState *machine);
47c8ca53 32bool machine_dump_guest_core(MachineState *machine);
75cc7f01 33bool machine_mem_merge(MachineState *machine);
f2d672c2 34HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine);
7c88e65d
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35void machine_set_cpu_numa_node(MachineState *machine,
36 const CpuInstanceProperties *props,
37 Error **errp);
5e97b623 38
0bd1909d 39void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type);
82b911aa
IM
40/*
41 * Checks that backend isn't used, preps it for exclusive usage and
42 * returns migratable MemoryRegion provided by backend.
43 */
44MemoryRegion *machine_consume_memdev(MachineState *machine,
45 HostMemoryBackend *backend);
0bd1909d 46
3811ef14
IM
47/**
48 * CPUArchId:
49 * @arch_id - architecture-dependent CPU ID of present or possible CPU
50 * @cpu - pointer to corresponding CPU object if it's present on NULL otherwise
d342eb76 51 * @type - QOM class name of possible @cpu object
c67ae933 52 * @props - CPU object properties, initialized by board
f2d672c2 53 * #vcpus_count - number of threads provided by @cpu object
3811ef14 54 */
a44432b4 55typedef struct CPUArchId {
3811ef14 56 uint64_t arch_id;
f2d672c2 57 int64_t vcpus_count;
c67ae933 58 CpuInstanceProperties props;
8aba3842 59 Object *cpu;
d342eb76 60 const char *type;
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61} CPUArchId;
62
63/**
64 * CPUArchIdList:
65 * @len - number of @CPUArchId items in @cpus array
66 * @cpus - array of present or possible CPUs for current machine configuration
67 */
68typedef struct {
69 int len;
880a7817 70 CPUArchId cpus[];
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71} CPUArchIdList;
72
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73/**
74 * MachineClass:
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75 * @deprecation_reason: If set, the machine is marked as deprecated. The
76 * string should provide some clear information about what to use instead.
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77 * @max_cpus: maximum number of CPUs supported. Default: 1
78 * @min_cpus: minimum number of CPUs supported. Default: 1
79 * @default_cpus: number of CPUs instantiated if none are specified. Default: 1
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80 * @is_default:
81 * If true QEMU will use this machine by default if no '-M' option is given.
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82 * @get_hotplug_handler: this function is called during bus-less
83 * device hotplug. If defined it returns pointer to an instance
84 * of HotplugHandler object, which handles hotplug operation
85 * for a given @dev. It may return NULL if @dev doesn't require
86 * any actions to be performed by hotplug handler.
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87 * @cpu_index_to_instance_props:
88 * used to provide @cpu_index to socket/core/thread number mapping, allowing
89 * legacy code to perform maping from cpu_index to topology properties
90 * Returns: tuple of socket/core/thread ids given cpu_index belongs to.
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91 * used to provide @cpu_index to socket number mapping, allowing
92 * a machine to group CPU threads belonging to the same socket/package
93 * Returns: socket number given cpu_index belongs to.
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94 * @hw_version:
95 * Value of QEMU_VERSION when the machine was added to QEMU.
96 * Set only by old machines because they need to keep
97 * compatibility on code that exposed QEMU_VERSION to guests in
98 * the past (and now use qemu_hw_version()).
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99 * @possible_cpu_arch_ids:
100 * Returns an array of @CPUArchId architecture-dependent CPU IDs
101 * which includes CPU IDs for present and possible to hotplug CPUs.
102 * Caller is responsible for freeing returned list.
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103 * @get_default_cpu_node_id:
104 * returns default board specific node_id value for CPU slot specified by
105 * index @idx in @ms->possible_cpus[]
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106 * @has_hotpluggable_cpus:
107 * If true, board supports CPUs creation with -device/device_add.
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108 * @default_cpu_type:
109 * specifies default CPU_TYPE, which will be used for parsing target
110 * specific features and for creating CPUs if CPU name wasn't provided
111 * explicitly at CLI
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112 * @minimum_page_bits:
113 * If non-zero, the board promises never to create a CPU with a page size
114 * smaller than this, so QEMU can use a more efficient larger page
115 * size than the target architecture's minimum. (Attempting to create
116 * such a CPU will fail.) Note that changing this is a migration
117 * compatibility break for the machine.
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118 * @ignore_memory_transaction_failures:
119 * If this is flag is true then the CPU will ignore memory transaction
120 * failures which should cause the CPU to take an exception due to an
121 * access to an unassigned physical address; the transaction will instead
122 * return zero (for a read) or be ignored (for a write). This should be
123 * set only by legacy board models which rely on the old RAZ/WI behaviour
124 * for handling devices that QEMU does not yet model. New board models
125 * should instead use "unimplemented-device" for all memory ranges where
126 * the guest will attempt to probe for a device that QEMU doesn't
127 * implement and a stub device is required.
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128 * @kvm_type:
129 * Return the type of KVM corresponding to the kvm-type string option or
130 * computed based on other criteria such as the host kernel capabilities.
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131 * @numa_mem_supported:
132 * true if '--numa node.mem' option is supported and false otherwise
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133 * @smp_parse:
134 * The function pointer to hook different machine specific functions for
135 * parsing "smp-opts" from QemuOpts to MachineState::CpuTopology and more
136 * machine specific topology fields, such as smp_dies for PCMachine.
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137 * @hotplug_allowed:
138 * If the hook is provided, then it'll be called for each device
139 * hotplug to check whether the device hotplug is allowed. Return
140 * true to grant allowance or false to reject the hotplug. When
141 * false is returned, an error must be set to show the reason of
142 * the rejection. If the hook is not provided, all hotplug will be
143 * allowed.
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144 * @default_ram_id:
145 * Specifies inital RAM MemoryRegion name to be used for default backend
146 * creation if user explicitly hasn't specified backend with "memory-backend"
147 * property.
148 * It also will be used as a way to optin into "-m" option support.
149 * If it's not set by board, '-m' will be ignored and generic code will
150 * not create default RAM MemoryRegion.
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151 * @fixup_ram_size:
152 * Amends user provided ram size (with -m option) using machine
153 * specific algorithm. To be used by old machine types for compat
154 * purposes only.
155 * Applies only to default memory backend, i.e., explicit memory backend
156 * wasn't used.
36d20cb2
MA
157 */
158struct MachineClass {
159 /*< private >*/
160 ObjectClass parent_class;
161 /*< public >*/
162
2709f263 163 const char *family; /* NULL iff @name identifies a standalone machtype */
8ea75371 164 char *name;
00b4fbe2
MA
165 const char *alias;
166 const char *desc;
08fe6824 167 const char *deprecation_reason;
00b4fbe2 168
3ef96221 169 void (*init)(MachineState *state);
a0628599 170 void (*reset)(MachineState *state);
4b5e06c9 171 void (*wakeup)(MachineState *state);
dc0ca80e 172 int (*kvm_type)(MachineState *machine, const char *arg);
6f479566 173 void (*smp_parse)(MachineState *ms, QemuOpts *opts);
00b4fbe2
MA
174
175 BlockInterfaceType block_default_type;
16026518 176 int units_per_default_bus;
00b4fbe2 177 int max_cpus;
72649619
EC
178 int min_cpus;
179 int default_cpus;
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MA
180 unsigned int no_serial:1,
181 no_parallel:1,
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182 no_floppy:1,
183 no_cdrom:1,
33cd52b5 184 no_sdcard:1,
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185 pci_allow_0_address:1,
186 legacy_fw_cfg_order:1;
ea0ac7f6 187 bool is_default;
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188 const char *default_machine_opts;
189 const char *default_boot_order;
6f00494a 190 const char *default_display;
b66bbee3 191 GPtrArray *compat_props;
00b4fbe2 192 const char *hw_version;
076b35b5 193 ram_addr_t default_ram_size;
6063d4c0 194 const char *default_cpu_type;
b2fc91db 195 bool default_kernel_irqchip_split;
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EH
196 bool option_rom_has_mr;
197 bool rom_file_has_mr;
20bccb82 198 int minimum_page_bits;
c5514d0e 199 bool has_hotpluggable_cpus;
ed860129 200 bool ignore_memory_transaction_failures;
55641213 201 int numa_mem_align_shift;
c9cf636d 202 const char **valid_cpu_types;
0bd1909d 203 strList *allowed_dynamic_sysbus_devices;
7b8be49d 204 bool auto_enable_numa_with_memhp;
195784a0 205 bool auto_enable_numa_with_memdev;
907aac2f 206 bool ignore_boot_device_suffixes;
7fccf2a0 207 bool smbus_no_migration_support;
f6a0d06b 208 bool nvdimm_supported;
cd5ff833 209 bool numa_mem_supported;
0533ef5f 210 bool auto_enable_numa;
900c0ba3 211 const char *default_ram_id;
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212
213 HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
214 DeviceState *dev);
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215 bool (*hotplug_allowed)(MachineState *state, DeviceState *dev,
216 Error **errp);
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217 CpuInstanceProperties (*cpu_index_to_instance_props)(MachineState *machine,
218 unsigned cpu_index);
80e5db30 219 const CPUArchIdList *(*possible_cpu_arch_ids)(MachineState *machine);
79e07936 220 int64_t (*get_default_cpu_node_id)(const MachineState *ms, int idx);
5c30ef93 221 ram_addr_t (*fixup_ram_size)(ram_addr_t size);
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MA
222};
223
b0c14ec4 224/**
e017da37 225 * DeviceMemoryState:
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DH
226 * @base: address in guest physical address space where the memory
227 * address space for memory devices starts
228 * @mr: address space container for memory devices
229 */
e017da37 230typedef struct DeviceMemoryState {
b0c14ec4
DH
231 hwaddr base;
232 MemoryRegion mr;
e017da37 233} DeviceMemoryState;
b0c14ec4 234
edeeec91
LX
235/**
236 * CpuTopology:
237 * @cpus: the number of present logical processors on the machine
238 * @cores: the number of cores in one package
239 * @threads: the number of threads in one core
8cb30e3a 240 * @sockets: the number of sockets on the machine
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LX
241 * @max_cpus: the maximum number of logical processors on the machine
242 */
243typedef struct CpuTopology {
244 unsigned int cpus;
245 unsigned int cores;
246 unsigned int threads;
8cb30e3a 247 unsigned int sockets;
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LX
248 unsigned int max_cpus;
249} CpuTopology;
250
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MA
251/**
252 * MachineState:
253 */
254struct MachineState {
255 /*< private >*/
256 Object parent_obj;
33cd52b5
AG
257 Notifier sysbus_notifier;
258
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MA
259 /*< public >*/
260
a6487d37 261 void *fdt;
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MA
262 char *dtb;
263 char *dumpdtb;
264 int phandle_start;
265 char *dt_compatible;
266 bool dump_guest_core;
267 bool mem_merge;
268 bool usb;
c6e76503 269 bool usb_disabled;
36d20cb2 270 char *firmware;
a52a7fdf 271 bool iommu;
9850c604 272 bool suppress_vmdesc;
cfc58cf3 273 bool enable_graphics;
e0292d7c 274 ConfidentialGuestSupport *cgs;
aa8b1839 275 char *ram_memdev_id;
82b911aa
IM
276 /*
277 * convenience alias to ram_memdev_id backend memory region
278 * or to numa container memory region
279 */
280 MemoryRegion *ram;
e017da37 281 DeviceMemoryState *device_memory;
36d20cb2 282
3ef96221 283 ram_addr_t ram_size;
c270fb9e
IM
284 ram_addr_t maxram_size;
285 uint64_t ram_slots;
3ef96221 286 const char *boot_order;
4b7acd2a 287 const char *boot_once;
6b1b1440
MA
288 char *kernel_filename;
289 char *kernel_cmdline;
290 char *initrd_filename;
6063d4c0 291 const char *cpu_type;
ac2da55e 292 AccelState *accelerator;
38690a1c 293 CPUArchIdList *possible_cpus;
edeeec91 294 CpuTopology smp;
f6a0d06b 295 struct NVDIMMState *nvdimms_state;
aa570207 296 struct NumaState *numa_state;
36d20cb2
MA
297};
298
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EH
299#define DEFINE_MACHINE(namestr, machine_initfn) \
300 static void machine_initfn##_class_init(ObjectClass *oc, void *data) \
301 { \
302 MachineClass *mc = MACHINE_CLASS(oc); \
303 machine_initfn(mc); \
304 } \
305 static const TypeInfo machine_initfn##_typeinfo = { \
306 .name = MACHINE_TYPE_NAME(namestr), \
307 .parent = TYPE_MACHINE, \
308 .class_init = machine_initfn##_class_init, \
309 }; \
310 static void machine_initfn##_register_types(void) \
311 { \
312 type_register_static(&machine_initfn##_typeinfo); \
313 } \
0e6aac87 314 type_init(machine_initfn##_register_types)
ed0b6de3 315
576a00bd
CH
316extern GlobalProperty hw_compat_5_2[];
317extern const size_t hw_compat_5_2_len;
318
3ff3c5d3
CH
319extern GlobalProperty hw_compat_5_1[];
320extern const size_t hw_compat_5_1_len;
321
541aaa1d
CH
322extern GlobalProperty hw_compat_5_0[];
323extern const size_t hw_compat_5_0_len;
324
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EY
325extern GlobalProperty hw_compat_4_2[];
326extern const size_t hw_compat_4_2_len;
327
9aec2e52
CH
328extern GlobalProperty hw_compat_4_1[];
329extern const size_t hw_compat_4_1_len;
330
9bf2650b
CH
331extern GlobalProperty hw_compat_4_0[];
332extern const size_t hw_compat_4_0_len;
333
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MAL
334extern GlobalProperty hw_compat_3_1[];
335extern const size_t hw_compat_3_1_len;
336
ddb3235d
MAL
337extern GlobalProperty hw_compat_3_0[];
338extern const size_t hw_compat_3_0_len;
339
0d47310b
MAL
340extern GlobalProperty hw_compat_2_12[];
341extern const size_t hw_compat_2_12_len;
342
43df70a9
MAL
343extern GlobalProperty hw_compat_2_11[];
344extern const size_t hw_compat_2_11_len;
345
503224f4
MAL
346extern GlobalProperty hw_compat_2_10[];
347extern const size_t hw_compat_2_10_len;
348
3e803152
MAL
349extern GlobalProperty hw_compat_2_9[];
350extern const size_t hw_compat_2_9_len;
351
edc24ccd
MAL
352extern GlobalProperty hw_compat_2_8[];
353extern const size_t hw_compat_2_8_len;
354
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MAL
355extern GlobalProperty hw_compat_2_7[];
356extern const size_t hw_compat_2_7_len;
357
ff8f261f
MAL
358extern GlobalProperty hw_compat_2_6[];
359extern const size_t hw_compat_2_6_len;
360
fe759610
MAL
361extern GlobalProperty hw_compat_2_5[];
362extern const size_t hw_compat_2_5_len;
363
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MAL
364extern GlobalProperty hw_compat_2_4[];
365extern const size_t hw_compat_2_4_len;
366
8995dd90
MAL
367extern GlobalProperty hw_compat_2_3[];
368extern const size_t hw_compat_2_3_len;
369
1c30044e
MAL
370extern GlobalProperty hw_compat_2_2[];
371extern const size_t hw_compat_2_2_len;
372
c4fc5695
MAL
373extern GlobalProperty hw_compat_2_1[];
374extern const size_t hw_compat_2_1_len;
375
87ecb68b 376#endif