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Move QOM typedefs and add missing includes
[mirror_qemu.git] / include / hw / char / escc.h
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cb9c377f 1#ifndef HW_ESCC_H
175de524 2#define HW_ESCC_H
cb9c377f 3
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4#include "chardev/char-fe.h"
5#include "chardev/char-serial.h"
ec150c7e 6#include "hw/sysbus.h"
2cc75c32 7#include "ui/input.h"
db1015e9 8#include "qom/object.h"
2cc75c32 9
b4ed08e0 10/* escc.c */
81069b20 11#define TYPE_ESCC "escc"
b4ed08e0 12#define ESCC_SIZE 4
b4ed08e0 13
db1015e9 14typedef struct ESCCState ESCCState;
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15#define ESCC(obj) OBJECT_CHECK(ESCCState, (obj), TYPE_ESCC)
16
17typedef enum {
18 escc_chn_a, escc_chn_b,
19} ESCCChnID;
20
21typedef enum {
22 escc_serial, escc_kbd, escc_mouse,
23} ESCCChnType;
24
25#define ESCC_SERIO_QUEUE_SIZE 256
26
27typedef struct {
28 uint8_t data[ESCC_SERIO_QUEUE_SIZE];
29 int rptr, wptr, count;
30} ESCCSERIOQueue;
31
32#define ESCC_SERIAL_REGS 16
33typedef struct ESCCChannelState {
34 qemu_irq irq;
35 uint32_t rxint, txint, rxint_under_svc, txint_under_svc;
36 struct ESCCChannelState *otherchn;
37 uint32_t reg;
38 uint8_t wregs[ESCC_SERIAL_REGS], rregs[ESCC_SERIAL_REGS];
39 ESCCSERIOQueue queue;
40 CharBackend chr;
41 int e0_mode, led_mode, caps_lock_mode, num_lock_mode;
42 int disabled;
43 int clock;
44 uint32_t vmstate_dummy;
45 ESCCChnID chn; /* this channel, A (base+4) or B (base+0) */
46 ESCCChnType type;
47 uint8_t rx, tx;
48 QemuInputHandlerState *hs;
49} ESCCChannelState;
50
db1015e9 51struct ESCCState {
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52 SysBusDevice parent_obj;
53
54 struct ESCCChannelState chn[2];
55 uint32_t it_shift;
b43047a2 56 bool bit_swap;
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57 MemoryRegion mmio;
58 uint32_t disabled;
59 uint32_t frequency;
db1015e9 60};
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61
62#endif