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Commit | Line | Data |
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87ecb68b PB |
1 | #ifndef HW_PC_H |
2 | #define HW_PC_H | |
376253ec | 3 | |
fe8ce968 PMD |
4 | #include "qemu/notify.h" |
5 | #include "qapi/qapi-types-common.h" | |
9617cddb | 6 | #include "qemu/uuid.h" |
9521d42b | 7 | #include "hw/boards.h" |
0d09e41a | 8 | #include "hw/block/fdc.h" |
ebc29e1b | 9 | #include "hw/block/flash.h" |
f0bb276b | 10 | #include "hw/i386/x86.h" |
376253ec | 11 | |
ac35f13b | 12 | #include "hw/acpi/acpi_dev_interface.h" |
fe8ce968 | 13 | #include "hw/hotplug.h" |
db1015e9 | 14 | #include "qom/object.h" |
dfce81f1 | 15 | #include "hw/i386/sgx-epc.h" |
3459a625 | 16 | |
7a10ef51 LPF |
17 | #define HPET_INTCAP "hpet-intcap" |
18 | ||
619d11e4 IM |
19 | /** |
20 | * PCMachineState: | |
781bbd6b | 21 | * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling |
e3cadac0 | 22 | * @boot_cpus: number of present VCPUs |
619d11e4 | 23 | */ |
c8ed1cd7 | 24 | typedef struct PCMachineState { |
d5747cac | 25 | /*< private >*/ |
f0bb276b | 26 | X86MachineState parent_obj; |
619d11e4 IM |
27 | |
28 | /* <public> */ | |
13fc8343 EH |
29 | |
30 | /* State for other subsystems/APIs: */ | |
9ebeed0c | 31 | Notifier machine_done; |
781bbd6b | 32 | |
13fc8343 | 33 | /* Pointers to devices and objects: */ |
13fc8343 | 34 | PCIBus *bus; |
ebe15582 | 35 | I2CBus *smbus; |
ebc29e1b | 36 | PFlashCFI01 *flash[2]; |
6b8d1416 | 37 | ISADevice *pcspk; |
1b3bf138 | 38 | DeviceState *iommu; |
c87b1520 | 39 | |
13fc8343 | 40 | /* Configuration options: */ |
9a45729d | 41 | uint64_t max_ram_below_4g; |
d1048bef | 42 | OnOffAuto vmport; |
5fe79386 | 43 | |
021746c1 | 44 | bool acpi_build_enabled; |
f5878b03 CM |
45 | bool smbus_enabled; |
46 | bool sata_enabled; | |
47 | bool pit_enabled; | |
0259c78c | 48 | bool hpet_enabled; |
c9e96b04 | 49 | bool default_bus_bypass_iommu; |
0657c657 | 50 | uint64_t max_fw_size; |
021746c1 | 51 | |
091c466e SK |
52 | /* ACPI Memory hotplug IO base address */ |
53 | hwaddr memhp_io_base; | |
dfce81f1 SC |
54 | |
55 | SGXEPCState sgx_epc; | |
c8ed1cd7 | 56 | } PCMachineState; |
d5747cac | 57 | |
781bbd6b | 58 | #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device" |
9a45729d | 59 | #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g" |
f2ffbe2b | 60 | #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size" |
9b23cfb7 | 61 | #define PC_MACHINE_VMPORT "vmport" |
be232eb0 | 62 | #define PC_MACHINE_SMBUS "smbus" |
272f0428 | 63 | #define PC_MACHINE_SATA "sata" |
feddd2fd | 64 | #define PC_MACHINE_PIT "pit" |
0657c657 | 65 | #define PC_MACHINE_MAX_FW_SIZE "max-fw-size" |
95bee274 IM |
66 | /** |
67 | * PCMachineClass: | |
13fc8343 | 68 | * |
13fc8343 EH |
69 | * Compat fields: |
70 | * | |
16a9e8a5 EH |
71 | * @enforce_aligned_dimm: check that DIMM's address/size is aligned by |
72 | * backend's alignment value if provided | |
13fc8343 EH |
73 | * @acpi_data_size: Size of the chunk of memory at the top of RAM |
74 | * for the BIOS ACPI tables and other BIOS | |
75 | * datastructures. | |
76 | * @gigabyte_align: Make sure that guest addresses aligned at | |
77 | * 1Gbyte boundaries get mapped to host | |
78 | * addresses aligned at 1Gbyte boundaries. This | |
79 | * way we can use 1GByte pages in the host. | |
80 | * | |
95bee274 | 81 | */ |
db1015e9 | 82 | struct PCMachineClass { |
d5747cac | 83 | /*< private >*/ |
f0bb276b | 84 | X86MachineClass parent_class; |
95bee274 IM |
85 | |
86 | /*< public >*/ | |
13fc8343 | 87 | |
13fc8343 | 88 | /* Device configuration: */ |
7102fa70 | 89 | bool pci_enabled; |
13fc8343 | 90 | bool kvmclock_enabled; |
4b9c264b | 91 | const char *default_nic_model; |
13fc8343 EH |
92 | |
93 | /* Compat options: */ | |
94 | ||
0788a56b EH |
95 | /* Default CPU model version. See x86_cpu_set_default_version(). */ |
96 | int default_cpu_version; | |
97 | ||
13fc8343 | 98 | /* ACPI compat: */ |
7102fa70 EH |
99 | bool has_acpi_build; |
100 | bool rsdp_in_ram; | |
13fc8343 EH |
101 | int legacy_acpi_table_size; |
102 | unsigned acpi_data_size; | |
ebe15582 | 103 | bool do_not_add_smb_acpi; |
0a343a5a | 104 | int pci_root_uid; |
13fc8343 EH |
105 | |
106 | /* SMBIOS compat: */ | |
7102fa70 EH |
107 | bool smbios_defaults; |
108 | bool smbios_legacy_mode; | |
109 | bool smbios_uuid_encoded; | |
13fc8343 EH |
110 | |
111 | /* RAM / address space compat: */ | |
7102fa70 EH |
112 | bool gigabyte_align; |
113 | bool has_reserved_memory; | |
16a9e8a5 | 114 | bool enforce_aligned_dimm; |
13fc8343 | 115 | bool broken_reserved_end; |
36f96c4b | 116 | |
679dd1a9 IM |
117 | /* generate legacy CPU hotplug AML */ |
118 | bool legacy_cpu_hotplug; | |
98e753a6 | 119 | |
fda672b5 SG |
120 | /* use PVH to load kernels that support this feature */ |
121 | bool pvh_enabled; | |
8700a984 VK |
122 | |
123 | /* create kvmclock device even when KVM PV features are not exposed */ | |
124 | bool kvmclock_create_always; | |
db1015e9 | 125 | }; |
d5747cac | 126 | |
d5747cac | 127 | #define TYPE_PC_MACHINE "generic-pc-machine" |
a489d195 | 128 | OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE) |
d5747cac | 129 | |
d665d696 PB |
130 | /* ioapic.c */ |
131 | ||
417258f1 PMD |
132 | GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled); |
133 | ||
87ecb68b PB |
134 | /* pc.c */ |
135 | extern int fd_bootchk; | |
136 | ||
845773ab IY |
137 | void pc_acpi_smi_interrupt(void *opaque, int irq, int level); |
138 | ||
e4e8ba04 | 139 | void pc_guest_info_init(PCMachineState *pcms); |
3459a625 | 140 | |
39848901 IM |
141 | #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start" |
142 | #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end" | |
143 | #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start" | |
144 | #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end" | |
145 | #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size" | |
401f2f3e EV |
146 | #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size" |
147 | #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size" | |
1466cef3 | 148 | |
39848901 | 149 | |
83d08f26 MT |
150 | void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory, |
151 | MemoryRegion *pci_address_space); | |
39848901 | 152 | |
7bc35e0f | 153 | void xen_load_linux(PCMachineState *pcms); |
5934e216 EH |
154 | void pc_memory_init(PCMachineState *pcms, |
155 | MemoryRegion *system_memory, | |
156 | MemoryRegion *rom_memory, | |
157 | MemoryRegion **ram_memory); | |
9fa99d25 | 158 | uint64_t pc_pci_hole64_start(void); |
48a18b3c | 159 | DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus); |
10e2483b GH |
160 | void pc_basic_device_init(struct PCMachineState *pcms, |
161 | ISABus *isa_bus, qemu_irq *gsi, | |
1611977c | 162 | ISADevice **rtc_state, |
fd53c87c | 163 | bool create_fdctrl, |
3a87d009 | 164 | uint32_t hpet_irqs); |
48a18b3c | 165 | void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd); |
23d30407 | 166 | void pc_cmos_init(PCMachineState *pcms, |
220a8846 | 167 | BusState *ide0, BusState *ide1, |
63ffb564 | 168 | ISADevice *s); |
4b9c264b | 169 | void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus); |
845773ab | 170 | void pc_pci_device_init(PCIBus *pci_bus); |
8e78eb28 | 171 | |
f885f1ea | 172 | typedef void (*cpu_set_smm_t)(int smm, void *arg); |
f885f1ea | 173 | |
4501d317 | 174 | void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs); |
a39e3564 | 175 | |
424e4a87 RK |
176 | ISADevice *pc_find_fdc0(void); |
177 | ||
d3e07dc8 | 178 | /* port92.c */ |
d812b3d6 EV |
179 | #define PORT92_A20_LINE "a20" |
180 | ||
d3e07dc8 PMD |
181 | #define TYPE_PORT92 "port92" |
182 | ||
cbc5b5f3 | 183 | /* pc_sysfw.c */ |
ebc29e1b | 184 | void pc_system_flash_create(PCMachineState *pcms); |
dd29b5c3 | 185 | void pc_system_flash_cleanup_unused(PCMachineState *pcms); |
5e640a9e | 186 | void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory); |
9617cddb JB |
187 | bool pc_system_ovmf_table_find(const char *entry, uint8_t **data, |
188 | int *data_len); | |
b5b31860 | 189 | void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size); |
9617cddb | 190 | |
d0aa026a | 191 | /* hw/i386/acpi-common.c */ |
ac35f13b | 192 | void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, |
d0aa026a IM |
193 | const CPUArchIdList *apic_ids, GArray *entry, |
194 | bool force_enabled); | |
ac35f13b | 195 | |
1dec2e1f SC |
196 | /* sgx.c */ |
197 | void pc_machine_init_sgx_epc(PCMachineState *pcms); | |
198 | ||
52e64f5b YW |
199 | extern GlobalProperty pc_compat_6_1[]; |
200 | extern const size_t pc_compat_6_1_len; | |
201 | ||
da7e13c0 CH |
202 | extern GlobalProperty pc_compat_6_0[]; |
203 | extern const size_t pc_compat_6_0_len; | |
204 | ||
576a00bd CH |
205 | extern GlobalProperty pc_compat_5_2[]; |
206 | extern const size_t pc_compat_5_2_len; | |
207 | ||
3ff3c5d3 CH |
208 | extern GlobalProperty pc_compat_5_1[]; |
209 | extern const size_t pc_compat_5_1_len; | |
210 | ||
541aaa1d CH |
211 | extern GlobalProperty pc_compat_5_0[]; |
212 | extern const size_t pc_compat_5_0_len; | |
213 | ||
3eb74d20 CH |
214 | extern GlobalProperty pc_compat_4_2[]; |
215 | extern const size_t pc_compat_4_2_len; | |
216 | ||
9aec2e52 CH |
217 | extern GlobalProperty pc_compat_4_1[]; |
218 | extern const size_t pc_compat_4_1_len; | |
219 | ||
9bf2650b CH |
220 | extern GlobalProperty pc_compat_4_0[]; |
221 | extern const size_t pc_compat_4_0_len; | |
222 | ||
abd93cc7 MAL |
223 | extern GlobalProperty pc_compat_3_1[]; |
224 | extern const size_t pc_compat_3_1_len; | |
84e060bf | 225 | |
ddb3235d MAL |
226 | extern GlobalProperty pc_compat_3_0[]; |
227 | extern const size_t pc_compat_3_0_len; | |
9b4cf107 | 228 | |
0d47310b MAL |
229 | extern GlobalProperty pc_compat_2_12[]; |
230 | extern const size_t pc_compat_2_12_len; | |
968ee4ad | 231 | |
43df70a9 MAL |
232 | extern GlobalProperty pc_compat_2_11[]; |
233 | extern const size_t pc_compat_2_11_len; | |
df47ce8a | 234 | |
503224f4 MAL |
235 | extern GlobalProperty pc_compat_2_10[]; |
236 | extern const size_t pc_compat_2_10_len; | |
a6fd5b0e | 237 | |
3e803152 MAL |
238 | extern GlobalProperty pc_compat_2_9[]; |
239 | extern const size_t pc_compat_2_9_len; | |
465238d9 | 240 | |
edc24ccd MAL |
241 | extern GlobalProperty pc_compat_2_8[]; |
242 | extern const size_t pc_compat_2_8_len; | |
abc62c89 | 243 | |
5a995064 MAL |
244 | extern GlobalProperty pc_compat_2_7[]; |
245 | extern const size_t pc_compat_2_7_len; | |
14c985cf | 246 | |
ff8f261f MAL |
247 | extern GlobalProperty pc_compat_2_6[]; |
248 | extern const size_t pc_compat_2_6_len; | |
d86c1451 | 249 | |
fe759610 MAL |
250 | extern GlobalProperty pc_compat_2_5[]; |
251 | extern const size_t pc_compat_2_5_len; | |
240240d5 | 252 | |
2f99b9c2 MAL |
253 | extern GlobalProperty pc_compat_2_4[]; |
254 | extern const size_t pc_compat_2_4_len; | |
255 | ||
8995dd90 MAL |
256 | extern GlobalProperty pc_compat_2_3[]; |
257 | extern const size_t pc_compat_2_3_len; | |
258 | ||
1c30044e MAL |
259 | extern GlobalProperty pc_compat_2_2[]; |
260 | extern const size_t pc_compat_2_2_len; | |
261 | ||
c4fc5695 MAL |
262 | extern GlobalProperty pc_compat_2_1[]; |
263 | extern const size_t pc_compat_2_1_len; | |
264 | ||
a310e653 MAL |
265 | extern GlobalProperty pc_compat_2_0[]; |
266 | extern const size_t pc_compat_2_0_len; | |
267 | ||
268 | extern GlobalProperty pc_compat_1_7[]; | |
269 | extern const size_t pc_compat_1_7_len; | |
270 | ||
271 | extern GlobalProperty pc_compat_1_6[]; | |
272 | extern const size_t pc_compat_1_6_len; | |
273 | ||
274 | extern GlobalProperty pc_compat_1_5[]; | |
275 | extern const size_t pc_compat_1_5_len; | |
276 | ||
277 | extern GlobalProperty pc_compat_1_4[]; | |
278 | extern const size_t pc_compat_1_4_len; | |
279 | ||
cd6c1b70 EH |
280 | /* Helper for setting model-id for CPU models that changed model-id |
281 | * depending on QEMU versions up to QEMU 2.4. | |
282 | */ | |
283 | #define PC_CPU_MODEL_IDS(v) \ | |
6c36bddf EH |
284 | { "qemu32-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\ |
285 | { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\ | |
286 | { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, }, | |
cd6c1b70 | 287 | |
25519b06 | 288 | #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \ |
865906f7 EH |
289 | static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \ |
290 | { \ | |
291 | MachineClass *mc = MACHINE_CLASS(oc); \ | |
292 | optsfn(mc); \ | |
865906f7 EH |
293 | mc->init = initfn; \ |
294 | } \ | |
295 | static const TypeInfo pc_machine_type_##suffix = { \ | |
296 | .name = namestr TYPE_MACHINE_SUFFIX, \ | |
297 | .parent = TYPE_PC_MACHINE, \ | |
298 | .class_init = pc_machine_##suffix##_class_init, \ | |
299 | }; \ | |
61f219df EH |
300 | static void pc_machine_init_##suffix(void) \ |
301 | { \ | |
865906f7 | 302 | type_register(&pc_machine_type_##suffix); \ |
61f219df | 303 | } \ |
0e6aac87 | 304 | type_init(pc_machine_init_##suffix) |
61f219df | 305 | |
bd8107d7 | 306 | extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id); |
87ecb68b | 307 | #endif |