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549e984e SL |
1 | /* |
2 | * Copyright (c) 2019 Red Hat, Inc. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2 or later, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License along with | |
14 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
15 | */ | |
16 | ||
17 | #ifndef HW_I386_X86_H | |
18 | #define HW_I386_X86_H | |
19 | ||
f0bb276b PB |
20 | #include "qemu-common.h" |
21 | #include "exec/hwaddr.h" | |
22 | #include "qemu/notify.h" | |
23 | ||
53a5e7bd | 24 | #include "hw/i386/topology.h" |
549e984e | 25 | #include "hw/boards.h" |
f0bb276b | 26 | #include "hw/nmi.h" |
89a289c7 PB |
27 | #include "hw/isa/isa.h" |
28 | #include "hw/i386/ioapic.h" | |
db1015e9 | 29 | #include "qom/object.h" |
f0bb276b | 30 | |
db1015e9 | 31 | struct X86MachineClass { |
f0bb276b PB |
32 | /*< private >*/ |
33 | MachineClass parent; | |
34 | ||
35 | /*< public >*/ | |
36 | ||
2f34ebf2 LM |
37 | /* TSC rate migration: */ |
38 | bool save_tsc_khz; | |
f0bb276b PB |
39 | /* Enables contiguous-apic-ID mode */ |
40 | bool compat_apic_id_mode; | |
db1015e9 | 41 | }; |
f0bb276b | 42 | |
db1015e9 | 43 | struct X86MachineState { |
f0bb276b PB |
44 | /*< private >*/ |
45 | MachineState parent; | |
46 | ||
47 | /*< public >*/ | |
48 | ||
49 | /* Pointers to devices and objects: */ | |
50 | ISADevice *rtc; | |
51 | FWCfgState *fw_cfg; | |
52 | qemu_irq *gsi; | |
94c5a606 | 53 | DeviceState *ioapic2; |
f0bb276b | 54 | GMappedFile *initrd_mapped_file; |
50aef131 | 55 | HotplugHandler *acpi_dev; |
f0bb276b | 56 | |
f0bb276b PB |
57 | /* RAM information (sizes, addresses, configuration): */ |
58 | ram_addr_t below_4g_mem_size, above_4g_mem_size; | |
59 | ||
60 | /* CPU and apic information: */ | |
61 | bool apic_xrupt_override; | |
1b2802c4 | 62 | unsigned pci_irq_mask; |
f0bb276b PB |
63 | unsigned apic_id_limit; |
64 | uint16_t boot_cpus; | |
65 | unsigned smp_dies; | |
66 | ||
ed9e923c | 67 | OnOffAuto smm; |
17e89077 | 68 | OnOffAuto acpi; |
ed9e923c | 69 | |
d07b2286 MP |
70 | char *oem_id; |
71 | char *oem_table_id; | |
f0bb276b PB |
72 | /* |
73 | * Address space used by IOAPIC device. All IOAPIC interrupts | |
74 | * will be translated to MSI messages in the address space. | |
75 | */ | |
76 | AddressSpace *ioapic_as; | |
db1015e9 | 77 | }; |
f0bb276b | 78 | |
ed9e923c | 79 | #define X86_MACHINE_SMM "smm" |
17e89077 | 80 | #define X86_MACHINE_ACPI "acpi" |
d07b2286 MP |
81 | #define X86_MACHINE_OEM_ID "oem-id" |
82 | #define X86_MACHINE_OEM_TABLE_ID "oem-table-id" | |
f0bb276b PB |
83 | |
84 | #define TYPE_X86_MACHINE MACHINE_TYPE_NAME("x86") | |
a489d195 | 85 | OBJECT_DECLARE_TYPE(X86MachineState, X86MachineClass, X86_MACHINE) |
549e984e | 86 | |
53a5e7bd BM |
87 | void init_topo_info(X86CPUTopoInfo *topo_info, const X86MachineState *x86ms); |
88 | ||
703a548a | 89 | uint32_t x86_cpu_apic_id_from_index(X86MachineState *pcms, |
549e984e | 90 | unsigned int cpu_index); |
703a548a SL |
91 | |
92 | void x86_cpu_new(X86MachineState *pcms, int64_t apic_id, Error **errp); | |
93 | void x86_cpus_init(X86MachineState *pcms, int default_cpu_version); | |
549e984e SL |
94 | CpuInstanceProperties x86_cpu_index_to_props(MachineState *ms, |
95 | unsigned cpu_index); | |
96 | int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx); | |
97 | const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms); | |
0cca1a91 GH |
98 | CPUArchId *x86_find_cpu_slot(MachineState *ms, uint32_t id, int *idx); |
99 | void x86_rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count); | |
100 | void x86_cpu_pre_plug(HotplugHandler *hotplug_dev, | |
101 | DeviceState *dev, Error **errp); | |
102 | void x86_cpu_plug(HotplugHandler *hotplug_dev, | |
103 | DeviceState *dev, Error **errp); | |
104 | void x86_cpu_unplug_request_cb(HotplugHandler *hotplug_dev, | |
105 | DeviceState *dev, Error **errp); | |
106 | void x86_cpu_unplug_cb(HotplugHandler *hotplug_dev, | |
107 | DeviceState *dev, Error **errp); | |
549e984e | 108 | |
7d435078 PB |
109 | void x86_bios_rom_init(MachineState *ms, const char *default_firmware, |
110 | MemoryRegion *rom_memory, bool isapc_ram_fw); | |
549e984e | 111 | |
703a548a SL |
112 | void x86_load_linux(X86MachineState *x86ms, |
113 | FWCfgState *fw_cfg, | |
114 | int acpi_data_size, | |
115 | bool pvh_enabled, | |
116 | bool linuxboot_dma_enabled); | |
549e984e | 117 | |
9927a632 GH |
118 | bool x86_machine_is_smm_enabled(const X86MachineState *x86ms); |
119 | bool x86_machine_is_acpi_enabled(const X86MachineState *x86ms); | |
ed9e923c | 120 | |
89a289c7 PB |
121 | /* Global System Interrupts */ |
122 | ||
123 | #define GSI_NUM_PINS IOAPIC_NUM_PINS | |
1b2802c4 | 124 | #define ACPI_BUILD_PCI_IRQS ((1<<5) | (1<<9) | (1<<10) | (1<<11)) |
89a289c7 PB |
125 | |
126 | typedef struct GSIState { | |
127 | qemu_irq i8259_irq[ISA_NUM_IRQS]; | |
128 | qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; | |
94c5a606 | 129 | qemu_irq ioapic2_irq[IOAPIC_NUM_PINS]; |
89a289c7 PB |
130 | } GSIState; |
131 | ||
132 | qemu_irq x86_allocate_cpu_irq(void); | |
133 | void gsi_handler(void *opaque, int n, int level); | |
134 | void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); | |
94c5a606 | 135 | DeviceState *ioapic_init_secondary(GSIState *gsi_state); |
89a289c7 | 136 | |
549e984e | 137 | #endif |