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549e984e SL |
1 | /* |
2 | * Copyright (c) 2019 Red Hat, Inc. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2 or later, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License along with | |
14 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
15 | */ | |
16 | ||
17 | #ifndef HW_I386_X86_H | |
18 | #define HW_I386_X86_H | |
19 | ||
f0bb276b PB |
20 | #include "exec/hwaddr.h" |
21 | #include "qemu/notify.h" | |
22 | ||
53a5e7bd | 23 | #include "hw/i386/topology.h" |
549e984e | 24 | #include "hw/boards.h" |
f0bb276b | 25 | #include "hw/nmi.h" |
89a289c7 PB |
26 | #include "hw/isa/isa.h" |
27 | #include "hw/i386/ioapic.h" | |
db1015e9 | 28 | #include "qom/object.h" |
f0bb276b | 29 | |
db1015e9 | 30 | struct X86MachineClass { |
f0bb276b PB |
31 | /*< private >*/ |
32 | MachineClass parent; | |
33 | ||
34 | /*< public >*/ | |
35 | ||
2f34ebf2 LM |
36 | /* TSC rate migration: */ |
37 | bool save_tsc_khz; | |
f014c974 PB |
38 | /* use DMA capable linuxboot option rom */ |
39 | bool fwcfg_dma_enabled; | |
db1015e9 | 40 | }; |
f0bb276b | 41 | |
db1015e9 | 42 | struct X86MachineState { |
f0bb276b PB |
43 | /*< private >*/ |
44 | MachineState parent; | |
45 | ||
46 | /*< public >*/ | |
47 | ||
48 | /* Pointers to devices and objects: */ | |
49 | ISADevice *rtc; | |
50 | FWCfgState *fw_cfg; | |
51 | qemu_irq *gsi; | |
94c5a606 | 52 | DeviceState *ioapic2; |
f0bb276b | 53 | GMappedFile *initrd_mapped_file; |
50aef131 | 54 | HotplugHandler *acpi_dev; |
f0bb276b | 55 | |
f0bb276b PB |
56 | /* RAM information (sizes, addresses, configuration): */ |
57 | ram_addr_t below_4g_mem_size, above_4g_mem_size; | |
58 | ||
59 | /* CPU and apic information: */ | |
60 | bool apic_xrupt_override; | |
1b2802c4 | 61 | unsigned pci_irq_mask; |
f0bb276b PB |
62 | unsigned apic_id_limit; |
63 | uint16_t boot_cpus; | |
dfce81f1 | 64 | SgxEPCList *sgx_epc_list; |
f0bb276b | 65 | |
ed9e923c | 66 | OnOffAuto smm; |
17e89077 | 67 | OnOffAuto acpi; |
ed9e923c | 68 | |
d07b2286 MP |
69 | char *oem_id; |
70 | char *oem_table_id; | |
f0bb276b PB |
71 | /* |
72 | * Address space used by IOAPIC device. All IOAPIC interrupts | |
73 | * will be translated to MSI messages in the address space. | |
74 | */ | |
75 | AddressSpace *ioapic_as; | |
035d1ef2 CQ |
76 | |
77 | /* | |
78 | * Ratelimit enforced on detected bus locks in guest. | |
79 | * The default value of the bus_lock_ratelimit is 0 per second, | |
80 | * which means no limitation on the guest's bus locks. | |
81 | */ | |
82 | uint64_t bus_lock_ratelimit; | |
db1015e9 | 83 | }; |
f0bb276b | 84 | |
ed9e923c | 85 | #define X86_MACHINE_SMM "smm" |
17e89077 | 86 | #define X86_MACHINE_ACPI "acpi" |
90a66f48 PB |
87 | #define X86_MACHINE_OEM_ID "x-oem-id" |
88 | #define X86_MACHINE_OEM_TABLE_ID "x-oem-table-id" | |
035d1ef2 | 89 | #define X86_MACHINE_BUS_LOCK_RATELIMIT "bus-lock-ratelimit" |
f0bb276b PB |
90 | |
91 | #define TYPE_X86_MACHINE MACHINE_TYPE_NAME("x86") | |
a489d195 | 92 | OBJECT_DECLARE_TYPE(X86MachineState, X86MachineClass, X86_MACHINE) |
549e984e | 93 | |
53a5e7bd BM |
94 | void init_topo_info(X86CPUTopoInfo *topo_info, const X86MachineState *x86ms); |
95 | ||
703a548a | 96 | uint32_t x86_cpu_apic_id_from_index(X86MachineState *pcms, |
549e984e | 97 | unsigned int cpu_index); |
703a548a SL |
98 | |
99 | void x86_cpu_new(X86MachineState *pcms, int64_t apic_id, Error **errp); | |
100 | void x86_cpus_init(X86MachineState *pcms, int default_cpu_version); | |
549e984e SL |
101 | CpuInstanceProperties x86_cpu_index_to_props(MachineState *ms, |
102 | unsigned cpu_index); | |
103 | int64_t x86_get_default_cpu_node_id(const MachineState *ms, int idx); | |
104 | const CPUArchIdList *x86_possible_cpu_arch_ids(MachineState *ms); | |
0cca1a91 GH |
105 | CPUArchId *x86_find_cpu_slot(MachineState *ms, uint32_t id, int *idx); |
106 | void x86_rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count); | |
107 | void x86_cpu_pre_plug(HotplugHandler *hotplug_dev, | |
108 | DeviceState *dev, Error **errp); | |
109 | void x86_cpu_plug(HotplugHandler *hotplug_dev, | |
110 | DeviceState *dev, Error **errp); | |
111 | void x86_cpu_unplug_request_cb(HotplugHandler *hotplug_dev, | |
112 | DeviceState *dev, Error **errp); | |
113 | void x86_cpu_unplug_cb(HotplugHandler *hotplug_dev, | |
114 | DeviceState *dev, Error **errp); | |
549e984e | 115 | |
7d435078 PB |
116 | void x86_bios_rom_init(MachineState *ms, const char *default_firmware, |
117 | MemoryRegion *rom_memory, bool isapc_ram_fw); | |
549e984e | 118 | |
703a548a SL |
119 | void x86_load_linux(X86MachineState *x86ms, |
120 | FWCfgState *fw_cfg, | |
121 | int acpi_data_size, | |
f014c974 | 122 | bool pvh_enabled); |
549e984e | 123 | |
9927a632 GH |
124 | bool x86_machine_is_smm_enabled(const X86MachineState *x86ms); |
125 | bool x86_machine_is_acpi_enabled(const X86MachineState *x86ms); | |
ed9e923c | 126 | |
89a289c7 PB |
127 | /* Global System Interrupts */ |
128 | ||
129 | #define GSI_NUM_PINS IOAPIC_NUM_PINS | |
1b2802c4 | 130 | #define ACPI_BUILD_PCI_IRQS ((1<<5) | (1<<9) | (1<<10) | (1<<11)) |
89a289c7 PB |
131 | |
132 | typedef struct GSIState { | |
133 | qemu_irq i8259_irq[ISA_NUM_IRQS]; | |
134 | qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; | |
94c5a606 | 135 | qemu_irq ioapic2_irq[IOAPIC_NUM_PINS]; |
89a289c7 PB |
136 | } GSIState; |
137 | ||
138 | qemu_irq x86_allocate_cpu_irq(void); | |
139 | void gsi_handler(void *opaque, int n, int level); | |
140 | void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name); | |
94c5a606 | 141 | DeviceState *ioapic_init_secondary(GSIState *gsi_state); |
89a289c7 | 142 | |
966f1ca5 GH |
143 | /* pc_sysfw.c */ |
144 | void x86_firmware_configure(void *ptr, int size); | |
145 | ||
549e984e | 146 | #endif |