projects / mirror_qemu.git / blame
| Commit | Line | Data |
|---|---|---|
| f83a40dc AG |
1 | /* |
| 2 | * QEMU AHCI Emulation | |
| 3 | * | |
| 4 | * Copyright (c) 2010 qiaochong@loongson.cn | |
| 5 | * Copyright (c) 2010 Roland Elek <elek.roland@gmail.com> | |
| 6 | * Copyright (c) 2010 Sebastian Herbszt <herbszt@gmx.de> | |
| 7 | * Copyright (c) 2010 Alexander Graf <agraf@suse.de> | |
| 8 | * | |
| 9 | * This library is free software; you can redistribute it and/or | |
| 10 | * modify it under the terms of the GNU Lesser General Public | |
| 11 | * License as published by the Free Software Foundation; either | |
| 12 | * version 2 of the License, or (at your option) any later version. | |
| 13 | * | |
| 14 | * This library is distributed in the hope that it will be useful, | |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 17 | * Lesser General Public License for more details. | |
| 18 | * | |
| 19 | * You should have received a copy of the GNU Lesser General Public | |
| 20 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
| 21 | * | |
| 22 | */ | |
| 23 | ||
| 70e23370 JS |
24 | #ifndef HW_IDE_AHCI_H |
| 25 | #define HW_IDE_AHCI_H | |
| 03c7a6a8 | 26 | |
| a9c94277 | 27 | #include "hw/sysbus.h" |
| 5ea8b9c5 | 28 | |
| 70e23370 | 29 | typedef struct AHCIDevice AHCIDevice; |
| 03c7a6a8 | 30 | |
| 70e23370 JS |
31 | typedef struct AHCIControlRegs { |
| 32 | uint32_t cap; | |
| 33 | uint32_t ghc; | |
| 34 | uint32_t irqstatus; | |
| 35 | uint32_t impl; | |
| 36 | uint32_t version; | |
| 37 | } AHCIControlRegs; | |
| 03c7a6a8 | 38 | |
| 70e23370 JS |
39 | typedef struct AHCIState { |
| 40 | DeviceState *container; | |
| 03c7a6a8 | 41 | |
| 70e23370 JS |
42 | AHCIDevice *dev; |
| 43 | AHCIControlRegs control_regs; | |
| 44 | MemoryRegion mem; | |
| 45 | MemoryRegion idp; /* Index-Data Pair I/O port space */ | |
| 46 | unsigned idp_offset; /* Offset of index in I/O port space */ | |
| 47 | uint32_t idp_index; /* Current IDP index */ | |
| 48 | int32_t ports; | |
| 49 | qemu_irq irq; | |
| 50 | AddressSpace *as; | |
| 51 | } AHCIState; | |
| 03c7a6a8 | 52 | |
| 70e23370 | 53 | typedef struct AHCIPCIState AHCIPCIState; |
| 03c7a6a8 | 54 | |
| fd58922c PC |
55 | #define TYPE_ICH9_AHCI "ich9-ahci" |
| 56 | ||
| 57 | #define ICH_AHCI(obj) \ | |
| 58 | OBJECT_CHECK(AHCIPCIState, (obj), TYPE_ICH9_AHCI) | |
| 59 | ||
| 70e23370 JS |
60 | int32_t ahci_get_num_ports(PCIDevice *dev); |
| 61 | void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd); | |
| 03c7a6a8 | 62 | |
| 5ea8b9c5 AF |
63 | #define TYPE_SYSBUS_AHCI "sysbus-ahci" |
| 64 | #define SYSBUS_AHCI(obj) OBJECT_CHECK(SysbusAHCIState, (obj), TYPE_SYSBUS_AHCI) | |
| 65 | ||
| 70e23370 JS |
66 | typedef struct SysbusAHCIState { |
| 67 | /*< private >*/ | |
| 68 | SysBusDevice parent_obj; | |
| 69 | /*< public >*/ | |
| 70 | ||
| 71 | AHCIState ahci; | |
| 72 | uint32_t num_ports; | |
| 73 | } SysbusAHCIState; | |
| 74 | ||
| 377e2145 PC |
75 | #define TYPE_ALLWINNER_AHCI "allwinner-ahci" |
| 76 | #define ALLWINNER_AHCI(obj) OBJECT_CHECK(AllwinnerAHCIState, (obj), \ | |
| 77 | TYPE_ALLWINNER_AHCI) | |
| 78 | ||
| 70e23370 JS |
79 | #define ALLWINNER_AHCI_MMIO_OFF 0x80 |
| 80 | #define ALLWINNER_AHCI_MMIO_SIZE 0x80 | |
| 81 | ||
| 82 | struct AllwinnerAHCIState { | |
| 83 | /*< private >*/ | |
| 84 | SysbusAHCIState parent_obj; | |
| 85 | /*< public >*/ | |
| 86 | ||
| 87 | MemoryRegion mmio; | |
| 88 | uint32_t regs[ALLWINNER_AHCI_MMIO_SIZE/4]; | |
| 89 | }; | |
| 90 | ||
| 03c7a6a8 | 91 | #endif /* HW_IDE_AHCI_H */ |