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c859b566 AF |
1 | /* |
2 | * QEMU model of Xilinx I/O Module Interrupt Controller | |
3 | * | |
4 | * Copyright (c) 2014 Xilinx Inc. | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
58ea30f5 MA |
25 | #ifndef HW_INTC_XLNX_PMU_IOMOD_INTC_H |
26 | #define HW_INTC_XLNX_PMU_IOMOD_INTC_H | |
c859b566 | 27 | |
c859b566 AF |
28 | #include "hw/sysbus.h" |
29 | #include "hw/register.h" | |
db1015e9 | 30 | #include "qom/object.h" |
c859b566 AF |
31 | |
32 | #define TYPE_XLNX_PMU_IO_INTC "xlnx.pmu_io_intc" | |
33 | ||
8063396b | 34 | OBJECT_DECLARE_SIMPLE_TYPE(XlnxPMUIOIntc, XLNX_PMU_IO_INTC) |
c859b566 AF |
35 | |
36 | /* This is R_PIT3_CONTROL + 1 */ | |
37 | #define XLNXPMUIOINTC_R_MAX (0x78 + 1) | |
38 | ||
db1015e9 | 39 | struct XlnxPMUIOIntc { |
c859b566 AF |
40 | SysBusDevice parent_obj; |
41 | MemoryRegion iomem; | |
42 | ||
43 | qemu_irq parent_irq; | |
44 | ||
45 | struct { | |
46 | uint32_t intr_size; | |
47 | uint32_t level_edge; | |
48 | uint32_t positive; | |
49 | } cfg; | |
50 | ||
51 | uint32_t irq_raw; | |
52 | ||
53 | uint32_t regs[XLNXPMUIOINTC_R_MAX]; | |
54 | RegisterInfo regs_info[XLNXPMUIOINTC_R_MAX]; | |
db1015e9 | 55 | }; |
c859b566 | 56 | |
58ea30f5 | 57 | #endif /* HW_INTC_XLNX_PMU_IOMOD_INTC_H */ |