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c2da8a8b CLG |
1 | /* |
2 | * ASPEED SDRAM Memory Controller | |
3 | * | |
4 | * Copyright (C) 2016 IBM Corp. | |
5 | * | |
6 | * This code is licensed under the GPL version 2 or later. See the | |
7 | * COPYING file in the top-level directory. | |
8 | */ | |
9 | #ifndef ASPEED_SDMC_H | |
10 | #define ASPEED_SDMC_H | |
11 | ||
12 | #include "hw/sysbus.h" | |
13 | ||
14 | #define TYPE_ASPEED_SDMC "aspeed.sdmc" | |
15 | #define ASPEED_SDMC(obj) OBJECT_CHECK(AspeedSDMCState, (obj), TYPE_ASPEED_SDMC) | |
16 | ||
17 | #define ASPEED_SDMC_NR_REGS (0x8 >> 2) | |
18 | ||
19 | typedef struct AspeedSDMCState { | |
20 | /*< private >*/ | |
21 | SysBusDevice parent_obj; | |
22 | ||
23 | /*< public >*/ | |
24 | MemoryRegion iomem; | |
25 | ||
26 | uint32_t regs[ASPEED_SDMC_NR_REGS]; | |
27 | uint32_t silicon_rev; | |
3755f9e3 | 28 | uint32_t ram_bits; |
c2da8a8b CLG |
29 | |
30 | } AspeedSDMCState; | |
31 | ||
32 | #endif /* ASPEED_SDMC_H */ |