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c2da8a8b CLG |
1 | /* |
2 | * ASPEED SDRAM Memory Controller | |
3 | * | |
4 | * Copyright (C) 2016 IBM Corp. | |
5 | * | |
6 | * This code is licensed under the GPL version 2 or later. See the | |
7 | * COPYING file in the top-level directory. | |
8 | */ | |
9 | #ifndef ASPEED_SDMC_H | |
10 | #define ASPEED_SDMC_H | |
11 | ||
12 | #include "hw/sysbus.h" | |
13 | ||
14 | #define TYPE_ASPEED_SDMC "aspeed.sdmc" | |
15 | #define ASPEED_SDMC(obj) OBJECT_CHECK(AspeedSDMCState, (obj), TYPE_ASPEED_SDMC) | |
8e00d1a9 CLG |
16 | #define TYPE_ASPEED_2400_SDMC TYPE_ASPEED_SDMC "-ast2400" |
17 | #define TYPE_ASPEED_2500_SDMC TYPE_ASPEED_SDMC "-ast2500" | |
1550d726 | 18 | #define TYPE_ASPEED_2600_SDMC TYPE_ASPEED_SDMC "-ast2600" |
c2da8a8b | 19 | |
a40085d2 | 20 | #define ASPEED_SDMC_NR_REGS (0x174 >> 2) |
c2da8a8b CLG |
21 | |
22 | typedef struct AspeedSDMCState { | |
23 | /*< private >*/ | |
24 | SysBusDevice parent_obj; | |
25 | ||
26 | /*< public >*/ | |
27 | MemoryRegion iomem; | |
28 | ||
29 | uint32_t regs[ASPEED_SDMC_NR_REGS]; | |
c6c7cfb0 | 30 | uint64_t ram_size; |
ebe31c0a | 31 | uint64_t max_ram_size; |
c2da8a8b CLG |
32 | } AspeedSDMCState; |
33 | ||
8e00d1a9 CLG |
34 | #define ASPEED_SDMC_CLASS(klass) \ |
35 | OBJECT_CLASS_CHECK(AspeedSDMCClass, (klass), TYPE_ASPEED_SDMC) | |
36 | #define ASPEED_SDMC_GET_CLASS(obj) \ | |
37 | OBJECT_GET_CLASS(AspeedSDMCClass, (obj), TYPE_ASPEED_SDMC) | |
38 | ||
39 | typedef struct AspeedSDMCClass { | |
40 | SysBusDeviceClass parent_class; | |
41 | ||
42 | uint64_t max_ram_size; | |
43 | uint32_t (*compute_conf)(AspeedSDMCState *s, uint32_t data); | |
44 | void (*write)(AspeedSDMCState *s, uint32_t reg, uint32_t data); | |
45 | } AspeedSDMCClass; | |
46 | ||
c2da8a8b | 47 | #endif /* ASPEED_SDMC_H */ |