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a9f49946 IY |
1 | /* |
2 | * pcie_host.h | |
3 | * | |
4 | * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp> | |
5 | * VA Linux Systems Japan K.K. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | ||
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | ||
17 | * You should have received a copy of the GNU General Public License along | |
70539e18 | 18 | * with this program; if not, see <http://www.gnu.org/licenses/>. |
a9f49946 IY |
19 | */ |
20 | ||
21 | #ifndef PCIE_HOST_H | |
22 | #define PCIE_HOST_H | |
23 | ||
c759b24f | 24 | #include "hw/pci/pci_host.h" |
022c62cb | 25 | #include "exec/memory.h" |
db1015e9 | 26 | #include "qom/object.h" |
a9f49946 | 27 | |
bc927e48 | 28 | #define TYPE_PCIE_HOST_BRIDGE "pcie-host-bridge" |
8110fa1d EH |
29 | DECLARE_INSTANCE_CHECKER(PCIExpressHost, PCIE_HOST_BRIDGE, |
30 | TYPE_PCIE_HOST_BRIDGE) | |
bc927e48 | 31 | |
87f65245 | 32 | #define PCIE_HOST_MCFG_BASE "MCFG" |
cbcaf79e | 33 | #define PCIE_HOST_MCFG_SIZE "mcfg_size" |
87f65245 | 34 | |
079e3e70 MT |
35 | /* pcie_host::base_addr == PCIE_BASE_ADDR_UNMAPPED when it isn't mapped. */ |
36 | #define PCIE_BASE_ADDR_UNMAPPED ((hwaddr)-1ULL) | |
37 | ||
fb47a2e9 | 38 | struct PCIExpressHost { |
a9f49946 IY |
39 | PCIHostState pci; |
40 | ||
41 | /* express part */ | |
42 | ||
43 | /* base address where MMCONFIG area is mapped. */ | |
a8170e5e | 44 | hwaddr base_addr; |
a9f49946 IY |
45 | |
46 | /* the size of MMCONFIG area. It's host bridge dependent */ | |
a8170e5e | 47 | hwaddr size; |
a9f49946 | 48 | |
c76f990e AK |
49 | /* MMCONFIG mmio area */ |
50 | MemoryRegion mmio; | |
fb47a2e9 | 51 | }; |
a9f49946 | 52 | |
a9f49946 | 53 | void pcie_host_mmcfg_unmap(PCIExpressHost *e); |
27fb9688 | 54 | void pcie_host_mmcfg_init(PCIExpressHost *e, uint32_t size); |
c702ddb8 | 55 | void pcie_host_mmcfg_map(PCIExpressHost *e, hwaddr addr, uint32_t size); |
a9f49946 IY |
56 | void pcie_host_mmcfg_update(PCIExpressHost *e, |
57 | int enable, | |
c702ddb8 JB |
58 | hwaddr addr, |
59 | uint32_t size); | |
a9f49946 | 60 | |
6f6d2823 MT |
61 | /* |
62 | * PCI express ECAM (Enhanced Configuration Address Mapping) format. | |
63 | * AKA mmcfg address | |
64 | * bit 20 - 28: bus number | |
65 | * bit 15 - 19: device number | |
66 | * bit 12 - 14: function number | |
67 | * bit 0 - 11: offset in configuration space of a given device | |
68 | */ | |
58d5b22b | 69 | #define PCIE_MMCFG_SIZE_MAX (1ULL << 29) |
6f6d2823 MT |
70 | #define PCIE_MMCFG_SIZE_MIN (1ULL << 20) |
71 | #define PCIE_MMCFG_BUS_BIT 20 | |
72 | #define PCIE_MMCFG_BUS_MASK 0x1ff | |
73 | #define PCIE_MMCFG_DEVFN_BIT 12 | |
74 | #define PCIE_MMCFG_DEVFN_MASK 0xff | |
75 | #define PCIE_MMCFG_CONFOFFSET_MASK 0xfff | |
76 | #define PCIE_MMCFG_BUS(addr) (((addr) >> PCIE_MMCFG_BUS_BIT) & \ | |
77 | PCIE_MMCFG_BUS_MASK) | |
78 | #define PCIE_MMCFG_DEVFN(addr) (((addr) >> PCIE_MMCFG_DEVFN_BIT) & \ | |
79 | PCIE_MMCFG_DEVFN_MASK) | |
80 | #define PCIE_MMCFG_CONFOFFSET(addr) ((addr) & PCIE_MMCFG_CONFOFFSET_MASK) | |
81 | ||
a9f49946 | 82 | #endif /* PCIE_HOST_H */ |