]>
Commit | Line | Data |
---|---|---|
967b7523 CLG |
1 | /* |
2 | * QEMU PowerPC PowerNV XSCOM bus definitions | |
3 | * | |
4 | * Copyright (c) 2016, IBM Corporation. | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | #ifndef _PPC_PNV_XSCOM_H | |
20 | #define _PPC_PNV_XSCOM_H | |
21 | ||
22 | #include "qom/object.h" | |
23 | ||
967b7523 CLG |
24 | typedef struct PnvXScomInterface { |
25 | Object parent; | |
26 | } PnvXScomInterface; | |
27 | ||
28 | #define TYPE_PNV_XSCOM_INTERFACE "pnv-xscom-interface" | |
29 | #define PNV_XSCOM_INTERFACE(obj) \ | |
30 | OBJECT_CHECK(PnvXScomInterface, (obj), TYPE_PNV_XSCOM_INTERFACE) | |
31 | #define PNV_XSCOM_INTERFACE_CLASS(klass) \ | |
32 | OBJECT_CLASS_CHECK(PnvXScomInterfaceClass, (klass), \ | |
33 | TYPE_PNV_XSCOM_INTERFACE) | |
34 | #define PNV_XSCOM_INTERFACE_GET_CLASS(obj) \ | |
35 | OBJECT_GET_CLASS(PnvXScomInterfaceClass, (obj), TYPE_PNV_XSCOM_INTERFACE) | |
36 | ||
37 | typedef struct PnvXScomInterfaceClass { | |
38 | InterfaceClass parent; | |
b168a138 | 39 | int (*dt_xscom)(PnvXScomInterface *dev, void *fdt, int offset); |
967b7523 CLG |
40 | } PnvXScomInterfaceClass; |
41 | ||
24ece072 | 42 | /* |
ad521238 | 43 | * Layout of the XSCOM PCB addresses of EX core 1 (POWER 8) |
24ece072 CLG |
44 | * |
45 | * GPIO 0x1100xxxx | |
46 | * SCOM 0x1101xxxx | |
47 | * OHA 0x1102xxxx | |
48 | * CLOCK CTL 0x1103xxxx | |
49 | * FIR 0x1104xxxx | |
50 | * THERM 0x1105xxxx | |
51 | * <reserved> 0x1106xxxx | |
52 | * .. | |
53 | * 0x110Exxxx | |
54 | * PCB SLAVE 0x110Fxxxx | |
55 | */ | |
56 | ||
c035851a CLG |
57 | #define PNV_XSCOM_EX_CORE_BASE 0x10000000ull |
58 | ||
59 | #define PNV_XSCOM_EX_BASE(core) \ | |
60 | (PNV_XSCOM_EX_CORE_BASE | ((uint64_t)(core) << 24)) | |
61 | #define PNV_XSCOM_EX_SIZE 0x100000 | |
62 | ||
a3980bf5 BH |
63 | #define PNV_XSCOM_LPC_BASE 0xb0020 |
64 | #define PNV_XSCOM_LPC_SIZE 0x4 | |
65 | ||
54f59d78 CLG |
66 | #define PNV_XSCOM_PSIHB_BASE 0x2010900 |
67 | #define PNV_XSCOM_PSIHB_SIZE 0x20 | |
68 | ||
0722d05a BH |
69 | #define PNV_XSCOM_OCC_BASE 0x0066000 |
70 | #define PNV_XSCOM_OCC_SIZE 0x6000 | |
71 | ||
5dad902c CLG |
72 | #define PNV9_XSCOM_EC_BASE(core) \ |
73 | ((uint64_t)(((core) & 0x1F) + 0x20) << 24) | |
74 | #define PNV9_XSCOM_EC_SIZE 0x100000 | |
75 | ||
76 | #define PNV9_XSCOM_EQ_BASE(core) \ | |
77 | ((uint64_t)(((core) & 0x1C) + 0x40) << 22) | |
78 | #define PNV9_XSCOM_EQ_SIZE 0x100000 | |
79 | ||
6598a70d CLG |
80 | #define PNV9_XSCOM_OCC_BASE PNV_XSCOM_OCC_BASE |
81 | #define PNV9_XSCOM_OCC_SIZE 0x8000 | |
82 | ||
c38536bc CLG |
83 | #define PNV9_XSCOM_PSIHB_BASE 0x5012900 |
84 | #define PNV9_XSCOM_PSIHB_SIZE 0x100 | |
85 | ||
2dfa91a2 CLG |
86 | #define PNV9_XSCOM_XIVE_BASE 0x5013000 |
87 | #define PNV9_XSCOM_XIVE_SIZE 0x300 | |
88 | ||
967b7523 | 89 | extern void pnv_xscom_realize(PnvChip *chip, Error **errp); |
b168a138 | 90 | extern int pnv_dt_xscom(PnvChip *chip, void *fdt, int offset); |
967b7523 CLG |
91 | |
92 | extern void pnv_xscom_add_subregion(PnvChip *chip, hwaddr offset, | |
93 | MemoryRegion *mr); | |
94 | extern void pnv_xscom_region_init(MemoryRegion *mr, | |
95 | struct Object *owner, | |
96 | const MemoryRegionOps *ops, | |
97 | void *opaque, | |
98 | const char *name, | |
99 | uint64_t size); | |
100 | ||
101 | #endif /* _PPC_PNV_XSCOM_H */ |